From: richardbarry Date: Sun, 17 Mar 2013 16:54:17 +0000 (+0000) Subject: Updated IAR RL78 port layer. X-Git-Tag: V7.4.1~32 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=978a86a3590109f4eee4c24b229461bf3d73f55f;p=freertos Updated IAR RL78 port layer. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1843 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/FreeRTOS/Source/portable/IAR/RL78/port.c b/FreeRTOS/Source/portable/IAR/RL78/port.c index 1ea23611c..535295728 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/port.c +++ b/FreeRTOS/Source/portable/IAR/RL78/port.c @@ -76,6 +76,10 @@ #include "FreeRTOS.h" #include "task.h" +/* Hardware includes. */ +#include "port_iodefine.h" +#include "port_iodefine_ext.h" + /* The critical nesting value is initialised to a non zero value to ensure interrupts don't accidentally become enabled before the scheduler is started. */ #define portINITIAL_CRITICAL_NESTING ( ( unsigned short ) 10 ) @@ -154,7 +158,7 @@ unsigned long *pulLocal; /* The start address / PSW value is also written in as a 32bit value, so leave a space for the second two bytes. */ pxTopOfStack--; - + /* Task function start address combined with the PSW. */ pulLocal = ( unsigned long * ) pxTopOfStack; *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) ); @@ -190,7 +194,7 @@ unsigned long *pulLocal; *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00; pxTopOfStack--; - /* Finally the remaining general purpose registers DE and BC */ + /* The remaining general purpose registers DE and BC */ *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE; pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC; @@ -198,7 +202,7 @@ unsigned long *pulLocal; /* Finally the critical section nesting count is set to zero when the task first starts. */ - *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; + *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; /* Return a pointer to the top of the stack that has beene generated so it can be stored in the task control block for the task. */ @@ -237,28 +241,25 @@ const unsigned short usCompareMatch = ( usClockHz / configTICK_RATE_HZ ) + 1UL; /* Supply the RTC clock. */ RTCEN = ( unsigned char ) 1U; - + /* Disable ITMC operation. */ ITMC = ( unsigned char ) 0x0000; - + /* Disable INTIT interrupt. */ ITMK = ( unsigned char ) 1; - + /* Set INTIT high priority */ ITPR1 = ( unsigned char ) 1; ITPR0 = ( unsigned char ) 1; - + /* Clear INIT interrupt. */ ITIF = ( unsigned char ) 0; /* Set interval and enable interrupt operation. */ ITMC = usCompareMatch | 0x8000U; - + /* Enable INTIT interrupt. */ ITMK = ( unsigned char ) 0; - - /* Enable IT operation. */ -// ITMC |= 0x8000; } /*-----------------------------------------------------------*/ diff --git a/FreeRTOS/Source/portable/IAR/RL78/port_iodefine.h b/FreeRTOS/Source/portable/IAR/RL78/port_iodefine.h new file mode 100644 index 000000000..ffb3507cc --- /dev/null +++ b/FreeRTOS/Source/portable/IAR/RL78/port_iodefine.h @@ -0,0 +1,872 @@ +/***********************************************************************/ +/* */ +/* PROJECT NAME : RTOSDemo */ +/* FILE : iodefine.h */ +/* DESCRIPTION : Definition of I/O Registers */ +/* CPU SERIES : RL78 - G1C */ +/* CPU TYPE : R5F10JBC */ +/* */ +/* This file is generated by e2studio. */ +/* */ +/***********************************************************************/ + +/************************************************************************/ +/* Header file generated from device file: */ +/* DR5F10JBC.DVF */ +/* Copyright(C) 2012 Renesas */ +/* File Version V1.00 */ +/* Tool Version 1.9.7121 */ +/* Date Generated 13/11/2012 */ +/************************************************************************/ + +#ifndef __IOREG_BIT_STRUCTURES +#define __IOREG_BIT_STRUCTURES +typedef struct { + unsigned char no0 :1; + unsigned char no1 :1; + unsigned char no2 :1; + unsigned char no3 :1; + unsigned char no4 :1; + unsigned char no5 :1; + unsigned char no6 :1; + unsigned char no7 :1; +} __BITS8; + +typedef struct { + unsigned short no0 :1; + unsigned short no1 :1; + unsigned short no2 :1; + unsigned short no3 :1; + unsigned short no4 :1; + unsigned short no5 :1; + unsigned short no6 :1; + unsigned short no7 :1; + unsigned short no8 :1; + unsigned short no9 :1; + unsigned short no10 :1; + unsigned short no11 :1; + unsigned short no12 :1; + unsigned short no13 :1; + unsigned short no14 :1; + unsigned short no15 :1; +} __BITS16; + +#endif + +#ifndef IODEFINE_H +#define IODEFINE_H + +/* + IO Registers + */ +union un_p0 { + unsigned char p0; + __BITS8 BIT; +}; +union un_p1 { + unsigned char p1; + __BITS8 BIT; +}; +union un_p2 { + unsigned char p2; + __BITS8 BIT; +}; +union un_p3 { + unsigned char p3; + __BITS8 BIT; +}; +union un_p4 { + unsigned char p4; + __BITS8 BIT; +}; +union un_p5 { + unsigned char p5; + __BITS8 BIT; +}; +union un_p6 { + unsigned char p6; + __BITS8 BIT; +}; +union un_p7 { + unsigned char p7; + __BITS8 BIT; +}; +union un_p12 { + unsigned char p12; + __BITS8 BIT; +}; +union un_p13 { + unsigned char p13; + __BITS8 BIT; +}; +union un_pm0 { + unsigned char pm0; + __BITS8 BIT; +}; +union un_pm1 { + unsigned char pm1; + __BITS8 BIT; +}; +union un_pm2 { + unsigned char pm2; + __BITS8 BIT; +}; +union un_pm3 { + unsigned char pm3; + __BITS8 BIT; +}; +union un_pm4 { + unsigned char pm4; + __BITS8 BIT; +}; +union un_pm5 { + unsigned char pm5; + __BITS8 BIT; +}; +union un_pm6 { + unsigned char pm6; + __BITS8 BIT; +}; +union un_pm7 { + unsigned char pm7; + __BITS8 BIT; +}; +union un_pm12 { + unsigned char pm12; + __BITS8 BIT; +}; +union un_adm0 { + unsigned char adm0; + __BITS8 BIT; +}; +union un_ads { + unsigned char ads; + __BITS8 BIT; +}; +union un_adm1 { + unsigned char adm1; + __BITS8 BIT; +}; +union un_egp0 { + unsigned char egp0; + __BITS8 BIT; +}; +union un_egn0 { + unsigned char egn0; + __BITS8 BIT; +}; +union un_egp1 { + unsigned char egp1; + __BITS8 BIT; +}; +union un_egn1 { + unsigned char egn1; + __BITS8 BIT; +}; +union un_iics0 { + unsigned char iics0; + __BITS8 BIT; +}; +union un_iicf0 { + unsigned char iicf0; + __BITS8 BIT; +}; +union un_flars { + unsigned char flars; + __BITS8 BIT; +}; +union un_fssq { + unsigned char fssq; + __BITS8 BIT; +}; +union un_flrst { + unsigned char flrst; + __BITS8 BIT; +}; +union un_fsastl { + unsigned char fsastl; + __BITS8 BIT; +}; +union un_fsasth { + unsigned char fsasth; + __BITS8 BIT; +}; +union un_rtcc0 { + unsigned char rtcc0; + __BITS8 BIT; +}; +union un_rtcc1 { + unsigned char rtcc1; + __BITS8 BIT; +}; +union un_csc { + unsigned char csc; + __BITS8 BIT; +}; +union un_ostc { + unsigned char ostc; + __BITS8 BIT; +}; +union un_ckc { + unsigned char ckc; + __BITS8 BIT; +}; +union un_cks0 { + unsigned char cks0; + __BITS8 BIT; +}; +union un_cks1 { + unsigned char cks1; + __BITS8 BIT; +}; +union un_lvim { + unsigned char lvim; + __BITS8 BIT; +}; +union un_lvis { + unsigned char lvis; + __BITS8 BIT; +}; +union un_monsta0 { + unsigned char monsta0; + __BITS8 BIT; +}; +union un_asim { + unsigned char asim; + __BITS8 BIT; +}; +union un_dmc0 { + unsigned char dmc0; + __BITS8 BIT; +}; +union un_dmc1 { + unsigned char dmc1; + __BITS8 BIT; +}; +union un_drc0 { + unsigned char drc0; + __BITS8 BIT; +}; +union un_drc1 { + unsigned char drc1; + __BITS8 BIT; +}; +union un_if2 { + unsigned short if2; + __BITS16 BIT; +}; +union un_if2l { + unsigned char if2l; + __BITS8 BIT; +}; +union un_if2h { + unsigned char if2h; + __BITS8 BIT; +}; +union un_mk2 { + unsigned short mk2; + __BITS16 BIT; +}; +union un_mk2l { + unsigned char mk2l; + __BITS8 BIT; +}; +union un_mk2h { + unsigned char mk2h; + __BITS8 BIT; +}; +union un_pr02 { + unsigned short pr02; + __BITS16 BIT; +}; +union un_pr02l { + unsigned char pr02l; + __BITS8 BIT; +}; +union un_pr02h { + unsigned char pr02h; + __BITS8 BIT; +}; +union un_pr12 { + unsigned short pr12; + __BITS16 BIT; +}; +union un_pr12l { + unsigned char pr12l; + __BITS8 BIT; +}; +union un_pr12h { + unsigned char pr12h; + __BITS8 BIT; +}; +union un_if0 { + unsigned short if0; + __BITS16 BIT; +}; +union un_if0l { + unsigned char if0l; + __BITS8 BIT; +}; +union un_if0h { + unsigned char if0h; + __BITS8 BIT; +}; +union un_if1 { + unsigned short if1; + __BITS16 BIT; +}; +union un_if1l { + unsigned char if1l; + __BITS8 BIT; +}; +union un_if1h { + unsigned char if1h; + __BITS8 BIT; +}; +union un_mk0 { + unsigned short mk0; + __BITS16 BIT; +}; +union un_mk0l { + unsigned char mk0l; + __BITS8 BIT; +}; +union un_mk0h { + unsigned char mk0h; + __BITS8 BIT; +}; +union un_mk1 { + unsigned short mk1; + __BITS16 BIT; +}; +union un_mk1l { + unsigned char mk1l; + __BITS8 BIT; +}; +union un_mk1h { + unsigned char mk1h; + __BITS8 BIT; +}; +union un_pr00 { + unsigned short pr00; + __BITS16 BIT; +}; +union un_pr00l { + unsigned char pr00l; + __BITS8 BIT; +}; +union un_pr00h { + unsigned char pr00h; + __BITS8 BIT; +}; +union un_pr01 { + unsigned short pr01; + __BITS16 BIT; +}; +union un_pr01l { + unsigned char pr01l; + __BITS8 BIT; +}; +union un_pr01h { + unsigned char pr01h; + __BITS8 BIT; +}; +union un_pr10 { + unsigned short pr10; + __BITS16 BIT; +}; +union un_pr10l { + unsigned char pr10l; + __BITS8 BIT; +}; +union un_pr10h { + unsigned char pr10h; + __BITS8 BIT; +}; +union un_pr11 { + unsigned short pr11; + __BITS16 BIT; +}; +union un_pr11l { + unsigned char pr11l; + __BITS8 BIT; +}; +union un_pr11h { + unsigned char pr11h; + __BITS8 BIT; +}; +union un_pmc { + unsigned char pmc; + __BITS8 BIT; +}; + +#define P0 (*(volatile union un_p0 *)0xFFF00).p0 +#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT +#define P1 (*(volatile union un_p1 *)0xFFF01).p1 +#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT +#define P2 (*(volatile union un_p2 *)0xFFF02).p2 +#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT +#define P3 (*(volatile union un_p3 *)0xFFF03).p3 +#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT +#define P4 (*(volatile union un_p4 *)0xFFF04).p4 +#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT +#define P5 (*(volatile union un_p5 *)0xFFF05).p5 +#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT +#define P6 (*(volatile union un_p6 *)0xFFF06).p6 +#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT +#define P7 (*(volatile union un_p7 *)0xFFF07).p7 +#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT +#define P12 (*(volatile union un_p12 *)0xFFF0C).p12 +#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT +#define P13 (*(volatile union un_p13 *)0xFFF0D).p13 +#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT +#define SDR00 (*(volatile unsigned short *)0xFFF10) +#define SIO00 (*(volatile unsigned char *)0xFFF10) +#define TXD0 (*(volatile unsigned char *)0xFFF10) +#define SDR01 (*(volatile unsigned short *)0xFFF12) +#define RXD0 (*(volatile unsigned char *)0xFFF12) +#define SIO01 (*(volatile unsigned char *)0xFFF12) +#define TDR00 (*(volatile unsigned short *)0xFFF18) +#define TDR01 (*(volatile unsigned short *)0xFFF1A) +#define TDR01L (*(volatile unsigned char *)0xFFF1A) +#define TDR01H (*(volatile unsigned char *)0xFFF1B) +#define ADCR (*(volatile unsigned short *)0xFFF1E) +#define ADCRH (*(volatile unsigned char *)0xFFF1F) +#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0 +#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT +#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1 +#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT +#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2 +#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT +#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3 +#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT +#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4 +#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT +#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5 +#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT +#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6 +#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT +#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7 +#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT +#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12 +#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT +#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0 +#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT +#define ADS (*(volatile union un_ads *)0xFFF31).ads +#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT +#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1 +#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT +#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0 +#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT +#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0 +#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT +#define EGP1 (*(volatile union un_egp1 *)0xFFF3A).egp1 +#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT +#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1 +#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT +#define IICA0 (*(volatile unsigned char *)0xFFF50) +#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0 +#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT +#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0 +#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT +#define CFIFO (*(volatile unsigned short *)0xFFF54) +#define CFIFOL (*(volatile unsigned char *)0xFFF54) +#define D0FIFO (*(volatile unsigned short *)0xFFF58) +#define D0FIFOL (*(volatile unsigned char *)0xFFF58) +#define D1FIFO (*(volatile unsigned short *)0xFFF5C) +#define D1FIFOL (*(volatile unsigned char *)0xFFF5C) +#define TDR02 (*(volatile unsigned short *)0xFFF64) +#define TDR03 (*(volatile unsigned short *)0xFFF66) +#define TDR03L (*(volatile unsigned char *)0xFFF66) +#define TDR03H (*(volatile unsigned char *)0xFFF67) +#define FLPMC (*(volatile unsigned char *)0xFFF80) +#define FLARS (*(volatile union un_flars *)0xFFF81).flars +#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT +#define FLAPL (*(volatile unsigned short *)0xFFF82) +#define FLAPH (*(volatile unsigned char *)0xFFF84) +#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq +#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT +#define FLSEDL (*(volatile unsigned short *)0xFFF86) +#define FLSEDH (*(volatile unsigned char *)0xFFF88) +#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst +#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT +#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl +#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT +#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth +#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT +#define FLWL (*(volatile unsigned short *)0xFFF8C) +#define FLWH (*(volatile unsigned short *)0xFFF8E) +#define ITMC (*(volatile unsigned short *)0xFFF90) +#define SEC (*(volatile unsigned char *)0xFFF92) +#define MIN (*(volatile unsigned char *)0xFFF93) +#define HOUR (*(volatile unsigned char *)0xFFF94) +#define WEEK (*(volatile unsigned char *)0xFFF95) +#define DAY (*(volatile unsigned char *)0xFFF96) +#define MONTH (*(volatile unsigned char *)0xFFF97) +#define YEAR (*(volatile unsigned char *)0xFFF98) +#define SUBCUD (*(volatile unsigned char *)0xFFF99) +#define ALARMWM (*(volatile unsigned char *)0xFFF9A) +#define ALARMWH (*(volatile unsigned char *)0xFFF9B) +#define ALARMWW (*(volatile unsigned char *)0xFFF9C) +#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0 +#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT +#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1 +#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT +#define CMC (*(volatile unsigned char *)0xFFFA0) +#define CSC (*(volatile union un_csc *)0xFFFA1).csc +#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT +#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc +#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT +#define OSTS (*(volatile unsigned char *)0xFFFA3) +#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc +#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT +#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0 +#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT +#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1 +#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT +#define RESF (*(volatile unsigned char *)0xFFFA8) +#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim +#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT +#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis +#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT +#define WDTE (*(volatile unsigned char *)0xFFFAB) +#define CRCIN (*(volatile unsigned char *)0xFFFAC) +#define RXB (*(volatile unsigned char *)0xFFFAD) +#define TXS (*(volatile unsigned char *)0xFFFAD) +#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0 +#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT +#define ASIM (*(volatile union un_asim *)0xFFFAF).asim +#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT +#define DSA0 (*(volatile unsigned char *)0xFFFB0) +#define DSA1 (*(volatile unsigned char *)0xFFFB1) +#define DRA0 (*(volatile unsigned short *)0xFFFB2) +#define DRA0L (*(volatile unsigned char *)0xFFFB2) +#define DRA0H (*(volatile unsigned char *)0xFFFB3) +#define DRA1 (*(volatile unsigned short *)0xFFFB4) +#define DRA1L (*(volatile unsigned char *)0xFFFB4) +#define DRA1H (*(volatile unsigned char *)0xFFFB5) +#define DBC0 (*(volatile unsigned short *)0xFFFB6) +#define DBC0L (*(volatile unsigned char *)0xFFFB6) +#define DBC0H (*(volatile unsigned char *)0xFFFB7) +#define DBC1 (*(volatile unsigned short *)0xFFFB8) +#define DBC1L (*(volatile unsigned char *)0xFFFB8) +#define DBC1H (*(volatile unsigned char *)0xFFFB9) +#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0 +#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT +#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1 +#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT +#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0 +#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT +#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1 +#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT +#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2 +#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT +#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l +#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT +#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h +#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT +#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2 +#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT +#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l +#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT +#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h +#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT +#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02 +#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT +#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l +#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT +#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h +#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT +#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12 +#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT +#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l +#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT +#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h +#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT +#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0 +#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT +#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l +#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT +#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h +#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT +#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1 +#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT +#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l +#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT +#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h +#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT +#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0 +#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT +#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l +#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT +#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h +#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT +#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1 +#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT +#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l +#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT +#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h +#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT +#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00 +#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT +#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l +#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT +#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h +#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT +#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01 +#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT +#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l +#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT +#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h +#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT +#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10 +#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT +#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l +#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT +#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h +#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT +#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11 +#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT +#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l +#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT +#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h +#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT +#define MDAL (*(volatile unsigned short *)0xFFFF0) +#define MULA (*(volatile unsigned short *)0xFFFF0) +#define MDAH (*(volatile unsigned short *)0xFFFF2) +#define MULB (*(volatile unsigned short *)0xFFFF2) +#define MDBH (*(volatile unsigned short *)0xFFFF4) +#define MULOH (*(volatile unsigned short *)0xFFFF4) +#define MDBL (*(volatile unsigned short *)0xFFFF6) +#define MULOL (*(volatile unsigned short *)0xFFFF6) +#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc +#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT + +/* + Sfr bits + */ +#define ADCE ADM0_bit.no0 +#define ADCS ADM0_bit.no7 +#define SPD0 IICS0_bit.no0 +#define STD0 IICS0_bit.no1 +#define ACKD0 IICS0_bit.no2 +#define TRC0 IICS0_bit.no3 +#define COI0 IICS0_bit.no4 +#define EXC0 IICS0_bit.no5 +#define ALD0 IICS0_bit.no6 +#define MSTS0 IICS0_bit.no7 +#define IICRSV0 IICF0_bit.no0 +#define STCEN0 IICF0_bit.no1 +#define IICBSY0 IICF0_bit.no6 +#define STCF0 IICF0_bit.no7 +#define FSSTP FSSQ_bit.no6 +#define SQST FSSQ_bit.no7 +#define SQEND FSASTH_bit.no6 +#define ESQEND FSASTH_bit.no7 +#define RTCE RTCC0_bit.no7 +#define RWAIT RTCC1_bit.no0 +#define RWST RTCC1_bit.no1 +#define RIFG RTCC1_bit.no3 +#define WAFG RTCC1_bit.no4 +#define WALIE RTCC1_bit.no6 +#define WALE RTCC1_bit.no7 +#define HIOSTOP CSC_bit.no0 +#define XTSTOP CSC_bit.no6 +#define MSTOP CSC_bit.no7 +#define MCM0 CKC_bit.no4 +#define MCS CKC_bit.no5 +#define CSS CKC_bit.no6 +#define PCLOE0 CKS0_bit.no7 +#define PCLOE1 CKS1_bit.no7 +#define LVIF LVIM_bit.no0 +#define LVIOMSK LVIM_bit.no1 +#define LVISEN LVIM_bit.no7 +#define LVILV LVIS_bit.no0 +#define LVIMD LVIS_bit.no7 +#define DWAIT0 DMC0_bit.no4 +#define DS0 DMC0_bit.no5 +#define DRS0 DMC0_bit.no6 +#define STG0 DMC0_bit.no7 +#define DWAIT1 DMC1_bit.no4 +#define DS1 DMC1_bit.no5 +#define DRS1 DMC1_bit.no6 +#define STG1 DMC1_bit.no7 +#define DST0 DRC0_bit.no0 +#define DEN0 DRC0_bit.no7 +#define DST1 DRC1_bit.no0 +#define DEN1 DRC1_bit.no7 +#define PIF8 IF2_bit.no5 +#define PIF9 IF2_bit.no6 +#define MDIF IF2H_bit.no5 +#define FLIF IF2H_bit.no7 +#define PMK8 MK2_bit.no5 +#define PMK9 MK2_bit.no6 +#define MDMK MK2H_bit.no5 +#define FLMK MK2H_bit.no7 +#define PPR08 PR02_bit.no5 +#define PPR09 PR02_bit.no6 +#define MDPR0 PR02H_bit.no5 +#define FLPR0 PR02H_bit.no7 +#define PPR18 PR12_bit.no5 +#define PPR19 PR12_bit.no6 +#define MDPR1 PR12H_bit.no5 +#define FLPR1 PR12H_bit.no7 +#define WDTIIF IF0_bit.no0 +#define LVIIF IF0_bit.no1 +#define PIF0 IF0_bit.no2 +#define PIF1 IF0_bit.no3 +#define PIF2 IF0_bit.no4 +#define PIF3 IF0_bit.no5 +#define PIF4 IF0_bit.no6 +#define PIF5 IF0_bit.no7 +#define DMAIF0 IF0H_bit.no3 +#define DMAIF1 IF0H_bit.no4 +#define CSIIF00 IF0H_bit.no5 +#define IICIF00 IF0H_bit.no5 +#define STIF0 IF0H_bit.no5 +#define TMIF00 IF0H_bit.no6 +#define CSIIF01 IF0H_bit.no7 +#define IICIF01 IF0H_bit.no7 +#define SRIF0 IF0H_bit.no7 +#define SREIF0 IF1_bit.no0 +#define TMIF01H IF1_bit.no0 +#define TMIF03H IF1_bit.no3 +#define IICAIF0 IF1_bit.no4 +#define TMIF01 IF1_bit.no5 +#define TMIF02 IF1_bit.no6 +#define TMIF03 IF1_bit.no7 +#define ADIF IF1H_bit.no0 +#define RTCIF IF1H_bit.no1 +#define ITIF IF1H_bit.no2 +#define USBIF IF1H_bit.no4 +#define RSUIF IF1H_bit.no5 +#define WDTIMK MK0_bit.no0 +#define LVIMK MK0_bit.no1 +#define PMK0 MK0_bit.no2 +#define PMK1 MK0_bit.no3 +#define PMK2 MK0_bit.no4 +#define PMK3 MK0_bit.no5 +#define PMK4 MK0_bit.no6 +#define PMK5 MK0_bit.no7 +#define DMAMK0 MK0H_bit.no3 +#define DMAMK1 MK0H_bit.no4 +#define CSIMK00 MK0H_bit.no5 +#define IICMK00 MK0H_bit.no5 +#define STMK0 MK0H_bit.no5 +#define TMMK00 MK0H_bit.no6 +#define CSIMK01 MK0H_bit.no7 +#define IICMK01 MK0H_bit.no7 +#define SRMK0 MK0H_bit.no7 +#define SREMK0 MK1_bit.no0 +#define TMMK01H MK1_bit.no0 +#define TMMK03H MK1_bit.no3 +#define IICAMK0 MK1_bit.no4 +#define TMMK01 MK1_bit.no5 +#define TMMK02 MK1_bit.no6 +#define TMMK03 MK1_bit.no7 +#define ADMK MK1H_bit.no0 +#define RTCMK MK1H_bit.no1 +#define ITMK MK1H_bit.no2 +#define USBMK MK1H_bit.no4 +#define RSUMK MK1H_bit.no5 +#define WDTIPR0 PR00_bit.no0 +#define LVIPR0 PR00_bit.no1 +#define PPR00 PR00_bit.no2 +#define PPR01 PR00_bit.no3 +#define PPR02 PR00_bit.no4 +#define PPR03 PR00_bit.no5 +#define PPR04 PR00_bit.no6 +#define PPR05 PR00_bit.no7 +#define DMAPR00 PR00H_bit.no3 +#define DMAPR01 PR00H_bit.no4 +#define CSIPR000 PR00H_bit.no5 +#define IICPR000 PR00H_bit.no5 +#define STPR00 PR00H_bit.no5 +#define TMPR000 PR00H_bit.no6 +#define CSIPR001 PR00H_bit.no7 +#define IICPR001 PR00H_bit.no7 +#define SRPR00 PR00H_bit.no7 +#define SREPR00 PR01_bit.no0 +#define TMPR001H PR01_bit.no0 +#define TMPR003H PR01_bit.no3 +#define IICAPR00 PR01_bit.no4 +#define TMPR001 PR01_bit.no5 +#define TMPR002 PR01_bit.no6 +#define TMPR003 PR01_bit.no7 +#define ADPR0 PR01H_bit.no0 +#define RTCPR0 PR01H_bit.no1 +#define ITPR0 PR01H_bit.no2 +#define USBPR0 PR01H_bit.no4 +#define RSUPR0 PR01H_bit.no5 +#define WDTIPR1 PR10_bit.no0 +#define LVIPR1 PR10_bit.no1 +#define PPR10 PR10_bit.no2 +#define PPR11 PR10_bit.no3 +#define PPR12 PR10_bit.no4 +#define PPR13 PR10_bit.no5 +#define PPR14 PR10_bit.no6 +#define PPR15 PR10_bit.no7 +#define DMAPR10 PR10H_bit.no3 +#define DMAPR11 PR10H_bit.no4 +#define CSIPR100 PR10H_bit.no5 +#define IICPR100 PR10H_bit.no5 +#define STPR10 PR10H_bit.no5 +#define TMPR100 PR10H_bit.no6 +#define CSIPR101 PR10H_bit.no7 +#define IICPR101 PR10H_bit.no7 +#define SRPR10 PR10H_bit.no7 +#define SREPR10 PR11_bit.no0 +#define TMPR101H PR11_bit.no0 +#define TMPR103H PR11_bit.no3 +#define IICAPR10 PR11_bit.no4 +#define TMPR101 PR11_bit.no5 +#define TMPR102 PR11_bit.no6 +#define TMPR103 PR11_bit.no7 +#define ADPR1 PR11H_bit.no0 +#define RTCPR1 PR11H_bit.no1 +#define ITPR1 PR11H_bit.no2 +#define USBPR1 PR11H_bit.no4 +#define RSUPR1 PR11H_bit.no5 +#define MAA PMC_bit.no0 + +/* + Interrupt vector addresses + */ +#define RST_vect (0x0) +#define INTDBG_vect (0x2) +#define INTSRO_vect (0x4) +#define INTWDTI_vect (0x4) +#define INTLVI_vect (0x6) +#define INTP0_vect (0x8) +#define INTP1_vect (0xA) +#define INTP2_vect (0xC) +#define INTP3_vect (0xE) +#define INTP4_vect (0x10) +#define INTP5_vect (0x12) +#define INTDMA0_vect (0x1A) +#define INTDMA1_vect (0x1C) +#define INTCSI00_vect (0x1E) +#define INTIIC00_vect (0x1E) +#define INTST0_vect (0x1E) +#define INTTM00_vect (0x20) +#define INTCSI01_vect (0x22) +#define INTIIC01_vect (0x22) +#define INTSR0_vect (0x22) +#define INTSRE0_vect (0x24) +#define INTTM01H_vect (0x24) +#define INTTM03H_vect (0x2A) +#define INTIICA0_vect (0x2C) +#define INTTM01_vect (0x2E) +#define INTTM02_vect (0x30) +#define INTTM03_vect (0x32) +#define INTAD_vect (0x34) +#define INTRTC_vect (0x36) +#define INTIT_vect (0x38) +#define INTUSB_vect (0x3C) +#define INTRSUM_vect (0x3E) +#define INTP8_vect (0x4E) +#define INTP9_vect (0x50) +#define INTMD_vect (0x5E) +#define INTFL_vect (0x62) +#define BRK_I_vect (0x7E) +#endif diff --git a/FreeRTOS/Source/portable/IAR/RL78/port_iodefine_ext.h b/FreeRTOS/Source/portable/IAR/RL78/port_iodefine_ext.h new file mode 100644 index 000000000..621fc739f --- /dev/null +++ b/FreeRTOS/Source/portable/IAR/RL78/port_iodefine_ext.h @@ -0,0 +1,524 @@ +/***********************************************************************/ +/* */ +/* PROJECT NAME : RTOSDemo */ +/* FILE : iodefine_ext.h */ +/* DESCRIPTION : Definition of Extended SFRs */ +/* CPU SERIES : RL78 - G1C */ +/* CPU TYPE : R5F10JBC */ +/* */ +/* This file is generated by e2studio. */ +/* */ +/***********************************************************************/ + +/************************************************************************/ +/* Header file generated from device file: */ +/* DR5F10JBC.DVF */ +/* Copyright(C) 2012 Renesas */ +/* File Version V1.00 */ +/* Tool Version 1.9.7121 */ +/* Date Generated 13/11/2012 */ +/************************************************************************/ + +#ifndef __IOREG_BIT_STRUCTURES +#define __IOREG_BIT_STRUCTURES +typedef struct { + unsigned char no0 :1; + unsigned char no1 :1; + unsigned char no2 :1; + unsigned char no3 :1; + unsigned char no4 :1; + unsigned char no5 :1; + unsigned char no6 :1; + unsigned char no7 :1; +} __BITS8; + +typedef struct { + unsigned short no0 :1; + unsigned short no1 :1; + unsigned short no2 :1; + unsigned short no3 :1; + unsigned short no4 :1; + unsigned short no5 :1; + unsigned short no6 :1; + unsigned short no7 :1; + unsigned short no8 :1; + unsigned short no9 :1; + unsigned short no10 :1; + unsigned short no11 :1; + unsigned short no12 :1; + unsigned short no13 :1; + unsigned short no14 :1; + unsigned short no15 :1; +} __BITS16; + +#endif + +#ifndef IODEFINE_EXT_H +#define IODEFINE_EXT_H + +/* + IO Registers + */ +union un_adm2 { + unsigned char adm2; + __BITS8 BIT; +}; +union un_pms { + unsigned char pms; + __BITS8 BIT; +}; +union un_pu0 { + unsigned char pu0; + __BITS8 BIT; +}; +union un_pu1 { + unsigned char pu1; + __BITS8 BIT; +}; +union un_pu3 { + unsigned char pu3; + __BITS8 BIT; +}; +union un_pu4 { + unsigned char pu4; + __BITS8 BIT; +}; +union un_pu5 { + unsigned char pu5; + __BITS8 BIT; +}; +union un_pu7 { + unsigned char pu7; + __BITS8 BIT; +}; +union un_pu12 { + unsigned char pu12; + __BITS8 BIT; +}; +union un_pim0 { + unsigned char pim0; + __BITS8 BIT; +}; +union un_pim3 { + unsigned char pim3; + __BITS8 BIT; +}; +union un_pim5 { + unsigned char pim5; + __BITS8 BIT; +}; +union un_pom0 { + unsigned char pom0; + __BITS8 BIT; +}; +union un_pom3 { + unsigned char pom3; + __BITS8 BIT; +}; +union un_pom5 { + unsigned char pom5; + __BITS8 BIT; +}; +union un_pmc0 { + unsigned char pmc0; + __BITS8 BIT; +}; +union un_pmc12 { + unsigned char pmc12; + __BITS8 BIT; +}; +union un_nfen0 { + unsigned char nfen0; + __BITS8 BIT; +}; +union un_nfen1 { + unsigned char nfen1; + __BITS8 BIT; +}; +union un_isc { + unsigned char isc; + __BITS8 BIT; +}; +union un_dflctl { + unsigned char dflctl; + __BITS8 BIT; +}; +union un_bectl { + unsigned char bectl; + __BITS8 BIT; +}; +union un_fsse { + unsigned char fsse; + __BITS8 BIT; +}; +union un_pfs { + unsigned char pfs; + __BITS8 BIT; +}; +union un_mduc { + unsigned char mduc; + __BITS8 BIT; +}; +union un_per0 { + unsigned char per0; + __BITS8 BIT; +}; +union un_rmc { + unsigned char rmc; + __BITS8 BIT; +}; +union un_rpectl { + unsigned char rpectl; + __BITS8 BIT; +}; +union un_se0l { + unsigned char se0l; + __BITS8 BIT; +}; +union un_ss0l { + unsigned char ss0l; + __BITS8 BIT; +}; +union un_st0l { + unsigned char st0l; + __BITS8 BIT; +}; +union un_soe0l { + unsigned char soe0l; + __BITS8 BIT; +}; +union un_te0l { + unsigned char te0l; + __BITS8 BIT; +}; +union un_ts0l { + unsigned char ts0l; + __BITS8 BIT; +}; +union un_tt0l { + unsigned char tt0l; + __BITS8 BIT; +}; +union un_toe0l { + unsigned char toe0l; + __BITS8 BIT; +}; +union un_iicctl00 { + unsigned char iicctl00; + __BITS8 BIT; +}; +union un_iicctl01 { + unsigned char iicctl01; + __BITS8 BIT; +}; +union un_dscctl { + unsigned char dscctl; + __BITS8 BIT; +}; +union un_mckc { + unsigned char mckc; + __BITS8 BIT; +}; +union un_crc0ctl { + unsigned char crc0ctl; + __BITS8 BIT; +}; + +#define ADM2 (*(volatile union un_adm2 *)0xF0010).adm2 +#define ADM2_bit (*(volatile union un_adm2 *)0xF0010).BIT +#define ADUL (*(volatile unsigned char *)0xF0011) +#define ADLL (*(volatile unsigned char *)0xF0012) +#define ADTES (*(volatile unsigned char *)0xF0013) +#define PMS (*(volatile union un_pms *)0xF0018).pms +#define PMS_bit (*(volatile union un_pms *)0xF0018).BIT +#define PIOR (*(volatile unsigned char *)0xF001A) +#define PU0 (*(volatile union un_pu0 *)0xF0030).pu0 +#define PU0_bit (*(volatile union un_pu0 *)0xF0030).BIT +#define PU1 (*(volatile union un_pu1 *)0xF0031).pu1 +#define PU1_bit (*(volatile union un_pu1 *)0xF0031).BIT +#define PU3 (*(volatile union un_pu3 *)0xF0033).pu3 +#define PU3_bit (*(volatile union un_pu3 *)0xF0033).BIT +#define PU4 (*(volatile union un_pu4 *)0xF0034).pu4 +#define PU4_bit (*(volatile union un_pu4 *)0xF0034).BIT +#define PU5 (*(volatile union un_pu5 *)0xF0035).pu5 +#define PU5_bit (*(volatile union un_pu5 *)0xF0035).BIT +#define PU7 (*(volatile union un_pu7 *)0xF0037).pu7 +#define PU7_bit (*(volatile union un_pu7 *)0xF0037).BIT +#define PU12 (*(volatile union un_pu12 *)0xF003C).pu12 +#define PU12_bit (*(volatile union un_pu12 *)0xF003C).BIT +#define PIM0 (*(volatile union un_pim0 *)0xF0040).pim0 +#define PIM0_bit (*(volatile union un_pim0 *)0xF0040).BIT +#define PIM3 (*(volatile union un_pim3 *)0xF0043).pim3 +#define PIM3_bit (*(volatile union un_pim3 *)0xF0043).BIT +#define PIM5 (*(volatile union un_pim5 *)0xF0045).pim5 +#define PIM5_bit (*(volatile union un_pim5 *)0xF0045).BIT +#define POM0 (*(volatile union un_pom0 *)0xF0050).pom0 +#define POM0_bit (*(volatile union un_pom0 *)0xF0050).BIT +#define POM3 (*(volatile union un_pom3 *)0xF0053).pom3 +#define POM3_bit (*(volatile union un_pom3 *)0xF0053).BIT +#define POM5 (*(volatile union un_pom5 *)0xF0055).pom5 +#define POM5_bit (*(volatile union un_pom5 *)0xF0055).BIT +#define PMC0 (*(volatile union un_pmc0 *)0xF0060).pmc0 +#define PMC0_bit (*(volatile union un_pmc0 *)0xF0060).BIT +#define PMC12 (*(volatile union un_pmc12 *)0xF006C).pmc12 +#define PMC12_bit (*(volatile union un_pmc12 *)0xF006C).BIT +#define NFEN0 (*(volatile union un_nfen0 *)0xF0070).nfen0 +#define NFEN0_bit (*(volatile union un_nfen0 *)0xF0070).BIT +#define NFEN1 (*(volatile union un_nfen1 *)0xF0071).nfen1 +#define NFEN1_bit (*(volatile union un_nfen1 *)0xF0071).BIT +#define ISC (*(volatile union un_isc *)0xF0073).isc +#define ISC_bit (*(volatile union un_isc *)0xF0073).BIT +#define TIS0 (*(volatile unsigned char *)0xF0074) +#define ADPC (*(volatile unsigned char *)0xF0076) +#define IAWCTL (*(volatile unsigned char *)0xF0077) +#define PRDSEL (*(volatile unsigned short *)0xF007E) +#define TOOLEN (*(volatile unsigned char *)0xF0080) +#define BPAL0 (*(volatile unsigned char *)0xF0081) +#define BPAH0 (*(volatile unsigned char *)0xF0082) +#define BPAS0 (*(volatile unsigned char *)0xF0083) +#define BACDVL0 (*(volatile unsigned char *)0xF0084) +#define BACDVH0 (*(volatile unsigned char *)0xF0085) +#define BACDML0 (*(volatile unsigned char *)0xF0086) +#define BACDMH0 (*(volatile unsigned char *)0xF0087) +#define MONMOD (*(volatile unsigned char *)0xF0088) +#define DFLCTL (*(volatile union un_dflctl *)0xF0090).dflctl +#define DFLCTL_bit (*(volatile union un_dflctl *)0xF0090).BIT +#define HIOTRM (*(volatile unsigned char *)0xF00A0) +#define BECTL (*(volatile union un_bectl *)0xF00A1).bectl +#define BECTL_bit (*(volatile union un_bectl *)0xF00A1).BIT +#define HOCODIV (*(volatile unsigned char *)0xF00A8) +#define TEMPCAL0 (*(volatile unsigned char *)0xF00AC) +#define TEMPCAL1 (*(volatile unsigned char *)0xF00AD) +#define TEMPCAL2 (*(volatile unsigned char *)0xF00AE) +#define TEMPCAL3 (*(volatile unsigned char *)0xF00AF) +#define FLSEC (*(volatile unsigned short *)0xF00B0) +#define FLFSWS (*(volatile unsigned short *)0xF00B2) +#define FLFSWE (*(volatile unsigned short *)0xF00B4) +#define FSSET (*(volatile unsigned char *)0xF00B6) +#define FSSE (*(volatile union un_fsse *)0xF00B7).fsse +#define FSSE_bit (*(volatile union un_fsse *)0xF00B7).BIT +#define FLFADL (*(volatile unsigned short *)0xF00B8) +#define FLFADH (*(volatile unsigned char *)0xF00BA) +#define PFCMD (*(volatile unsigned char *)0xF00C0) +#define PFS (*(volatile union un_pfs *)0xF00C1).pfs +#define PFS_bit (*(volatile union un_pfs *)0xF00C1).BIT +#define FLRL (*(volatile unsigned short *)0xF00C2) +#define FLRH (*(volatile unsigned short *)0xF00C4) +#define FLWE (*(volatile unsigned char *)0xF00C6) +#define FLRE (*(volatile unsigned char *)0xF00C7) +#define FLTMS (*(volatile unsigned short *)0xF00C8) +#define DFLMC (*(volatile unsigned short *)0xF00CA) +#define FLMCL (*(volatile unsigned short *)0xF00CC) +#define FLMCH (*(volatile unsigned char *)0xF00CE) +#define FSCTL (*(volatile unsigned char *)0xF00CF) +#define ICEADR (*(volatile unsigned short *)0xF00D0) +#define ICEDAT (*(volatile unsigned short *)0xF00D2) +#define MDCL (*(volatile unsigned short *)0xF00E0) +#define MDCH (*(volatile unsigned short *)0xF00E2) +#define MDUC (*(volatile union un_mduc *)0xF00E8).mduc +#define MDUC_bit (*(volatile union un_mduc *)0xF00E8).BIT +#define PER0 (*(volatile union un_per0 *)0xF00F0).per0 +#define PER0_bit (*(volatile union un_per0 *)0xF00F0).BIT +#define OSMC (*(volatile unsigned char *)0xF00F3) +#define RMC (*(volatile union un_rmc *)0xF00F4).rmc +#define RMC_bit (*(volatile union un_rmc *)0xF00F4).BIT +#define RPECTL (*(volatile union un_rpectl *)0xF00F5).rpectl +#define RPECTL_bit (*(volatile union un_rpectl *)0xF00F5).BIT +#define BCDADJ (*(volatile unsigned char *)0xF00FE) +#define VECTCTRL (*(volatile unsigned char *)0xF00FF) +#define SSR00 (*(volatile unsigned short *)0xF0100) +#define SSR00L (*(volatile unsigned char *)0xF0100) +#define SSR01 (*(volatile unsigned short *)0xF0102) +#define SSR01L (*(volatile unsigned char *)0xF0102) +#define SIR00 (*(volatile unsigned short *)0xF0108) +#define SIR00L (*(volatile unsigned char *)0xF0108) +#define SIR01 (*(volatile unsigned short *)0xF010A) +#define SIR01L (*(volatile unsigned char *)0xF010A) +#define SMR00 (*(volatile unsigned short *)0xF0110) +#define SMR01 (*(volatile unsigned short *)0xF0112) +#define SCR00 (*(volatile unsigned short *)0xF0118) +#define SCR01 (*(volatile unsigned short *)0xF011A) +#define SE0 (*(volatile unsigned short *)0xF0120) +#define SE0L (*(volatile union un_se0l *)0xF0120).se0l +#define SE0L_bit (*(volatile union un_se0l *)0xF0120).BIT +#define SS0 (*(volatile unsigned short *)0xF0122) +#define SS0L (*(volatile union un_ss0l *)0xF0122).ss0l +#define SS0L_bit (*(volatile union un_ss0l *)0xF0122).BIT +#define ST0 (*(volatile unsigned short *)0xF0124) +#define ST0L (*(volatile union un_st0l *)0xF0124).st0l +#define ST0L_bit (*(volatile union un_st0l *)0xF0124).BIT +#define SPS0 (*(volatile unsigned short *)0xF0126) +#define SPS0L (*(volatile unsigned char *)0xF0126) +#define SO0 (*(volatile unsigned short *)0xF0128) +#define SOE0 (*(volatile unsigned short *)0xF012A) +#define SOE0L (*(volatile union un_soe0l *)0xF012A).soe0l +#define SOE0L_bit (*(volatile union un_soe0l *)0xF012A).BIT +#define EDR00 (*(volatile unsigned short *)0xF012C) +#define EDR00L (*(volatile unsigned char *)0xF012C) +#define EDR01 (*(volatile unsigned short *)0xF012E) +#define EDR01L (*(volatile unsigned char *)0xF012E) +#define SOL0 (*(volatile unsigned short *)0xF0134) +#define SOL0L (*(volatile unsigned char *)0xF0134) +#define SSC0 (*(volatile unsigned short *)0xF0138) +#define SSC0L (*(volatile unsigned char *)0xF0138) +#define TCR00 (*(volatile unsigned short *)0xF0180) +#define TCR01 (*(volatile unsigned short *)0xF0182) +#define TCR02 (*(volatile unsigned short *)0xF0184) +#define TCR03 (*(volatile unsigned short *)0xF0186) +#define TMR00 (*(volatile unsigned short *)0xF0190) +#define TMR01 (*(volatile unsigned short *)0xF0192) +#define TMR02 (*(volatile unsigned short *)0xF0194) +#define TMR03 (*(volatile unsigned short *)0xF0196) +#define TSR00 (*(volatile unsigned short *)0xF01A0) +#define TSR00L (*(volatile unsigned char *)0xF01A0) +#define TSR01 (*(volatile unsigned short *)0xF01A2) +#define TSR01L (*(volatile unsigned char *)0xF01A2) +#define TSR02 (*(volatile unsigned short *)0xF01A4) +#define TSR02L (*(volatile unsigned char *)0xF01A4) +#define TSR03 (*(volatile unsigned short *)0xF01A6) +#define TSR03L (*(volatile unsigned char *)0xF01A6) +#define TE0 (*(volatile unsigned short *)0xF01B0) +#define TE0L (*(volatile union un_te0l *)0xF01B0).te0l +#define TE0L_bit (*(volatile union un_te0l *)0xF01B0).BIT +#define TS0 (*(volatile unsigned short *)0xF01B2) +#define TS0L (*(volatile union un_ts0l *)0xF01B2).ts0l +#define TS0L_bit (*(volatile union un_ts0l *)0xF01B2).BIT +#define TT0 (*(volatile unsigned short *)0xF01B4) +#define TT0L (*(volatile union un_tt0l *)0xF01B4).tt0l +#define TT0L_bit (*(volatile union un_tt0l *)0xF01B4).BIT +#define TPS0 (*(volatile unsigned short *)0xF01B6) +#define TO0 (*(volatile unsigned short *)0xF01B8) +#define TO0L (*(volatile unsigned char *)0xF01B8) +#define TOE0 (*(volatile unsigned short *)0xF01BA) +#define TOE0L (*(volatile union un_toe0l *)0xF01BA).toe0l +#define TOE0L_bit (*(volatile union un_toe0l *)0xF01BA).BIT +#define TOL0 (*(volatile unsigned short *)0xF01BC) +#define TOL0L (*(volatile unsigned char *)0xF01BC) +#define TOM0 (*(volatile unsigned short *)0xF01BE) +#define TOM0L (*(volatile unsigned char *)0xF01BE) +#define IICCTL00 (*(volatile union un_iicctl00 *)0xF0230).iicctl00 +#define IICCTL00_bit (*(volatile union un_iicctl00 *)0xF0230).BIT +#define IICCTL01 (*(volatile union un_iicctl01 *)0xF0231).iicctl01 +#define IICCTL01_bit (*(volatile union un_iicctl01 *)0xF0231).BIT +#define IICWL0 (*(volatile unsigned char *)0xF0232) +#define IICWH0 (*(volatile unsigned char *)0xF0233) +#define SVA0 (*(volatile unsigned char *)0xF0234) +#define IICSE0 (*(volatile unsigned char *)0xF0235) +#define DSCCTL (*(volatile union un_dscctl *)0xF02E5).dscctl +#define DSCCTL_bit (*(volatile union un_dscctl *)0xF02E5).BIT +#define MCKC (*(volatile union un_mckc *)0xF02E6).mckc +#define MCKC_bit (*(volatile union un_mckc *)0xF02E6).BIT +#define CRC0CTL (*(volatile union un_crc0ctl *)0xF02F0).crc0ctl +#define CRC0CTL_bit (*(volatile union un_crc0ctl *)0xF02F0).BIT +#define PGCRCL (*(volatile unsigned short *)0xF02F2) +#define CRCD (*(volatile unsigned short *)0xF02FA) +#define SYSCFG (*(volatile unsigned short *)0xF0400) +#define SYSCFG1 (*(volatile unsigned short *)0xF0402) +#define SYSSTS0 (*(volatile unsigned short *)0xF0404) +#define SYSSTS1 (*(volatile unsigned short *)0xF0406) +#define DVSTCTR0 (*(volatile unsigned short *)0xF0408) +#define DVSTCTR1 (*(volatile unsigned short *)0xF040A) +#define DMA0PCFG (*(volatile unsigned short *)0xF0410) +#define DMA1PCFG (*(volatile unsigned short *)0xF0412) +#define CFIFOM (*(volatile unsigned short *)0xF0414) +#define CFIFOML (*(volatile unsigned char *)0xF0414) +#define D0FIFOM (*(volatile unsigned short *)0xF0418) +#define D0FIFOML (*(volatile unsigned char *)0xF0418) +#define D1FIFOM (*(volatile unsigned short *)0xF041C) +#define D1FIFOML (*(volatile unsigned char *)0xF041C) +#define CFIFOSEL (*(volatile unsigned short *)0xF0420) +#define CFIFOCTR (*(volatile unsigned short *)0xF0422) +#define D0FIFOSEL (*(volatile unsigned short *)0xF0428) +#define D0FIFOCTR (*(volatile unsigned short *)0xF042A) +#define D1FIFOSEL (*(volatile unsigned short *)0xF042C) +#define D1FIFOCTR (*(volatile unsigned short *)0xF042E) +#define INTENB0 (*(volatile unsigned short *)0xF0430) +#define INTENB1 (*(volatile unsigned short *)0xF0432) +#define INTENB2 (*(volatile unsigned short *)0xF0434) +#define BRDYENB (*(volatile unsigned short *)0xF0436) +#define NRDYENB (*(volatile unsigned short *)0xF0438) +#define BEMPENB (*(volatile unsigned short *)0xF043A) +#define SOFCFG (*(volatile unsigned short *)0xF043C) +#define INTSTS0 (*(volatile unsigned short *)0xF0440) +#define INTSTS1 (*(volatile unsigned short *)0xF0442) +#define INTSTS2 (*(volatile unsigned short *)0xF0444) +#define BRDYSTS (*(volatile unsigned short *)0xF0446) +#define NRDYSTS (*(volatile unsigned short *)0xF0448) +#define BEMPSTS (*(volatile unsigned short *)0xF044A) +#define FRMNUM (*(volatile unsigned short *)0xF044C) +#define USBADDR (*(volatile unsigned short *)0xF0450) +#define USBREQ (*(volatile unsigned short *)0xF0454) +#define USBVAL (*(volatile unsigned short *)0xF0456) +#define USBINDX (*(volatile unsigned short *)0xF0458) +#define USBLENG (*(volatile unsigned short *)0xF045A) +#define DCPCFG (*(volatile unsigned short *)0xF045C) +#define DCPMAXP (*(volatile unsigned short *)0xF045E) +#define DCPCTR (*(volatile unsigned short *)0xF0460) +#define PIPESEL (*(volatile unsigned short *)0xF0464) +#define PIPECFG (*(volatile unsigned short *)0xF0468) +#define PIPEMAXP (*(volatile unsigned short *)0xF046C) +#define PIPEPERI (*(volatile unsigned short *)0xF046E) +#define PIPE4CTR (*(volatile unsigned short *)0xF0476) +#define PIPE5CTR (*(volatile unsigned short *)0xF0478) +#define PIPE6CTR (*(volatile unsigned short *)0xF047A) +#define PIPE7CTR (*(volatile unsigned short *)0xF047C) +#define PIPE4TRE (*(volatile unsigned short *)0xF049C) +#define PIPE4TRN (*(volatile unsigned short *)0xF049E) +#define PIPE5TRE (*(volatile unsigned short *)0xF04A0) +#define PIPE5TRN (*(volatile unsigned short *)0xF04A2) +#define USBBCCTRL0 (*(volatile unsigned short *)0xF04B0) +#define USBBCCTRL1 (*(volatile unsigned short *)0xF04B4) +#define USBBCOPT0 (*(volatile unsigned short *)0xF04B8) +#define USBBCOPT1 (*(volatile unsigned short *)0xF04BC) +#define USBMC (*(volatile unsigned short *)0xF04CC) +#define DEVADD0 (*(volatile unsigned short *)0xF04D0) +#define DEVADD1 (*(volatile unsigned short *)0xF04D2) +#define DEVADD2 (*(volatile unsigned short *)0xF04D4) +#define DEVADD3 (*(volatile unsigned short *)0xF04D6) +#define DEVADD4 (*(volatile unsigned short *)0xF04D8) +#define DEVADD5 (*(volatile unsigned short *)0xF04DA) + +/* + Sfr bits + */ +#define ADTYP ADM2_bit.no0 +#define AWC ADM2_bit.no2 +#define ADRCK ADM2_bit.no3 +#define DFLEN DFLCTL_bit.no0 +#define BRSAM BECTL_bit.no0 +#define ESQST FSSE_bit.no7 +#define DIVST MDUC_bit.no0 +#define MACSF MDUC_bit.no1 +#define MACOF MDUC_bit.no2 +#define MDSM MDUC_bit.no3 +#define MACMODE MDUC_bit.no6 +#define DIVMODE MDUC_bit.no7 +#define TAU0EN PER0_bit.no0 +#define SAU0EN PER0_bit.no2 +#define IICA0EN PER0_bit.no4 +#define ADCEN PER0_bit.no5 +#define RTCEN PER0_bit.no7 +#define PAENB RMC_bit.no0 +#define WDVOL RMC_bit.no7 +#define RPEF RPECTL_bit.no0 +#define RPERDIS RPECTL_bit.no7 +#define SPT0 IICCTL00_bit.no0 +#define STT0 IICCTL00_bit.no1 +#define ACKE0 IICCTL00_bit.no2 +#define WTIM0 IICCTL00_bit.no3 +#define SPIE0 IICCTL00_bit.no4 +#define WREL0 IICCTL00_bit.no5 +#define LREL0 IICCTL00_bit.no6 +#define IICE0 IICCTL00_bit.no7 +#define PRS0 IICCTL01_bit.no0 +#define DFC0 IICCTL01_bit.no2 +#define SMC0 IICCTL01_bit.no3 +#define DAD0 IICCTL01_bit.no4 +#define CLD0 IICCTL01_bit.no5 +#define WUP0 IICCTL01_bit.no7 +#define CRC0EN CRC0CTL_bit.no7 + +/* + Interrupt vector addresses + */ +#endif diff --git a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 index 8920d2141..4ffc81ee9 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 +++ b/FreeRTOS/Source/portable/IAR/RL78/portasm.s87 @@ -1,6 +1,6 @@ ;/* ; FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd. -; +; ; ; *************************************************************************** ; * * @@ -72,7 +72,7 @@ vPortYield: portRESTORE_CONTEXT ; Restore the context of the next task to run. retb - + ; Starts the scheduler by restoring the context of the task that will execute ; first. RSEG CODE:CODE diff --git a/FreeRTOS/Source/portable/IAR/RL78/portmacro.h b/FreeRTOS/Source/portable/IAR/RL78/portmacro.h index a5682bdd4..e8d716ca6 100644 --- a/FreeRTOS/Source/portable/IAR/RL78/portmacro.h +++ b/FreeRTOS/Source/portable/IAR/RL78/portmacro.h @@ -75,9 +75,6 @@ #ifndef PORTMACRO_H #define PORTMACRO_H -#include "port_iodefine.h" -#include "port_iodefine_ext.h" - #ifdef __cplusplus extern "C" { #endif @@ -99,7 +96,7 @@ extern "C" { #if __DATA_MODEL__ == __DATA_MODEL_NEAR__ && __CODE_MODEL__ == __CODE_MODEL_FAR__ #warning This port has not been tested with your selected memory model combination. If a far code model is required it is recommended to also use a far data model. #endif - + /* Type definitions. */ #define portCHAR char @@ -116,7 +113,7 @@ extern "C" { #define portPOINTER_SIZE_TYPE unsigned short #endif - + #if ( configUSE_16_BIT_TICKS == 1 ) typedef unsigned int portTickType; #define portMAX_DELAY ( portTickType ) 0xffff @@ -124,7 +121,7 @@ extern "C" { typedef unsigned long portTickType; #define portMAX_DELAY ( portTickType ) 0xffffffff #endif -/*-----------------------------------------------------------*/ +/*-----------------------------------------------------------*/ /* Interrupt control macros. */ #define portDISABLE_INTERRUPTS() __asm ( "DI" ) @@ -174,7 +171,7 @@ extern volatile unsigned short usCriticalNesting; \ /* Hardwware specifics. */ #define portBYTE_ALIGNMENT 2 #define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) +#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) /*-----------------------------------------------------------*/ /* Task function macros as described on the FreeRTOS.org WEB site. */