From: Bin Meng Date: Wed, 17 Jun 2015 03:15:39 +0000 (+0800) Subject: x86: crownbay: Add MP initialization X-Git-Tag: v2015.10-rc1~190^2~41 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=990acd0d5165c3ca36716e01c5c182423bdfc16a;p=u-boot x86: crownbay: Add MP initialization Intel Crown Bay board has a TunnelCreek processor which supports hyper-threading. Add /cpus node in the crownbay.dts and enable the MP initialization. Signed-off-by: Bin Meng Acked-by: Simon Glass Signed-off-by: Simon Glass (modified to remove error: overriding the value of OF_CONTROL. Old value: "y", new value: "y") --- diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts index d68efda8df..1ec90cda18 100644 --- a/arch/x86/dts/crownbay.dts +++ b/arch/x86/dts/crownbay.dts @@ -23,6 +23,26 @@ silent_console = <0>; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <0>; + intel,apic-id = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "cpu-x86"; + reg = <1>; + intel,apic-id = <1>; + }; + + }; + gpioa { compatible = "intel,ich6-gpio"; u-boot,dm-pre-reloc; diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index f3fb206b0e..93f921638d 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -2,7 +2,10 @@ CONFIG_X86=y CONFIG_VENDOR_INTEL=y CONFIG_DEFAULT_DEVICE_TREE="crownbay" CONFIG_TARGET_CROWNBAY=y +CONFIG_SMP=y +CONFIG_MAX_CPUS=2 CONFIG_GENERATE_PIRQ_TABLE=y +CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set @@ -11,6 +14,7 @@ CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y +CONFIG_CPU=y CONFIG_SPI_FLASH=y CONFIG_USE_PRIVATE_LIBGCC=y CONFIG_SYS_VSNPRINTF=y