From: Santan Kumar Date: Thu, 13 Apr 2017 10:01:09 +0000 (+0530) Subject: armv8: ls2080ardb: Add phy number for serdes1 protocol 0x4b X-Git-Tag: v2017.05-rc3~56^2~8 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=99fe76d02313473f97892eab3e6fa564f1acfea4;p=u-boot armv8: ls2080ardb: Add phy number for serdes1 protocol 0x4b Signed-off-by: Santan Kumar Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c index 799799c251..ba584c8a76 100644 --- a/board/freescale/ls2080ardb/eth_ls2080rdb.c +++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c @@ -61,6 +61,13 @@ int board_eth_init(bd_t *bis) wriop_set_phy_address(WRIOP1_DPMAC7, AQ_PHY_ADDR3); wriop_set_phy_address(WRIOP1_DPMAC8, AQ_PHY_ADDR4); + break; + case 0x4B: + wriop_set_phy_address(WRIOP1_DPMAC1, CORTINA_PHY_ADDR1); + wriop_set_phy_address(WRIOP1_DPMAC2, CORTINA_PHY_ADDR2); + wriop_set_phy_address(WRIOP1_DPMAC3, CORTINA_PHY_ADDR3); + wriop_set_phy_address(WRIOP1_DPMAC4, CORTINA_PHY_ADDR4); + break; default: printf("SerDes1 protocol 0x%x is not supported on LS2080aRDB\n",