From: Jerry Huang <Changm-Ming.Huang@freescale.com>
Date: Thu, 25 Nov 2010 17:06:10 +0000 (+0000)
Subject: fsl_esdhc: Fix max clock frequency
X-Git-Tag: v2010.12~2^2~1
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9a4d50e34dde4d03f9c7c595f548d8c214d98eb7;p=u-boot

fsl_esdhc: Fix max clock frequency

The max clock of MMC is 52MHz

Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 73d5cd3826..7bab2f66d7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -477,7 +477,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
 	mmc->f_min = 400000;
-	mmc->f_max = MIN(gd->sdhc_clk, 50000000);
+	mmc->f_max = MIN(gd->sdhc_clk, 52000000);
 
 	mmc_register(mmc);