From: Bill Kendrick Date: Fri, 18 Jan 2019 07:53:53 +0000 (-0800) Subject: Cleaned up _pia.h register stuff a bit X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9a83284b7b5236dcb113c28fbd0c1b6d2db1349f;p=cc65 Cleaned up _pia.h register stuff a bit Most documentation say that most of the bits are normally set to 1 or 0, so just mentioning that in the comments. A.N.A.L.O.G. issue 59 (April 1988) "Bits & Pieces" column, "Atari Zucchini" (https://www.atarimagazines.com/analog/issue59/bits_pieces.php) implies that they are used for specific things, but it's not clear enough to be useful (or specifically states "Too complex and not pertinent"). This is probably sufficient for most purposes; if any PIA / PACTL/PBCTL experts pop up, they can tell us exactly how those 4 bits can be utilized. --- diff --git a/include/_pia.h b/include/_pia.h index 51426cc80..8c9fa01f1 100644 --- a/include/_pia.h +++ b/include/_pia.h @@ -4,14 +4,14 @@ /* */ /* Internal include file, do not use directly */ /* */ -/* The Peripheral Interface Adapter (PIA) chip provides parallel I/O */ -/* interfacing; it was used in Atari 400/800 and Commodore PET family of */ -/* computers, for joystick and interrupts. */ +/* The Peripheral Interface Adapter (PIA) chip (a 6520 or 6820) provides */ +/* parallel I/O interfacing; it was used in Atari 400/800 and Commodore PET */ +/* family of computers, for joystick and some interrupts. */ /* Sources; various + Wikpedia article on "Peripheral Interface Adapter". */ /* */ /* */ /* (C) 2000 Freddy Offenga */ -/* 2019-01-16: Bill Kendrick : Defines for registers */ +/* 2019-01-17: Bill Kendrick : Defines for registers */ /* */ /* */ /* This software is provided 'as-is', without any expressed or implied */ @@ -121,41 +121,45 @@ struct __pia { /* PACTL and PBCTL register bits */ /*****************************************************************************/ -/* (W) Peripheral A interrupt (IRQ) enable. +/* (W) Peripheral PA1/PB1 interrupt (IRQ) ("peripheral proceed line available") enable. ** One equals enable. Set by the OS but available to the user; reset on powerup. +** (PxCTL_IRQ_STATUS (R) bit will get set upon interrupt occurance) */ -#define PxCTL_IRQ_ENABLE 0x01 +#define PxCTL_IRQ_ENABLE 0x01 /* bit 0 */ -/* "Set to zero" */ -#define PxCTL_BIT1 0x02 +/* Note: Bit 1 is always set to */ -/* (W) Controls PORTA addressing -** One equals PORTA register; zero equals direction control register +/* (W) Controls PORTA/PORTB addressing +** 1 = PORTA/PORTB register; read/write to controller port +** 0 = direction control register; write to direction controls +** (allows setting data flow; write 0s & 1s to PORTA/PORTB bits +** to set which port's pins are read (input), or write (output), +** respectively) */ -#define PxCTL_ADDRESSING 0x04 +#define PxCTL_ADDRESSING 0x04 /* bit 2 */ -#define PxCTL_BIT4 0x10 /* "Set to one" */ -#define PxCTL_BIT5 0x20 /* "Set to one" */ -#define PxCTL_BIT6 0x40 /* "Set to zero" */ - -/* Peripheral interrupt (IRQ) status bit. -** Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB. +/* (W) Peripheral motor control line; Turn the cassette on or off +** (PACTL-specific register bit) +** 0 = on +** 1 = off */ -#define PxCTL_IRQ_STATUS 0x80 - +#define PACTL_MOTOR_CONTROL 0x08 /* bit 3 */ -/* PACTL-specific register bit */ - -/* (W) Peripheral motor control line -** Turn the cassette on or off; zero equals on) +/* Peripheral command identification (serial bus command line) +** (PBCTL-specific register bit) */ -#define PACTL_MOTOR_CONTROL 0x08 +#define PBCTL_PERIPH_CMD_IDENT 0x08 /* bit 3 */ +/* Note: Bits 4 & 5 are always set to 1 */ -/* PBCTL-specific register bit */ +/* Note: Bit 6 is always set to 0 */ -/* Peripheral command identification (serial bus command) */ -#define PBCTL_PERIPH_CMD_IDENT 0x08 +/* (R) Peripheral interrupt (IRQ) status bit. +** Set by Peripherals (PORTA / PORTB). Reset by reading from PORTA / PORTB. +** PACTL's is interrupt status of PROCEED +** PBCTL's is interrupt status of SIO +*/ +#define PxCTL_IRQ_STATUS 0x80 /* End of _pia.h */