From: Andreas Färber <afaerber@suse.de>
Date: Sun, 10 May 2015 12:45:32 +0000 (+0200)
Subject: tcl/target: Add config for XMOS XS1-XAU8A-10's ARM core
X-Git-Tag: v0.10.0-rc1~429
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9af662f95dff4346c95e9affef817c9234454aac;p=openocd

tcl/target: Add config for XMOS XS1-XAU8A-10's ARM core

The XS1-XAU8A-10 has 8 xCORE cores and one ARM core.
This config represents the ARM Cortex-M3 core, which is apparently
Silicon Labs EFM32 Giant Gecko IP.

Change-Id: I998360f096c759d2e274d96c1ca2e0450ba61146
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2762
Tested-by: jenkins
Reviewed-by: Oleksij Rempel
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
---

diff --git a/tcl/target/xmos_xs1-xau8a-10_arm.cfg b/tcl/target/xmos_xs1-xau8a-10_arm.cfg
new file mode 100644
index 00000000..3fc197a3
--- /dev/null
+++ b/tcl/target/xmos_xs1-xau8a-10_arm.cfg
@@ -0,0 +1,16 @@
+#
+# XMOS xCORE-XA XS1-XAU8A-10: ARM Cortex-M3 @ 48 MHz
+#
+# http://www.xmos.com/products/silicon/xcore-xa/xa-series
+#
+
+if { ![info exists CHIPNAME] } {
+	set CHIPNAME xcorexa
+}
+
+if { ![info exists WORKAREASIZE] } {
+	# XS1-XAU8A-10-FB265: 128 KB SRAM
+	set WORKAREASIZE 0x20000
+}
+
+source [find target/efm32.cfg]