From: Uwe Bonnes Date: Mon, 14 Nov 2016 18:12:38 +0000 (+0100) Subject: stm32lx.c: Read IDcode at appropriate address. X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9bbe299b35be0e086fdafb9c44669b1c36f935f9;p=openocd stm32lx.c: Read IDcode at appropriate address. Trying to read the L0 idcode at the L1 idcode address 0xE0042000 often resulted in an uncatched error. Reading at the right L0 address 0x40015800 afterwards results in reading 0. So access to the device is denied.. Change-Id: I6de92cf99a5d5d46c72f9ba055613cbc5753a951 Signed-off-by: Uwe Bonnes Reviewed-on: http://openocd.zylin.com/3883 Tested-by: jenkins Reviewed-by: Spencer Oliver --- diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index 0c2fddc9..fdfaad4c 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -726,16 +726,13 @@ reset_pg_and_lock: static int stm32lx_read_id_code(struct target *target, uint32_t *id) { - /* read stm32 device id register */ - int retval = target_read_u32(target, DBGMCU_IDCODE, id); - if (retval != ERROR_OK) - return retval; - - /* STM32L0 parts will have 0 there, try reading the L0's location for - * DBG_IDCODE in case this is an L0 part. */ - if (*id == 0) + struct armv7m_common *armv7m = target_to_armv7m(target); + int retval; + if (armv7m->arm.is_armv6m == true) retval = target_read_u32(target, DBGMCU_IDCODE_L0, id); - + else + /* read stm32 device id register */ + retval = target_read_u32(target, DBGMCU_IDCODE, id); return retval; }