From: Guenter Roeck Date: Sat, 28 Apr 2018 14:42:27 +0000 (-0700) Subject: Add support for Stoney Ridge and Bristol Ridge CPUs X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9be82d246958ee3049ca8eea7d0304217d6829f4;p=groeck-k10temp Add support for Stoney Ridge and Bristol Ridge CPUs Add support for Stoney Ridge and Bristol Ridge (Family 15h model 0x70) CPUs. Registers match those of Family 15h model 0x60. Signed-off-by: Guenter Roeck --- diff --git a/k10temp.c b/k10temp.c index ae51218..746ca82 100644 --- a/k10temp.c +++ b/k10temp.c @@ -37,6 +37,10 @@ MODULE_PARM_DESC(force, "force loading on processors with erratum 319"); /* Provide lock for writing to NB_SMU_IND_ADDR */ static DEFINE_MUTEX(nb_smu_ind_mutex); +#ifndef PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 +#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F3 0x15b3 +#endif + #ifndef PCI_DEVICE_ID_AMD_17H_DF_F3 #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463 #endif @@ -362,6 +366,7 @@ static const struct pci_device_id k10temp_id_table[] = { { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F3) }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F3) }, { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },