From: IrgendwerA8 Date: Thu, 24 May 2018 09:31:43 +0000 (+0200) Subject: Changed naming absvaludiv -> absvaludiv16. X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9c1cb0801c79e7a87f6b17a667b304624b896e9d;p=cc65 Changed naming absvaludiv -> absvaludiv16. --- diff --git a/libsrc/runtime/absvaludiv.s b/libsrc/runtime/absvaludiv.s index d23b8c00e..59c2914b1 100644 --- a/libsrc/runtime/absvaludiv.s +++ b/libsrc/runtime/absvaludiv.s @@ -6,12 +6,12 @@ ; When negating values, we will ignore the possibility here, that one of the ; values is $8000, in which case the negate will fail. - .export absvaludiv + .export absvaludiv16 .import _abs, popax, udiv16 .importzp ptr1, ptr4 -absvaludiv: +absvaludiv16: jsr _abs sta ptr4 stx ptr4+1 ; Save right absolute operand diff --git a/libsrc/runtime/div.s b/libsrc/runtime/div.s index 54da0c7e4..b33d852db 100644 --- a/libsrc/runtime/div.s +++ b/libsrc/runtime/div.s @@ -8,7 +8,7 @@ ; values is $8000, in which case the negate will fail. .export tosdiva0, tosdivax - .import absvaludiv, negax + .import absvaludiv16, negax .importzp sp, ptr1, tmp1 tosdiva0: @@ -20,10 +20,10 @@ tosdivax: eor (sp),y ; eor with lhs high byte sta tmp1 ; save post negation indicator to tmp1 pla ; back to entry accu - jsr absvaludiv + jsr absvaludiv16 ldx ptr1+1 lda ptr1 - ldy tmp1 ; fetch idicator + ldy tmp1 ; fetch indicator bmi negate rts negate: jmp negax diff --git a/libsrc/runtime/mod.s b/libsrc/runtime/mod.s index b3a818fda..eb120377b 100644 --- a/libsrc/runtime/mod.s +++ b/libsrc/runtime/mod.s @@ -8,7 +8,7 @@ ; values is $8000, in which case the negate will fail. .export tosmoda0, tosmodax - .import absvaludiv, negax + .import absvaludiv16, negax .importzp sp, sreg, tmp1 tosmoda0: @@ -23,10 +23,10 @@ tosmodax: lda (sp),y sta tmp1 ; save post negation indicator to tmp1 pla ; back to entry accu - jsr absvaludiv + jsr absvaludiv16 ldx sreg+1 ; remainder to return registers lda sreg - ldy tmp1 ; fetch idicator + ldy tmp1 ; fetch indicator bmi negate rts negate: jmp negax