From: Fabio Estevam Date: Fri, 1 Aug 2014 11:50:02 +0000 (-0300) Subject: mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED X-Git-Tag: v2014.10-rc2~52^2~26 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9cd744ff117bae59c6ced331170ee44e9ab10ccd;p=u-boot mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of register CCM_CIMR corresponds to bit 19 so fix its definition accordingly. Signed-off-by: Fabio Estevam --- diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index e1cdcec8f5..9a7fb34f03 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -469,7 +469,7 @@ struct mxc_ccm_reg { #define MXC_CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED (1 << 22) #define MXC_CCM_CIMR_MASK_MMDC_CH1_PODF_LOADED (1 << 21) #define MXC_CCM_CIMR_MASK_AHB_PODF_LOADED (1 << 20) -#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED (1 << 22) +#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED (1 << 19) #define MXC_CCM_CIMR_MASK_AXI_PODF_LOADED (1 << 17) #define MXC_CCM_CIMR_MASK_COSC_READY (1 << 6) #define MXC_CCM_CIMR_MASK_LRF_PLL 1