From: Dinh Nguyen <dinguyen@opensource.altera.com>
Date: Mon, 30 Mar 2015 22:01:10 +0000 (-0500)
Subject: arm: socfpga: spl: Use common lowlevel_init
X-Git-Tag: v2015.07-rc1~61^2~12
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=9cfafc7551ff280fbbac50754c6941ca79675e7b;p=u-boot

arm: socfpga: spl: Use common lowlevel_init

For SoCFGPA, use the common ARMv7 lowlevel_init. Thus, we can delete the
SoCFPGA lowlevel_init.S file.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 21fc03b97e..e6249f13c8 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -12,7 +12,7 @@ obj-y	+= cache_v7.o
 obj-y	+= cpu.o cp15.o
 obj-y	+= syslib.o
 
-ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI),)
+ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_SOCFPGA),)
 ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
 obj-y	+= lowlevel_init.o
 endif
diff --git a/arch/arm/cpu/armv7/socfpga/Makefile b/arch/arm/cpu/armv7/socfpga/Makefile
index 8b6e108c42..7524ef90e4 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -7,7 +7,6 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y	:= lowlevel_init.o
 obj-y	+= misc.o timer.o reset_manager.o system_manager.o clock_manager.o \
 	   fpga_manager.o
 obj-$(CONFIG_SPL_BUILD) += spl.o freeze_controller.o scan_manager.o
diff --git a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S b/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
deleted file mode 100644
index b4d0627871..0000000000
--- a/arch/arm/cpu/armv7/socfpga/lowlevel_init.S
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#include <config.h>
-
-/* Set up the platform, once the cpu has been initialized */
-.globl lowlevel_init
-lowlevel_init:
-
-	/* Remap */
-#ifdef CONFIG_SPL_BUILD
-	/*
-	 * SPL : configure the remap (L3 NIC-301 GPV)
-	 * so the on-chip RAM at lower memory instead ROM.
-	 */
-	ldr	r0, =SOCFPGA_L3REGS_ADDRESS
-	mov	r1, #0x19
-	str	r1, [r0]
-#else
-	/*
-	 * U-Boot : configure the remap (L3 NIC-301 GPV)
-	 * so the SDRAM at lower memory instead on-chip RAM.
-	 */
-	ldr	r0, =SOCFPGA_L3REGS_ADDRESS
-	mov	r1, #0x2
-	str	r1, [r0]
-
-	/* Private components security */
-
-	/*
-	 * U-Boot : configure private timer, global timer and cpu
-	 * component access as non secure for kernel stage (as required
-	 * by kernel)
-	 */
-	mrc	p15,4,r0,c15,c0,0
-	add	r1, r0, #0x54
-	ldr	r2, [r1]
-	orr	r2, r2, #0xff
-	orr	r2, r2, #0xf00
-	str	r2, [r1]
-#endif	/* #ifdef CONFIG_SPL_BUILD */
-	mov	pc, lr