From: Michal Simek Date: Wed, 16 Jul 2014 08:47:43 +0000 (+0200) Subject: fpga: xilinx: virtex2: Fix macro indentation X-Git-Tag: v2015.04-rc1~66^2~4 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a3607365f78ce79f8592e3acb4a04ab4d4ac8f36;p=u-boot fpga: xilinx: virtex2: Fix macro indentation No functional changes. Signed-off-by: Michal Simek --- diff --git a/include/virtex2.h b/include/virtex2.h index 5944bbcb61..503df9abae 100644 --- a/include/virtex2.h +++ b/include/virtex2.h @@ -47,10 +47,10 @@ extern struct xilinx_fpga_op virtex2_op; /* Device Image Sizes (in bytes) *********************************************************************/ -#define XILINX_XC2V40_SIZE (338208 / 8) -#define XILINX_XC2V80_SIZE (597408 / 8) -#define XILINX_XC2V250_SIZE (1591584 / 8) -#define XILINX_XC2V500_SIZE (2557857 / 8) +#define XILINX_XC2V40_SIZE (338208 / 8) +#define XILINX_XC2V80_SIZE (597408 / 8) +#define XILINX_XC2V250_SIZE (1591584 / 8) +#define XILINX_XC2V500_SIZE (2557857 / 8) #define XILINX_XC2V1000_SIZE (3749408 / 8) #define XILINX_XC2V1500_SIZE (5166240 / 8) #define XILINX_XC2V2000_SIZE (6808352 / 8)