From: Breno Lima Date: Wed, 2 Aug 2017 17:03:49 +0000 (-0300) Subject: mx6sabresd: Fix IOMUXC_GPR6 and IOMUXC_GPR7 values X-Git-Tag: v2017.09-rc3~74^2~10 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a500a3311529ca79cfd51f1e223e77a94c78fbf1;p=u-boot mx6sabresd: Fix IOMUXC_GPR6 and IOMUXC_GPR7 values The IPU AXI QoS for the i.MX6QP and i.MX6DP processors have to be set as commented in the code: /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ Set IOMUXC_GPR6 and IOMUXC_GPR7 to 0x77177717 instead of 0x007F007F. Signed-off-by: Breno Lima --- diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index e4160420fa..5329c3b4bd 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -755,8 +755,8 @@ static void gpr_init(void) writel(0xF00000CF, &iomux->gpr[4]); if (is_mx6dqp()) { /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */ - writel(0x007F007F, &iomux->gpr[6]); - writel(0x007F007F, &iomux->gpr[7]); + writel(0x77177717, &iomux->gpr[6]); + writel(0x77177717, &iomux->gpr[7]); } else { /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ writel(0x007F007F, &iomux->gpr[6]);