From: Sven Oliver Moll <svolli@svolli.de>
Date: Wed, 7 Sep 2016 17:49:21 +0000 (+0200)
Subject: added forgotten testcase for testing cpu based conditional assembling
X-Git-Tag: V2.16~66^2~4
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a5772f7dc33b10a5551e49127277ae0012392261;p=cc65

added forgotten testcase for testing cpu based conditional assembling
---

diff --git a/test/assembler/cpudetect.s b/test/assembler/cpudetect.s
new file mode 100644
index 000000000..adad7c1dc
--- /dev/null
+++ b/test/assembler/cpudetect.s
@@ -0,0 +1,66 @@
+
+.macpack cpu
+
+; step 1: try to assemble an instruction that's exclusive to this set
+;         (when possible)
+
+.ifp02
+   lda #$ea
+.endif
+
+.ifpsc02
+   jmp ($1234,x)
+.endif
+
+.ifpc02
+   rmb0 $12
+.endif
+
+.ifp816
+   xba
+.endif
+
+.ifp4510
+   taz
+.endif
+
+
+; step 2: check for bitwise compatibility of instructions sets
+;         (made verbose for better reading with hexdump/hd(1))
+
+.if (.cpu .bitand CPU_ISET_NONE)
+   .byte 0,"CPU_ISET_NONE"
+.endif
+
+.if (.cpu .bitand CPU_ISET_6502)
+   .byte 0,"CPU_ISET_6502"
+.endif
+
+.if (.cpu .bitand CPU_ISET_6502X)
+   .byte 0,"CPU_ISET_6502X"
+.endif
+
+.if (.cpu .bitand CPU_ISET_65SC02)
+   .byte 0,"CPU_ISET_65SC02"
+.endif
+
+.if (.cpu .bitand CPU_ISET_65C02)
+   .byte 0,"CPU_ISET_65C02"
+.endif
+
+.if (.cpu .bitand CPU_ISET_65816)
+   .byte 0,"CPU_ISET_65816"
+.endif
+
+.if (.cpu .bitand CPU_ISET_SWEET16)
+   .byte 0,"CPU_ISET_SWEET16"
+.endif
+
+.if (.cpu .bitand CPU_ISET_HUC6280)
+   .byte 0,"CPU_ISET_HUC6280"
+.endif
+
+.if (.cpu .bitand CPU_ISET_4510)
+   .byte 0,"CPU_ISET_4510"
+.endif
+