From: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Date: Mon, 22 Jan 2018 11:28:37 +0000 (+0100)
Subject: aarch64: implement mmu on/off for aarch32
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a640f139baa9fe4f44d428b1e4e1a9da245532ca;p=openocd

aarch64: implement mmu on/off for aarch32

add decoding of aarch32 core modes (register layout is compatible)

Change-Id: I34c3146a7b1f836d3006be2b76b036da055b3d3e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4374
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
---

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 784274a0..bcfce659 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -161,8 +161,16 @@ static int aarch64_mmu_modify(struct target *target, int enable)
 	case ARMV8_64_EL3T:
 		instr = ARMV8_MSR_GP(SYSTEM_SCTLR_EL3, 0);
 		break;
+
+	case ARM_MODE_SVC:
+	case ARM_MODE_ABT:
+	case ARM_MODE_FIQ:
+	case ARM_MODE_IRQ:
+		instr = ARMV4_5_MCR(15, 0, 0, 1, 0, 0);
+		break;
+
 	default:
-		LOG_DEBUG("unknown cpu state 0x%x" PRIx32, armv8->arm.core_state);
+		LOG_DEBUG("unknown cpu state 0x%" PRIx32, armv8->arm.core_mode);
 		break;
 	}