From: Philipp Tomsich Date: Fri, 28 Apr 2017 15:11:55 +0000 (+0200) Subject: rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS X-Git-Tag: v2017.07-rc1~356^2~21 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a70feb462016d1a6a4e6254aa10ba68948b458f2;p=u-boot rockchip: clk: rk3399: allow requests for PCLK_EFUSE1024NS The (non-secure) efuse node in the DTS requests PCLK_EFUSE1024NS. To allow us to add a efuse-driver (and more importantly, to allow probes of such a driver to succeed), we need need to accept requests for PCLK_EFUSE1024NS and return a non-error result. As PCLK_EFUSE1024NS is enabled by default (i.e. after reset), we don't implement any logic to manage this clock gate and simply assume that the reset-default has not been changed. Signed-off-by: Philipp Tomsich Tested-by: Klaus Goger Reviewed-by: Simon Glass --- diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index c378652fb2..10db46e400 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -885,6 +885,8 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case DCLK_VOP0: case DCLK_VOP1: break; + case PCLK_EFUSE1024NS: + break; default: return -ENOENT; } @@ -927,6 +929,8 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case SCLK_DDRCLK: ret = rk3399_ddr_set_clk(priv->cru, rate); break; + case PCLK_EFUSE1024NS: + break; default: return -ENOENT; }