From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Wed, 30 Mar 2016 01:53:15 +0000 (+0900)
Subject: ARM: uniphier: add pin-mux settings for NAND, eMMC, SD of PH1-sLD3
X-Git-Tag: v2016.05-rc1~100
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a75ecfc2a637d581bc6ab21676f73e8eee1b13d2;p=u-boot

ARM: uniphier: add pin-mux settings for NAND, eMMC, SD of PH1-sLD3

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c
index 367d9f3bbc..f85ed53ae1 100644
--- a/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c
+++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c
@@ -22,4 +22,27 @@ void ph1_sld3_pin_init(void)
 	sg_set_pinsel(19, 0, 4, 4);	/* USB3OC */
 	sg_set_pinsel(20, 1, 4, 4);	/* USB3VBUS */
 #endif
+
+#ifdef CONFIG_NAND_DENALI
+	sg_set_pinsel(38, 1, 4, 4);	/* NFALE_GB, NFCLE_GB */
+	sg_set_pinsel(39, 1, 4, 4);	/* XNFRYBY0_GB */
+	sg_set_pinsel(40, 1, 4, 4);	/* XNFCE0_GB, XNFRE_GB, XNFWE_GB, XNFWP_GB */
+	sg_set_pinsel(41, 1, 4, 4);	/* XNFRYBY1_GB, XNFCE1_GB */
+	sg_set_pinsel(58, 1, 4, 4);	/* NFD[0-3]_GB */
+	sg_set_pinsel(59, 1, 4, 4);	/* NFD[4-7]_GB */
+#endif
+
+#ifdef CONFIG_MMC_UNIPHIER
+	/* eMMC */
+	sg_set_pinsel(55, 1, 4, 4);	/* XERST */
+	sg_set_pinsel(56, 1, 4, 4);	/* MMCDAT[0-3] */
+	sg_set_pinsel(57, 1, 4, 4);	/* MMCDAT[4-7] */
+	sg_set_pinsel(60, 1, 4, 4);	/* MMCCLK, MMCCMD */
+
+	/* SD card */
+	sg_set_pinsel(42, 1, 4, 4);	/* SD1CLK, SD1CMD, SD1DAT[0-3] */
+	sg_set_pinsel(43, 1, 4, 4);	/* SD1CD */
+	sg_set_pinsel(44, 1, 4, 4);	/* SD1WP */
+	sg_set_pinsel(45, 1, 4, 4);	/* SDVTCG */
+#endif
 }