From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Mon, 7 Feb 2011 21:14:15 +0000 (-0500)
Subject: powerpc/85xx: load ucode from nand flash before qe_init
X-Git-Tag: v2011.06-rc1~185^2~26
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a7b1e1b706a78f9208cb4128be9692e97f58e5ac;p=u-boot

powerpc/85xx: load ucode from nand flash before qe_init

In the case the QE's microcode is stored in nand flash, we need to load it from
NAND flash to ddr first then the qe_init can get the ucode correctly.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 215b7b3808..5642cd7b05 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -37,6 +37,10 @@
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
 #include "mp.h"
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#include <nand.h>
+#include <errno.h>
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -448,6 +452,19 @@ void cpu_secondary_init_r(void)
 {
 #ifdef CONFIG_QE
 	uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
+#ifdef CONFIG_SYS_QE_FW_IN_NAND
+	int ret;
+	size_t fw_length = CONFIG_SYS_QE_FW_LENGTH;
+
+	/* load QE firmware from NAND flash to DDR first */
+	ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND,
+			&fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
+
+	if (ret && ret == -EUCLEAN) {
+		printf ("NAND read for QE firmware at offset %x failed %d\n",
+				CONFIG_SYS_QE_FW_IN_NAND, ret);
+	}
+#endif
 	qe_init(qe_base);
 	qe_reset();
 #endif