From: Marek Vasut <marek.vasut@gmail.com>
Date: Mon, 30 Jan 2012 14:05:39 +0000 (+0000)
Subject: i.MX28: Make the stabilization delays shorter
X-Git-Tag: v2012.04-rc1~19^2~98
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a89300338a0d0c43ff21c50d793782c310c882ee;p=u-boot

i.MX28: Make the stabilization delays shorter

Cut down the VDDIO/VDDA regulator stabilization delays to 500 uS. That should be
enough according to the datasheet and bootlets.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Robert Deliën <robert@delien.nl>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
---

diff --git a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
index 271da8dd76..aa4117d3a2 100644
--- a/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mx28/spl_power_init.c
@@ -729,7 +729,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
@@ -766,7 +766,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
@@ -826,7 +826,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))
@@ -863,7 +863,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
 			if (powered_by_linreg ||
 				(readl(&power_regs->hw_power_sts) &
 					POWER_STS_VDD5V_GT_VDDIO))
-				early_delay(1500);
+				early_delay(500);
 			else {
 				while (!(readl(&power_regs->hw_power_sts) &
 					POWER_STS_DC_OK))