From: Stefan Roese Date: Wed, 10 Feb 2016 06:06:06 +0000 (+0100) Subject: net: phy: marvell: Fix problem with phy_reset() clearing BMCR X-Git-Tag: v2016.03-rc3~87 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a8c3eca43393cffef16a40e683f7a4d45b37e6ed;p=u-boot net: phy: marvell: Fix problem with phy_reset() clearing BMCR With commit a058052c [net: phy: do not read configuration register on reset], phy_reset() will clear the BMCR register. Resulting in bit 12 being cleared (A/N enable). This leads to autonegotiation link problems, at least on the Marvell Armada ClearFog board. I suspect that other boards using this driver will be affected as well. At the of m88e1111s_config(), phy_reset() is called. This is not needed for the PHY to load the changed configuration, as phy_reset() is called a few lines before already. So lets call genphy_restart_aneg() here instead to start the AN correctly. Tested on clearfog. Signed-off-by: Stefan Roese Cc: Stefan Agner Cc: Hao Zhang Cc: Michal Simek Cc: Andy Fleming Cc: Joe Hershberger Acked-by: Joe Hershberger --- diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 6e3dc85379..b8b1157a0a 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -251,8 +251,7 @@ static int m88e1111s_config(struct phy_device *phydev) phy_reset(phydev); genphy_config_aneg(phydev); - - phy_reset(phydev); + genphy_restart_aneg(phydev); return 0; }