From: Rajesh Bhagat Date: Thu, 27 Jul 2017 09:49:05 +0000 (+0800) Subject: config: ls1012aqds: Enable USB EHCI support for ls1012aqds X-Git-Tag: v2017.09-rc2~88^2~4 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a8ecb39e9e67ddf86cbf859175873684b8afc1d3;p=u-boot config: ls1012aqds: Enable USB EHCI support for ls1012aqds Signed-off-by: Rajat Srivastava Signed-off-by: Rajesh Bhagat Signed-off-by: yinbo.zhu [YS: Revise subject, remove commit message] Reviewed-by: York Sun --- diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 8ad199f60a..4afc338b8e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -35,6 +35,7 @@ #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) #define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index bebb0dfce8..7120111dcc 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -115,6 +115,8 @@ #ifdef CONFIG_HAS_FSL_DR_USB #define CONFIG_USB_EHCI_FSL +#define CONFIG_USB_ULPI +#define CONFIG_USB_ULPI_VIEWPORT #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 847b6989a0..cd3eb47da4 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -156,7 +156,7 @@ #elif defined(CONFIG_MPC85xx) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR -#elif defined(CONFIG_ARCH_LS1021A) +#elif defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 #endif