From: Wolfgang Denk <wd@denx.de>
Date: Sun, 14 Jun 2009 18:58:45 +0000 (+0200)
Subject: MPC512x: Add MSCAN1...4 Clock Control Registers
X-Git-Tag: v2009.08-rc1~108
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=a9905db5d29a56aedd7db5bcb56b0385873aa6a3;p=u-boot

MPC512x: Add MSCAN1...4 Clock Control Registers

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
---

diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
index 3648a05f8c..24e6c6934e 100644
--- a/include/asm-ppc/immap_512x.h
+++ b/include/asm-ppc/immap_512x.h
@@ -185,10 +185,11 @@ typedef struct clk512x {
 	u8 res0[4];
 	u32 bcr;		/* Bread Crumb Register */
 	u32 pscccr[12];		/* PSC0-11 Clock Control Registers */
-	u32 spccr;		/* SPDIF Clock Control Registers */
-	u32 cccr;		/* CFM Clock Control Registers */
-	u32 dccr;		/* DIU Clock Control Registers */
-	u8 res1[0xa8];
+	u32 spccr;		/* SPDIF Clock Control Register */
+	u32 cccr;		/* CFM Clock Control Register */
+	u32 dccr;		/* DIU Clock Control Register */
+	u32 msccr[4];		/* MSCAN1-4 Clock Control Registers */
+	u8 res1[0x98];
 } clk512x_t;
 
 /* SPMR - System PLL Mode Register */