From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Tue, 2 Feb 2016 12:11:36 +0000 (+0900)
Subject: ARM: dts: uniphier: add device nodes for MIO control block
X-Git-Tag: v2016.03-rc2~25^2~12
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=aa37aba128750fe9539cbaf80e26e002f0cca7ad;p=u-boot

ARM: dts: uniphier: add device nodes for MIO control block

This block provides clock and reset control for MIO (Media I/O)
hardware blocks such as USB2.0, SD card, eMMC, etc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

diff --git a/arch/arm/dts/uniphier-common32.dtsi b/arch/arm/dts/uniphier-common32.dtsi
index 43e5bea60d..59511bde94 100644
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -74,6 +74,12 @@
 			reg = <0x58c00000 0x400>, <0x59800000 0x2000>;
 		};
 
+		mio: mioctrl@59810000 {
+			/* specify compatible in each SoC DTSI */
+			reg = <0x59810000 0x800>;
+			#clock-cells = <1>;
+		};
+
 		peri: perictrl@59820000 {
 			/* specify compatible in each SoC DTSI */
 			reg = <0x59820000 0x200>;
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 5843097ef1..628a397b16 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -157,6 +157,12 @@
 	clock-frequency = <36864000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-ld4-mioctrl";
+	clock-names = "stdmac", "ehci";
+	clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
 &peri {
 	compatible = "socionext,ph1-ld4-perictrl";
 	clock-names = "uart", "i2c";
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index 0c2f02f77b..bfffe9464d 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -197,6 +197,12 @@
 	clock-frequency = <73728000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-pro4-mioctrl";
+	clock-names = "stdmac", "ehci";
+	clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
 &peri {
 	compatible = "socionext,ph1-pro4-perictrl";
 	clock-names = "uart", "fi2c";
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 305114cf87..087b25a950 100644
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -191,6 +191,12 @@
 	clock-frequency = <73728000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-pro5-mioctrl";
+	clock-names = "stdmac";
+	clocks = <&sysctrl 10>;
+};
+
 &peri {
 	compatible = "socionext,ph1-pro5-perictrl";
 	clock-names = "uart", "fi2c";
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index c7a890227d..91c9ba527f 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -178,6 +178,14 @@
 			reg = <0x59800000 0x2000>;
 		};
 
+		mio: mioctrl@59810000 {
+			compatible = "socionext,ph1-sld3-mioctrl";
+			reg = <0x59810000 0x800>;
+			#clock-cells = <1>;
+			clock-names = "stdmac", "ehci";
+			clocks = <&sysctrl 10>, <&sysctrl 18>;
+		};
+
 		usb0: usb@5a800100 {
 			compatible = "socionext,uniphier-ehci", "generic-ehci";
 			status = "disabled";
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index 7a26b4a7d2..b9ef401885 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -157,6 +157,12 @@
 	clock-frequency = <80000000>;
 };
 
+&mio {
+	compatible = "socionext,ph1-sld8-mioctrl";
+	clock-names = "stdmac", "ehci";
+	clocks = <&sysctrl 10>, <&sysctrl 18>;
+};
+
 &peri {
 	compatible = "socionext,ph1-sld8-perictrl";
 	clock-names = "uart", "i2c";
diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi b/arch/arm/dts/uniphier-proxstream2.dtsi
index f2faf256c4..2d324f95a4 100644
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -202,6 +202,12 @@
 	clock-frequency = <88900000>;
 };
 
+&mio {
+	compatible = "socionext,proxstream2-mioctrl";
+	clock-names = "stdmac";
+	clocks = <&sysctrl 10>;
+};
+
 &peri {
 	compatible = "socionext,proxstream2-perictrl";
 	clock-names = "uart", "fi2c";