From: Nobuhiro Iwamatsu Date: Fri, 1 Dec 2017 04:56:08 +0000 (+0900) Subject: net: sh-eth: Fix misaligned cache operation warning X-Git-Tag: v2018.03-rc1~175^2~2 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=aae5d237b97dd93ac932d3329c6fdab4bd84c85d;p=u-boot net: sh-eth: Fix misaligned cache operation warning When we using network on board using sh-eth, it prints a lot of "CACHE: Misaligned operation at range" messages. This commit fixes this problem. Signed-off-by: Nobuhiro Iwamatsu Acked-by: Joe Hershberger --- diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index f28f388ea9..6edb51e12f 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -29,7 +29,8 @@ #if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && !defined(CONFIG_SYS_DCACHE_OFF) #define flush_cache_wback(addr, len) \ - flush_dcache_range((u32)addr, (u32)(addr + len - 1)) + flush_dcache_range((u32)addr, \ + (u32)(addr + ALIGN(len, CONFIG_SH_ETHER_ALIGNE_SIZE))) #else #define flush_cache_wback(...) #endif @@ -205,7 +206,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth) goto err; } - flush_cache_wback((u32)port_info->tx_desc_alloc, alloc_desc_size); + flush_cache_wback(port_info->tx_desc_alloc, alloc_desc_size); /* Make sure we use a P2 address (non-cacheable) */ port_info->tx_desc_base =