From: SRICHARAN R Date: Mon, 12 Mar 2012 02:25:46 +0000 (+0000) Subject: OMAP4/5: emif: Correct the emif power mgt shadow register bit fields. X-Git-Tag: v2012.07-rc1~144^2~143 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=aaec44874f607db3cb19985f0b977cc6f13fd11f;p=u-boot OMAP4/5: emif: Correct the emif power mgt shadow register bit fields. PD_TIM bit field which specifies the power down timing is defined to occupy bits 8-11, where as it is actually from 12-15 bits. So correcting this. Signed-off-by: R Sricharan --- diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index aab15d8ef6..f1e3ad212e 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -226,8 +226,8 @@ #define EMIF_REG_CS_TIM_MASK (0xf << 0) /* PWR_MGMT_CTRL_SHDW */ -#define EMIF_REG_PD_TIM_SHDW_SHIFT 8 -#define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 8) +#define EMIF_REG_PD_TIM_SHDW_SHIFT 12 +#define EMIF_REG_PD_TIM_SHDW_MASK (0xf << 12) #define EMIF_REG_SR_TIM_SHDW_SHIFT 4 #define EMIF_REG_SR_TIM_SHDW_MASK (0xf << 4) #define EMIF_REG_CS_TIM_SHDW_SHIFT 0