From: Peter Lawrence <majbthrd@gmail.com>
Date: Fri, 27 Nov 2015 23:28:16 +0000 (-0600)
Subject: tcl: Support for Analog Devices ADSP-SC58x
X-Git-Tag: v0.10.0-rc1~53
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ab9d92490cf37fb4cbb394f85d7c8385474dff3f;p=openocd

tcl: Support for Analog Devices ADSP-SC58x

target tcl to enable debugging of ARM Cortex-A5 on ADSP-SC58x

Change-Id: I378f8b94b7d6d6b9d0567985abc0e36aea7c8dea
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/3125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
---

diff --git a/tcl/target/adsp-sc58x.cfg b/tcl/target/adsp-sc58x.cfg
new file mode 100644
index 00000000..369137ed
--- /dev/null
+++ b/tcl/target/adsp-sc58x.cfg
@@ -0,0 +1,45 @@
+# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
+
+# evaluation boards by Analog Devices (and designs derived from them) use a non-standard 10-pin 0.05" ARM Cortex Debug Connector
+# pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST
+# as a result, a standards-compliant debug pod will only force the processor's debug interface into reset, preventing usage
+# so, a connector adapter must be employed on these boards to isolate or otherwise prevent /TRST from being asserted
+
+transport select swd
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME ADSP-SC58x
+}
+
+if { [info exists ENDIAN] } {
+	set _ENDIAN $ENDIAN
+} else {
+	set _ENDIAN little
+}
+
+if { [info exists CPUTAPID] } {
+	set _CPUTAPID $CPUTAPID
+} else {
+	set _CPUTAPID 0x3BA02477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_a -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -event examine-end {
+   global _TARGETNAME
+   sc58x_enabledebug $_TARGETNAME
+}
+
+proc sc58x_enabledebug {target} {
+   # Enable debugging functionality by setting relevant bits in the TAPC_DBGCTL register
+   # the "phys" option is critical; the OpenOCD Cortex-A target code prevents normal mww when the target is not halted
+   # however, it is not possible to halt the target unless these register bits have been set
+   $target mww phys 0x31131000 0xFFFF
+}
+