From: richardbarry Date: Wed, 25 Aug 2010 16:06:53 +0000 (+0000) Subject: Create starting point for GNURX RX62N HEW project. X-Git-Tag: V6.1.0~75 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=abc548117f92cc8527c2065ef5c615ffd28dde43;p=freertos Create starting point for GNURX RX62N HEW project. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1060 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/DefaultSession.hsf b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/DefaultSession.hsf new file mode 100644 index 000000000..9634aecdd --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/DefaultSession.hsf @@ -0,0 +1,238 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"2.3" +[SESSION_DETAILS] +"" +[INFORMATION] +"" +[GENERAL_DATA] +"FIRST_CONNECTION_TAG" "NO" +"MRULABELS_DATAMANAGER_KEY" "00000000" +"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG" +"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT01" " " +"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT02" " " +"{0AF60212-1285-4767-AB8A-73DB62CC8DBD}R_ECXOS_0ECXOS_OBJECT03" " " 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+"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Debug\RTOSDemo.x" 0 "Elf/Dwarf2_KPIT" 0 1 1 0 +[CONNECT_ON_GO] +"FALSE" +[DOWNLOAD_MODULES_AFTER_BUILD] +"TRUE" +[REMOVE_BREAKPOINTS_ON_DOWNLOAD] +"FALSE" +[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION] +"FALSE" +[LIMIT_DISASSEMBLY_MEMORY_ACCESS] +"FALSE" +[DISABLE_MEMORY_ACCESS_DURING_EXECUTION] +"FALSE" +[DEBUGGER_OPTIONS_PROPERTIES] +"1" +[COMMAND_FILES] +[DEFAULT_DEBUG_FORMAT] +"Elf/Dwarf2_KPIT" +[FLASH_DETAILS] +"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" +[BREAKPOINTS] +[END] diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/DefaultSession.ini b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/DefaultSession.ini new file mode 100644 index 000000000..ae83e6023 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/DefaultSession.ini @@ -0,0 +1,30 @@ +[Init_DeviceSetting] +DebugMode=0 +PowerOut=0 +ResetRelease=0 +EmulatorSerial=E1:_9KM000237 +McuGroup=RX62N Group +Device=R5F562N8 +McuFileDir=RX62NGr +SupplyVoltage=-1 +[Init_CommunicationClock] +JtagClock=16.5 +JtagClockValue=10 +[Init_EmulatorSetting] +FirstStartUp=0 +HideNext=0 +ConnectionDlgAutoClose=1 +[CFG_MCU] +PrevDevice=R5F562N8 +ProcessorMode=0 +EXTAL=12.0000 +WorkRam=3000 +[CFG_SYSTEM] +CpuReWrite=0 +PerfCounterUser=0 +TraceDebugAs=0 +[CFG_FLASHCLEAR_R5F562N8_00] +BlockCount=54 +BlockData=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +[Config_Property] +HideNext=0 diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/hwinit.c b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/hwinit.c new file mode 100644 index 000000000..b6660aaa0 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/hwinit.c @@ -0,0 +1,55 @@ +/***********************************************************************/ +/* */ +/* FILE :hwinit.c */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Hardware Setup file */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + +#include "iodefine.h" +#ifdef __cplusplus +extern "C" { +#endif +extern void hw_initialise(void); +#ifdef __cplusplus +} +#endif + +void hw_initialise(void) +{ +/* + SCI.SMR.BYTE = 0; + SCI.SMR.BIT.CA = 1; + SCI.SMR.BIT.CHR = 1; + SCI.SMR.BIT.OE = 1; + SCI.SMR.BIT.STOP = 1; + SCI.SMR.BIT.MP = 1; + SCI.SMR.BIT.CKS = 3; + SCI.BRR = 0; + SCI.SCR.BYTE = 0; + SCI.SCR.BIT.TIE = 1; + SCI.SCR.BIT.RIE = 1; + SCI.SCR.BIT.TE = 1; + SCI.SCR.BIT.RE = 1; + SCI.SCR.BIT.MPIE = 1; + SCI.SCR.BIT.TEIE = 1; + SCI.SCR.BIT.CKE = 3; + SCI.TDR = 0; + SCI.SSR.BYTE = 0; + SCI.SSR.BIT.TDRE = 1; + SCI.SSR.BIT.RDRF = 1; + SCI.SSR.BIT.ORER = 1; + SCI.SSR.BIT.FER = 1; + SCI.SSR.BIT.PER = 1; + SCI.SSR.BIT.TEND = 1; + SCI.SSR.BIT.MPB = 1; + SCI.SSR.BIT.MPBT = 1; + SCI.RDR = 0; + +*/ +} diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/inthandler.c b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/inthandler.c new file mode 100644 index 000000000..2cdd7a60d --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/inthandler.c @@ -0,0 +1,431 @@ +/***********************************************************************/ +/* */ +/* FILE :inthandler.c */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Interrupt Handler */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + + +#include "inthandler.h" + +// Exception(Supervisor Instruction) +void INT_Excep_SuperVisorInst(void){/* brk(); */} + +// Exception(Undefined Instruction) +void INT_Excep_UndefinedInst(void){/* brk(); */} + +// Exception(Floating Point) +void INT_Excep_FloatingPoint(void){/* brk(); */} + +// NMI +void INT_NonMaskableInterrupt(void){/* brk(); */} + +// Dummy +void Dummy(void){/* brk(); */} + +// BRK +void INT_Excep_BRK(void){ /*wait(); */} + +// BUSERR +void INT_Excep_BUSERR(void){ } + +// FCU_FCUERR +void INT_Excep_FCU_FCUERR(void){ } + +// FCU_FRDYI +void INT_Excep_FCU_FRDYI(void){ } + +// CMTU0_CMT0 +void INT_Excep_CMTU0_CMT0(void){ } + +// CMTU0_CMT1 +void INT_Excep_CMTU0_CMT1(void){ } + +// CMTU1_CMT2 +void INT_Excep_CMTU1_CMT2(void){ } + +// CMTU1_CMT3 +void INT_Excep_CMTU1_CMT3(void){ } + +// IRQ0 +void INT_Excep_IRQ0(void){ } + +// IRQ1 +void INT_Excep_IRQ1(void){ } + +// IRQ2 +void INT_Excep_IRQ2(void){ } + +// IRQ3 +void INT_Excep_IRQ3(void){ } + +// IRQ4 +void INT_Excep_IRQ4(void){ } + +// IRQ5 +void INT_Excep_IRQ5(void){ } + +// IRQ6 +void INT_Excep_IRQ6(void){ } + +// IRQ7 +void INT_Excep_IRQ7(void){ } + +// IRQ8 +void INT_Excep_IRQ8(void){ } + +// IRQ9 +void INT_Excep_IRQ9(void){ } + +// IRQ10 +void INT_Excep_IRQ10(void){ } + +// IRQ11 +void INT_Excep_IRQ11(void){ } + +// IRQ12 +void INT_Excep_IRQ12(void){ } + +// IRQ13 +void INT_Excep_IRQ13(void){ } + +// IRQ14 +void INT_Excep_IRQ14(void){ } + +// IRQ15 +void INT_Excep_IRQ15(void){ } + +// WDT_WOVI +void INT_Excep_WDT_WOVI(void){ } + +// AD0_ADI0 +void INT_Excep_AD0_ADI0(void){ } + +// AD1_ADI1 +void INT_Excep_AD1_ADI1(void){ } + +// AD2_ADI2 +void INT_Excep_AD2_ADI2(void){ } + +// AD3_ADI3 +void INT_Excep_AD3_ADI3(void){ } + +// TPU0_TGI0A +void INT_Excep_TPU0_TGI0A(void){ } + +// TPU0_TGI0B +void INT_Excep_TPU0_TGI0B(void){ } + +// TPU0_TGI0C +void INT_Excep_TPU0_TGI0C(void){ } + +// TPU0_TGI0D +void INT_Excep_TPU0_TGI0D(void){ } + +// TPU0_TCI0V +void INT_Excep_TPU0_TCI0V(void){ } + +// TPU1_TGI1A +void INT_Excep_TPU1_TGI1A(void){ } + +// TPU1_TGI1B +void INT_Excep_TPU1_TGI1B(void){ } + +// TPU1_TCI1V +void INT_Excep_TPU1_TCI1V(void){ } + +// TPU1_TCI1U +void INT_Excep_TPU1_TCI1U(void){ } + +// TPU2_TGI2A +void INT_Excep_TPU2_TGI2A(void){ } + +// TPU2_TGI2B +void INT_Excep_TPU2_TGI2B(void){ } + +// TPU2_TCI2V +void INT_Excep_TPU2_TCI2V(void){ } + +// TPU2_TCI2U +void INT_Excep_TPU2_TCI2U(void){ } + +// TPU3_TGI3A +void INT_Excep_TPU3_TGI3A(void){ } + +// TPU3_TGI3B +void INT_Excep_TPU3_TGI3B(void){ } + +// TPU3_TGI3C +void INT_Excep_TPU3_TGI3C(void){ } + +// TPU3_TGI3D +void INT_Excep_TPU3_TGI3D(void){ } + +// TPU3_TCI3V +void INT_Excep_TPU3_TCI3V(void){ } + +// TPU4_TGI4A +void INT_Excep_TPU4_TGI4A(void){ } + +// TPU4_TGI4B +void INT_Excep_TPU4_TGI4B(void){ } + +// TPU4_TCI4V +void INT_Excep_TPU4_TCI4V(void){ } + +// TPU4_TCI4U +void INT_Excep_TPU4_TCI4U(void){ } + +// TPU5_TGI5A +void INT_Excep_TPU5_TGI5A(void){ } + +// TPU5_TGI5B +void INT_Excep_TPU5_TGI5B(void){ } + +// TPU5_TCI5V +void INT_Excep_TPU5_TCI5V(void){ } + +// TPU5_TCI5U +void INT_Excep_TPU5_TCI5U(void){ } + +// TPU6_TGI6A +void INT_Excep_TPU6_TGI6A(void){ } + +// TPU6_TGI6B +void INT_Excep_TPU6_TGI6B(void){ } + +// TPU6_TGI6C +void INT_Excep_TPU6_TGI6C(void){ } + +// TPU6_TGI6D +void INT_Excep_TPU6_TGI6D(void){ } + +// TPU6_TCI6V +void INT_Excep_TPU6_TCI6V(void){ } + +// TPU7_TGI7A +void INT_Excep_TPU7_TGI7A(void){ } + +// TPU7_TGI7B +void INT_Excep_TPU7_TGI7B(void){ } + +// TPU7_TCI7V +void INT_Excep_TPU7_TCI7V(void){ } + +// TPU7_TCI7U +void INT_Excep_TPU7_TCI7U(void){ } + +// TPU8_TGI8A +void INT_Excep_TPU8_TGI8A(void){ } + +// TPU8_TGI8B +void INT_Excep_TPU8_TGI8B(void){ } + +// TPU8_TCI8V +void INT_Excep_TPU8_TCI8V(void){ } + +// TPU8_TCI8U +void INT_Excep_TPU8_TCI8U(void){ } + +// TPU9_TGI9A +void INT_Excep_TPU9_TGI9A(void){ } + +// TPU9_TGI9B +void INT_Excep_TPU9_TGI9B(void){ } + +// TPU9_TGI9C +void INT_Excep_TPU9_TGI9C(void){ } + +// TPU9_TGI9D +void INT_Excep_TPU9_TGI9D(void){ } + +// TPU9_TCI9V +void INT_Excep_TPU9_TCI9V(void){ } + +// TPU10_TGI10A +void INT_Excep_TPU10_TGI10A(void){ } + +// TPU10_TGI10B +void INT_Excep_TPU10_TGI10B(void){ } + +// TPU10_TCI10V +void INT_Excep_TPU10_TCI10V(void){ } + +// TPU10_TCI10U +void INT_Excep_TPU10_TCI10U(void){ } + +// TPU11_TGI11A +void INT_Excep_TPU11_TGI11A(void){ } + +// TPU11_TGI11B +void INT_Excep_TPU11_TGI11B(void){ } + +// TPU11_TCI11V +void INT_Excep_TPU11_TCI11V(void){ } + +// TPU11_TCI11U +void INT_Excep_TPU11_TCI11U(void){ } + +// TMR0_CMI0A +void INT_Excep_TMR0_CMI0A(void){ } + +// TMR0_CMI0B +void INT_Excep_TMR0_CMI0B(void){ } + +// TMR0_OV0I +void INT_Excep_TMR0_OV0I(void){ } + +// TMR1_CMI1A +void INT_Excep_TMR1_CMI1A(void){ } + +// TMR1_CMI1B +void INT_Excep_TMR1_CMI1B(void){ } + +// TMR1_OV1I +void INT_Excep_TMR1_OV1I(void){ } + +// TMR2_CMI2A +void INT_Excep_TMR2_CMI2A(void){ } + +// TMR2_CMI2B +void INT_Excep_TMR2_CMI2B(void){ } + +// TMR2_OV2I +void INT_Excep_TMR2_OV2I(void){ } + +// TMR3_CMI3A +void INT_Excep_TMR3_CMI3A(void){ } + +// TMR3_CMI3B +void INT_Excep_TMR3_CMI3B(void){ } + +// TMR3_OV3I +void INT_Excep_TMR3_OV3I(void){ } + +// DMAC_DMTEND0 +void INT_Excep_DMAC_DMTEND0(void){ } + +// DMAC_DMTEND1 +void INT_Excep_DMAC_DMTEND1(void){ } + +// DMAC_DMTEND2 +void INT_Excep_DMAC_DMTEND2(void){ } + +// DMAC_DMTEND3 +void INT_Excep_DMAC_DMTEND3(void){ } + +// SCI0_ERI0 +void INT_Excep_SCI0_ERI0(void){ } + +// SCI0_RXI0 +void INT_Excep_SCI0_RXI0(void){ } + +// SCI0_TXI0 +void INT_Excep_SCI0_TXI0(void){ } + +// SCI0_TEI0 +void INT_Excep_SCI0_TEI0(void){ } + +// SCI1_ERI1 +void INT_Excep_SCI1_ERI1(void){ } + +// SCI1_RXI1 +void INT_Excep_SCI1_RXI1(void){ } + +// SCI1_TXI1 +void INT_Excep_SCI1_TXI1(void){ } + +// SCI1_TEI1 +void INT_Excep_SCI1_TEI1(void){ } + +// SCI2_ERI2 +void INT_Excep_SCI2_ERI2(void){ } + +// SCI2_RXI2 +void INT_Excep_SCI2_RXI2(void){ } + +// SCI2_TXI2 +void INT_Excep_SCI2_TXI2(void){ } + +// SCI2_TEI2 +void INT_Excep_SCI2_TEI2(void){ } + +// SCI3_ERI3 +void INT_Excep_SCI3_ERI3(void){ } + +// SCI3_RXI3 +void INT_Excep_SCI3_RXI3(void){ } + +// SCI3_TXI3 +void INT_Excep_SCI3_TXI3(void){ } + +// SCI3_TEI3 +void INT_Excep_SCI3_TEI3(void){ } + +// SCI4_ERI4 +void INT_Excep_SCI4_ERI4(void){ } + +// SCI4_RXI4 +void INT_Excep_SCI4_RXI4(void){ } + +// SCI4_TXI4 +void INT_Excep_SCI4_TXI4(void){ } + +// SCI4_TEI4 +void INT_Excep_SCI4_TEI4(void){ } + +// SCI5_ERI5 +void INT_Excep_SCI5_ERI5(void){ } + +// SCI5_RXI5 +void INT_Excep_SCI5_RXI5(void){ } + +// SCI5_TXI5 +void INT_Excep_SCI5_TXI5(void){ } + +// SCI5_TEI5 +void INT_Excep_SCI5_TEI5(void){ } + +// SCI6_ERI6 +void INT_Excep_SCI6_ERI6(void){ } + +// SCI6_RXI6 +void INT_Excep_SCI6_RXI6(void){ } + +// SCI6_TXI6 +void INT_Excep_SCI6_TXI6(void){ } + +// SCI6_TEI6 +void INT_Excep_SCI6_TEI6(void){ } + +// RIIC0_EEI0 +void INT_Excep_RIIC0_EEI0(void){ } + +// RIIC0_RXI0 +void INT_Excep_RIIC0_RXI0(void){ } + +// RIIC0_TXI0 +void INT_Excep_RIIC0_TXI0(void){ } + +// RIIC0_TEI0 +void INT_Excep_RIIC0_TEI0(void){ } + +// RIIC1_EEI1 +void INT_Excep_RIIC1_EEI1(void){ } + +// RIIC1_RXI1 +void INT_Excep_RIIC1_RXI1(void){ } + +// RIIC1_TXI1 +void INT_Excep_RIIC1_TXI1(void){ } + +// RIIC1_TEI1 +void INT_Excep_RIIC1_TEI1(void){ } + + diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/start.asm b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/start.asm new file mode 100644 index 000000000..9afe8fc99 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/GNU-Files/start.asm @@ -0,0 +1,94 @@ +/*------------------------------------------------------------------------ + | + FILE : start.asm | + DATE : Wed, Aug 25, 2010 | + DESCRIPTION : Reset Program | + CPU TYPE : Other | + | + This file is generated by KPIT GNU Project Generator (Ver.4.5). | + | +------------------------------------------------------------------------*/ + + + + /*Start.asm*/ + + .list + .section .text + .global _start /*global Start routine */ + +#ifdef CPPAPP +___dso_handle: + .global ___dso_handle +#endif + + .extern _hw_initialise /*external Sub-routine to initialise Hardware*/ + .extern _data + .extern _mdata + .extern _ebss + .extern _bss + .extern _edata + .extern _main + .extern _ustack + .extern _istack + .extern _rvectors +#if DEBUG + .extern _exit +#endif + + +_start: +/* initialise user stack pointer */ + mvtc #_ustack,USP + +/* initialise interrupt stack pointer */ + mvtc #_istack,ISP + +/* setup intb */ + mvtc #_rvectors_start, intb /* INTERRUPT VECTOR ADDRESS definition */ + +/* setup FPSW */ + mvtc #100h, fpsw + +/* load data section from ROM to RAM */ + + mov #_mdata,r2 /* src ROM address of data section in R2 */ + mov #_data,r1 /* dest start RAM address of data section in R1 */ + mov #_edata,r3 /* end RAM address of data section in R3 */ + sub r1,r3 /* size of data section in R3 (R3=R3-R1) */ + smovf /* block copy R3 bytes from R2 to R1 */ + +/* bss initialisation : zero out bss */ + + mov #00h,r2 /* load R2 reg with zero */ + mov #_ebss, r3 /* store the end address of bss in R3 */ + mov #_bss, r1 /* store the start address of bss in R1 */ + sub r1,r3 /* size of bss section in R3 (R3=R3-R1) */ + sstr.b + +/* call the hardware initialiser */ + bsr.a _hw_initialise + nop + +/* setup PSW */ + mvtc #10000h, psw /* Set Ubit & Ibit for PSW */ + +/* change PSW PM to user-mode */ + MVFC PSW,R1 + OR #00100000h,R1 + PUSH.L R1 + MVFC PC,R1 + ADD #10,R1 + PUSH.L R1 + RTE + NOP + NOP + +/* start user program */ + bsr.a _main + +/* call to exit*/ +_exit: + bsr.a _exit + + .end diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.hwp b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.hwp new file mode 100644 index 000000000..22dc081f2 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.hwp @@ -0,0 +1,240 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"2.8" +[PROJECT_DETAILS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\RTOSDemo.hwp" "RX" "KPIT GNURX [ELF]" "C Application" "RX600" "Other" +[INFORMATION] +"No project information available" +[TOOL_CHAIN] +"KPIT GNURX [ELF] Toolchain" "v10.02" +[CONFIGURATIONS] +"Debug" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Debug" +"Debug_RX600_E1_E20_SYSTEM" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Debug_RX600_E1_E20_SYSTEM" +"Release" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\Release" +[BUILD_PHASES] +"GNU Assembler" 1 +"GNU Compiler" 1 +"GNU Library Generator" 1 +"GNU Linker" 1 +[TOOL_ENVIRONMENT] +[EXTENSIONS] +"Absolute file" "ABS" +"Archive File" "A" +"Assembly include file" "INC" +"Assembly list file" "LIS" +"Assembly source file" "S" +"Assembly source file" "SRC" +"Binary file" "BIN" +"C header file" "H" +"C list file" "LST" +"C source file" "C" +"C++ header file" "HPP" +"C++ list file" "LPP" +"C++ source file" "CC" +"C++ source file" "CP" +"C++ source file" "CPP" +"CPU information file" "CPU" +"Calling information file" "CAL" +"Debug information file" "DBG" +"Expanded assembly source file" "EXP" +"Hex file" "HEX" +"Library file" "LIB" +"Library information file" "LBP" +"Linkage map file" "MAP" +"Object file" "OBJ" +"Optimize map file" "bls" +"Preprocess Assembly file" "ASM" +"Preprocessed C source file" "P" +"Preprocessed C++ source file" "PP" +"Profile file" "PRO" +"Relocatable file" "REL" +"Rts information file" "RTS" +"S-Record file" "MOT" +"Stack information file" "SNI" +"TD include object file" "RTI" +[FILE_GROUPS] +"Absolute file" "BIN" "NONE" "" +"Archive File" "BIN" "NONE" "" +"Assembly include file" "TEXT" "EDITOR" "" +"Assembly list file" "TEXT" "EDITOR" "" +"Assembly source file" "TEXT" "EDITOR" "" +"Binary file" "BIN" "NONE" "" +"C header file" "TEXT" "EDITOR" "" +"C list file" "TEXT" "EDITOR" "" +"C source file" "TEXT" "EDITOR" "" +"C++ header file" "TEXT" "EDITOR" "" +"C++ list file" "TEXT" "EDITOR" "" +"C++ source file" "TEXT" "EDITOR" "" +"CPU information file" "BIN" "NONE" "" +"Calling information file" "BIN" "NONE" "" +"Debug information file" "BIN" "NONE" "" +"Expanded assembly source file" "TEXT" "EDITOR" "" +"Hex file" "TEXT" "EDITOR" "" +"Library file" "BIN" "NONE" "" +"Library information file" "TEXT" "EDITOR" "" +"Linkage map file" "TEXT" "EDITOR" "" +"Object file" "BIN" "NONE" "" +"Optimize map file" "BIN" "NONE" "" +"Preprocess Assembly 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+[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM] +"MEMORY_MAPPING_OPTIONS" "Unknown Options" +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession] +[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession] +"MEMORY_MAPPING_OPTIONS" "" +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM] +[SESSION_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM] +"MEMORY_MAPPING_OPTIONS" "Unknown Options" +[GENERAL_DATA_CONFIGURATION_SESSION_Release_DefaultSession] +[SESSION_DATA_CONFIGURATION_SESSION_Release_DefaultSession] +"MEMORY_MAPPING_OPTIONS" "" +[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionRX600_E1_E20_SYSTEM] +[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionRX600_E1_E20_SYSTEM] +"MEMORY_MAPPING_OPTIONS" "Unknown Options" +[EXT_DEBUGGER_INFO] +0 "" "" "" "" +[END] diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.nav b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.nav new file mode 100644 index 000000000..7fc11c60b Binary files /dev/null and b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.nav differ diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.tps b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.tps new file mode 100644 index 000000000..31a97de28 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/RTOSDemo.tps @@ -0,0 +1,40 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"1.1" +[SESSIONS_] +"DefaultSession" +"SessionRX600_E1_E20_SYSTEM" +[CONFIGURATIONS] +"Debug" +"Debug_RX600_E1_E20_SYSTEM" +"Release" +[CURRENT_CONFIGURATION] +"Debug" +[CURRENT_SESSION] +"DefaultSession" +[GENERAL_DATA_PROJECT] +[GENERAL_DATA_CONFIGURATION_Debug] +"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE" +[SESSIONS_Debug] +"DefaultSession" +"SessionRX600_E1_E20_SYSTEM" +[GENERAL_DATA_CONFIGURATION_Debug_RX600_E1_E20_SYSTEM] +"PROJECT_FILES_MODIFIED_DATA_TAG" "TRUE" +[SESSIONS_Debug_RX600_E1_E20_SYSTEM] +"DefaultSession" +"SessionRX600_E1_E20_SYSTEM" +[GENERAL_DATA_CONFIGURATION_Release] +"PROJECT_FILES_MODIFIED_DATA_TAG" "TRUE" +[SESSIONS_Release] +"DefaultSession" +"SessionRX600_E1_E20_SYSTEM" +[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionRX600_E1_E20_SYSTEM] +[GENERAL_DATA_SESSION_DefaultSession] +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_SessionRX600_E1_E20_SYSTEM] +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession] +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RX600_E1_E20_SYSTEM_DefaultSession] +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionRX600_E1_E20_SYSTEM] +[GENERAL_DATA_CONFIGURATION_SESSION_Release_DefaultSession] +[GENERAL_DATA_SESSION_SessionRX600_E1_E20_SYSTEM] +[END] diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/SessionRX600_E1_E20_SYSTEM.hsf b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/SessionRX600_E1_E20_SYSTEM.hsf new file mode 100644 index 000000000..625e8b593 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/SessionRX600_E1_E20_SYSTEM.hsf @@ -0,0 +1,72 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"2.3" +[SESSION_DETAILS] +"" +[INFORMATION] +"" +[GENERAL_DATA] +"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_TRUE_STORE_TAG" +[LANGUAGE] +"English" +[CONFIG_INFO_VD1] +0 +[CONFIG_INFO_VD2] +0 +[CONFIG_INFO_VD3] +0 +[CONFIG_INFO_VD4] +0 +[WINDOW_POSITION_STATE_DATA_VD1] +[WINDOW_POSITION_STATE_DATA_VD2] +[WINDOW_POSITION_STATE_DATA_VD3] +[WINDOW_POSITION_STATE_DATA_VD4] +[WINDOW_Z_ORDER] +[TARGET_NAME] +"RX600 E1/E20 SYSTEM" "" 0 +[STATUSBAR_STATEINFO_VD1] +"MasterShowState" 1 +"ApplicationShowState" 1 +"DebuggerShowState" 1 +[STATUSBAR_STATEINFO_VD2] +"MasterShowState" 1 +"ApplicationShowState" 1 +"DebuggerShowState" 1 +[STATUSBAR_STATEINFO_VD3] +"MasterShowState" 1 +"ApplicationShowState" 1 +"DebuggerShowState" 1 +[STATUSBAR_STATEINFO_VD4] +"MasterShowState" 1 +"ApplicationShowState" 1 +"DebuggerShowState" 1 +[STATUSBAR_DEBUGGER_PANESTATE_VD1] +[STATUSBAR_DEBUGGER_PANESTATE_VD2] +[STATUSBAR_DEBUGGER_PANESTATE_VD3] +[STATUSBAR_DEBUGGER_PANESTATE_VD4] +[DEBUGGER_OPTIONS] +"Unknown Options" +[DOWNLOAD_MODULES] +"$(CONFIGDIR)\$(PROJECTNAME).x" 0 "Elf/Dwarf2_KPIT" 0 0 1 0 +[CONNECT_ON_GO] +"FALSE" +[DOWNLOAD_MODULES_AFTER_BUILD] +"TRUE" +[REMOVE_BREAKPOINTS_ON_DOWNLOAD] +"TRUE" +[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION] +"FALSE" +[LIMIT_DISASSEMBLY_MEMORY_ACCESS] +"FALSE" +[DISABLE_MEMORY_ACCESS_DURING_EXECUTION] +"FALSE" +[DEBUGGER_OPTIONS_PROPERTIES] +"1" +[COMMAND_FILES] +[DEFAULT_DEBUG_FORMAT] +"" +[FLASH_DETAILS] +"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" +[BREAKPOINTS] +[END] diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/inthandler.h b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/inthandler.h new file mode 100644 index 000000000..f55efcaf6 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/inthandler.h @@ -0,0 +1,714 @@ +/***********************************************************************/ +/* */ +/* FILE :inthandler.h */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Interrupt Handler Declarations */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + +#ifndef INTHANDLER_H +#define INTHANDLER_H + +// Exception(Supervisor Instruction) +void INT_Excep_SuperVisorInst(void) __attribute__ ((interrupt)); + +// Exception(Undefined Instruction) +void INT_Excep_UndefinedInst(void) __attribute__ ((interrupt)); + +// Exception(Floating Point) +void INT_Excep_FloatingPoint(void) __attribute__ ((interrupt)); + +// NMI +void INT_NonMaskableInterrupt(void) __attribute__ ((interrupt)); + +// Dummy +void Dummy (void) __attribute__ ((interrupt)); + +// BRK +void INT_Excep_BRK(void) __attribute__ ((interrupt)); + +// vector 1 reserved +// vector 2 reserved +// vector 3 reserved +// vector 4 reserved +// vector 5 reserved +// vector 6 reserved +// vector 7 reserved +// vector 8 reserved +// vector 9 reserved +// vector 10 reserved +// vector 11 reserved +// vector 12 reserved +// vector 13 reserved +// vector 14 reserved +// vector 15 reserved + +// BUSERR + +void INT_Excep_BUSERR(void) __attribute__ ((interrupt)); + +// vector 17 reserved +// vector 18 reserved +// vector 19 reserved +// vector 20 reserved + +// FCU_FCUERR + +void INT_Excep_FCU_FCUERR(void) __attribute__ ((interrupt)); + +// vector 22 reserved + +// FCU_FRDYI + +void INT_Excep_FCU_FRDYI(void) __attribute__ ((interrupt)); + +// vector 24 reserved +// vector 25 reserved +// vector 26 reserved +// vector 27 reserved + +// CMTU0_CMT0 + +void INT_Excep_CMTU0_CMT0(void) __attribute__ ((interrupt)); + +// CMTU0_CMT1 + +void INT_Excep_CMTU0_CMT1(void) __attribute__ ((interrupt)); + +// CMTU1_CMT2 + +void INT_Excep_CMTU1_CMT2(void) __attribute__ ((interrupt)); + +// CMTU1_CMT3 + +void INT_Excep_CMTU1_CMT3(void) __attribute__ ((interrupt)); + +// vector 32 reserved +// vector 33 reserved +// vector 34 reserved +// vector 35 reserved +// vector 36 reserved +// vector 37 reserved +// vector 38 reserved +// vector 39 reserved +// vector 40 reserved +// vector 41 reserved +// vector 42 reserved +// vector 43 reserved +// vector 44 reserved +// vector 45 reserved +// vector 46 reserved +// vector 47 reserved +// vector 48 reserved +// vector 49 reserved +// vector 50 reserved +// vector 51 reserved +// vector 52 reserved +// vector 53 reserved +// vector 54 reserved +// vector 55 reserved +// vector 56 reserved +// vector 57 reserved +// vector 58 reserved +// vector 59 reserved +// vector 60 reserved +// vector 61 reserved +// vector 62 reserved +// vector 63 reserved + +// IRQ0 + +void INT_Excep_IRQ0(void) __attribute__ ((interrupt)); + +// IRQ1 + +void INT_Excep_IRQ1(void) __attribute__ ((interrupt)); + +// IRQ2 + +void INT_Excep_IRQ2(void) __attribute__ ((interrupt)); + +// IRQ3 + +void INT_Excep_IRQ3(void) __attribute__ ((interrupt)); + +// IRQ4 + +void INT_Excep_IRQ4(void) __attribute__ ((interrupt)); + +// IRQ5 + +void INT_Excep_IRQ5(void) __attribute__ ((interrupt)); + +// IRQ6 + +void INT_Excep_IRQ6(void) __attribute__ ((interrupt)); + +// IRQ7 + +void INT_Excep_IRQ7(void) __attribute__ ((interrupt)); + +// IRQ8 + +void INT_Excep_IRQ8(void) __attribute__ ((interrupt)); + +// IRQ9 + +void INT_Excep_IRQ9(void) __attribute__ ((interrupt)); + +// IRQ10 + +void INT_Excep_IRQ10(void) __attribute__ ((interrupt)); + +// IRQ11 + +void INT_Excep_IRQ11(void) __attribute__ ((interrupt)); + +// IRQ12 + +void INT_Excep_IRQ12(void) __attribute__ ((interrupt)); + +// IRQ13 + +void INT_Excep_IRQ13(void) __attribute__ ((interrupt)); + +// IRQ14 + +void INT_Excep_IRQ14(void) __attribute__ ((interrupt)); + +// IRQ15 + +void INT_Excep_IRQ15(void) __attribute__ ((interrupt)); + +// vector 80 reserved +// vector 81 reserved +// vector 82 reserved +// vector 83 reserved +// vector 84 reserved +// vector 85 reserved +// vector 86 reserved +// vector 87 reserved +// vector 88 reserved +// vector 89 reserved +// vector 90 reserved +// vector 91 reserved +// vector 92 reserved +// vector 93 reserved +// vector 94 reserved +// vector 95 reserved + +// WDT_WOVI + +void INT_Excep_WDT_WOVI(void) __attribute__ ((interrupt)); + +// vector 97 reserved + +// AD0_ADI0 + +void INT_Excep_AD0_ADI0(void) __attribute__ ((interrupt)); + +// AD1_ADI1 + +void INT_Excep_AD1_ADI1(void) __attribute__ ((interrupt)); + +// AD2_ADI2 + +void INT_Excep_AD2_ADI2(void) __attribute__ ((interrupt)); + +// AD3_ADI3 + +void INT_Excep_AD3_ADI3(void) __attribute__ ((interrupt)); + +// vector 102 reserved +// vector 103 reserved + +// TPU0_TGI0A + +void INT_Excep_TPU0_TGI0A(void) __attribute__ ((interrupt)); + +// TPU0_TGI0B + +void INT_Excep_TPU0_TGI0B(void) __attribute__ ((interrupt)); + +// TPU0_TGI0C + +void INT_Excep_TPU0_TGI0C(void) __attribute__ ((interrupt)); + +// TPU0_TGI0D + +void INT_Excep_TPU0_TGI0D(void) __attribute__ ((interrupt)); + +// TPU0_TCI0V + +void INT_Excep_TPU0_TCI0V(void) __attribute__ ((interrupt)); + +// vector 109 reserved +// vector 110 reserved + +// TPU1_TGI1A + +void INT_Excep_TPU1_TGI1A(void) __attribute__ ((interrupt)); + +// TPU1_TGI1B + +void INT_Excep_TPU1_TGI1B(void) __attribute__ ((interrupt)); + +// vector 113 reserved +// vector 114 reserved + +// TPU1_TCI1V + +void INT_Excep_TPU1_TCI1V(void) __attribute__ ((interrupt)); + +// TPU1_TCI1U + +void INT_Excep_TPU1_TCI1U(void) __attribute__ ((interrupt)); + +// TPU2_TGI2A + +void INT_Excep_TPU2_TGI2A(void) __attribute__ ((interrupt)); + +// TPU2_TGI2B + +void INT_Excep_TPU2_TGI2B(void) __attribute__ ((interrupt)); + +// vector 119 reserved + +// TPU2_TCI2V + +void INT_Excep_TPU2_TCI2V(void) __attribute__ ((interrupt)); + +// TPU2_TCI2U + +void INT_Excep_TPU2_TCI2U(void) __attribute__ ((interrupt)); + +// TPU3_TGI3A + +void INT_Excep_TPU3_TGI3A(void) __attribute__ ((interrupt)); + +// TPU3_TGI3B + +void INT_Excep_TPU3_TGI3B(void) __attribute__ ((interrupt)); + +// TPU3_TGI3C + +void INT_Excep_TPU3_TGI3C(void) __attribute__ ((interrupt)); + +// TPU3_TGI3D + +void INT_Excep_TPU3_TGI3D(void) __attribute__ ((interrupt)); + +// TPU3_TCI3V + +void INT_Excep_TPU3_TCI3V(void) __attribute__ ((interrupt)); + +// TPU4_TGI4A + +void INT_Excep_TPU4_TGI4A(void) __attribute__ ((interrupt)); + +// TPU4_TGI4B + +void INT_Excep_TPU4_TGI4B(void) __attribute__ ((interrupt)); + +// vector 129 reserved +// vector 130 reserved + +// TPU4_TCI4V + +void INT_Excep_TPU4_TCI4V(void) __attribute__ ((interrupt)); + +// TPU4_TCI4U + +void INT_Excep_TPU4_TCI4U(void) __attribute__ ((interrupt)); + +// TPU5_TGI5A + +void INT_Excep_TPU5_TGI5A(void) __attribute__ ((interrupt)); + +// TPU5_TGI5B + +void INT_Excep_TPU5_TGI5B(void) __attribute__ ((interrupt)); + +// vector 135 reserved + +// TPU5_TCI5V + +void INT_Excep_TPU5_TCI5V(void) __attribute__ ((interrupt)); + +// TPU5_TCI5U + +void INT_Excep_TPU5_TCI5U(void) __attribute__ ((interrupt)); + +// TPU6_TGI6A + +void INT_Excep_TPU6_TGI6A(void) __attribute__ ((interrupt)); + +// TPU6_TGI6B + +void INT_Excep_TPU6_TGI6B(void) __attribute__ ((interrupt)); + +// TPU6_TGI6C + +void INT_Excep_TPU6_TGI6C(void) __attribute__ ((interrupt)); + +// TPU6_TGI6D + +void INT_Excep_TPU6_TGI6D(void) __attribute__ ((interrupt)); + +// TPU6_TCI6V + +void INT_Excep_TPU6_TCI6V(void) __attribute__ ((interrupt)); + +// vector 143 reserved +// vector 144 reserved + +// TPU7_TGI7A + +void INT_Excep_TPU7_TGI7A(void) __attribute__ ((interrupt)); + +// TPU7_TGI7B + +void INT_Excep_TPU7_TGI7B(void) __attribute__ ((interrupt)); + +// vector 147 reserved +// vector 148 reserved + +// TPU7_TCI7V + +void INT_Excep_TPU7_TCI7V(void) __attribute__ ((interrupt)); + +// TPU7_TCI7U + +void INT_Excep_TPU7_TCI7U(void) __attribute__ ((interrupt)); + +// TPU8_TGI8A + +void INT_Excep_TPU8_TGI8A(void) __attribute__ ((interrupt)); + +// TPU8_TGI8B + +void INT_Excep_TPU8_TGI8B(void) __attribute__ ((interrupt)); + +// vector 153 reserved + +// TPU8_TCI8V + +void INT_Excep_TPU8_TCI8V(void) __attribute__ ((interrupt)); + +// TPU8_TCI8U + +void INT_Excep_TPU8_TCI8U(void) __attribute__ ((interrupt)); + +// TPU9_TGI9A + +void INT_Excep_TPU9_TGI9A(void) __attribute__ ((interrupt)); + +// TPU9_TGI9B + +void INT_Excep_TPU9_TGI9B(void) __attribute__ ((interrupt)); + +// TPU9_TGI9C + +void INT_Excep_TPU9_TGI9C(void) __attribute__ ((interrupt)); + +// TPU9_TGI9D + +void INT_Excep_TPU9_TGI9D(void) __attribute__ ((interrupt)); + +// TPU9_TCI9V + +void INT_Excep_TPU9_TCI9V(void) __attribute__ ((interrupt)); + +// TPU10_TGI10A + +void INT_Excep_TPU10_TGI10A(void) __attribute__ ((interrupt)); + +// TPU10_TGI10B + +void INT_Excep_TPU10_TGI10B(void) __attribute__ ((interrupt)); + +// vector 163 reserved +// vector 164 reserved + +// TPU10_TCI10V + +void INT_Excep_TPU10_TCI10V(void) __attribute__ ((interrupt)); + +// TPU10_TCI10U + +void INT_Excep_TPU10_TCI10U(void) __attribute__ ((interrupt)); + +// TPU11_TGI11A + +void INT_Excep_TPU11_TGI11A(void) __attribute__ ((interrupt)); + +// TPU11_TGI11B + +void INT_Excep_TPU11_TGI11B(void) __attribute__ ((interrupt)); + +// vector 169 reserved + +// TPU11_TCI11V + +void INT_Excep_TPU11_TCI11V(void) __attribute__ ((interrupt)); + +// TPU11_TCI11U + +void INT_Excep_TPU11_TCI11U(void) __attribute__ ((interrupt)); + +// vector 172 reserved +// vector 173 reserved + +// TMR0_CMI0A + +void INT_Excep_TMR0_CMI0A(void) __attribute__ ((interrupt)); + +// TMR0_CMI0B + +void INT_Excep_TMR0_CMI0B(void) __attribute__ ((interrupt)); + +// TMR0_OV0I + +void INT_Excep_TMR0_OV0I(void) __attribute__ ((interrupt)); + +// TMR1_CMI1A + +void INT_Excep_TMR1_CMI1A(void) __attribute__ ((interrupt)); + +// TMR1_CMI1B + +void INT_Excep_TMR1_CMI1B(void) __attribute__ ((interrupt)); + +// TMR1_OV1I + +void INT_Excep_TMR1_OV1I(void) __attribute__ ((interrupt)); + +// TMR2_CMI2A + +void INT_Excep_TMR2_CMI2A(void) __attribute__ ((interrupt)); + +// TMR2_CMI2B + +void INT_Excep_TMR2_CMI2B(void) __attribute__ ((interrupt)); + +// TMR2_OV2I + +void INT_Excep_TMR2_OV2I(void) __attribute__ ((interrupt)); + +// TMR3_CMI3A + +void INT_Excep_TMR3_CMI3A(void) __attribute__ ((interrupt)); + +// TMR3_CMI3B + +void INT_Excep_TMR3_CMI3B(void) __attribute__ ((interrupt)); + +// TMR3_OV3I + +void INT_Excep_TMR3_OV3I(void) __attribute__ ((interrupt)); + +// vector 186 reserved +// vector 187 reserved +// vector 188 reserved +// vector 189 reserved +// vector 190 reserved +// vector 191 reserved +// vector 192 reserved +// vector 193 reserved +// vector 194 reserved +// vector 195 reserved +// vector 196 reserved +// vector 197 reserved + +// DMAC_DMTEND0 + +void INT_Excep_DMAC_DMTEND0(void); + +// DMAC_DMTEND1 + +void INT_Excep_DMAC_DMTEND1(void) __attribute__ ((interrupt)); + +// DMAC_DMTEND2 + +void INT_Excep_DMAC_DMTEND2(void) __attribute__ ((interrupt)); + +// DMAC_DMTEND3 + +void INT_Excep_DMAC_DMTEND3(void) __attribute__ ((interrupt)); + +// vector 202 reserved +// vector 203 reserved +// vector 204 reserved +// vector 205 reserved +// vector 206 reserved +// vector 207 reserved +// vector 208 reserved +// vector 209 reserved +// vector 210 reserved +// vector 211 reserved +// vector 212 reserved +// vector 213 reserved + +// SCI0_ERI0 + +void INT_Excep_SCI0_ERI0(void) __attribute__ ((interrupt)); + +// SCI0_RXI0 + +void INT_Excep_SCI0_RXI0(void) __attribute__ ((interrupt)); + +// SCI0_TXI0 + +void INT_Excep_SCI0_TXI0(void) __attribute__ ((interrupt)); + +// SCI0_TEI0 + +void INT_Excep_SCI0_TEI0(void) __attribute__ ((interrupt)); + +// SCI1_ERI1 + +void INT_Excep_SCI1_ERI1(void) __attribute__ ((interrupt)); + +// SCI1_RXI1 + +void INT_Excep_SCI1_RXI1(void) __attribute__ ((interrupt)); + +// SCI1_TXI1 + +void INT_Excep_SCI1_TXI1(void) __attribute__ ((interrupt)); + +// SCI1_TEI1 + +void INT_Excep_SCI1_TEI1(void) __attribute__ ((interrupt)); + +// SCI2_ERI2 + +void INT_Excep_SCI2_ERI2(void) __attribute__ ((interrupt)); + +// SCI2_RXI2 + +void INT_Excep_SCI2_RXI2(void) __attribute__ ((interrupt)); + +// SCI2_TXI2 + +void INT_Excep_SCI2_TXI2(void) __attribute__ ((interrupt)); + +// SCI2_TEI2 + +void INT_Excep_SCI2_TEI2(void) __attribute__ ((interrupt)); + +// SCI3_ERI3 + +void INT_Excep_SCI3_ERI3(void) __attribute__ ((interrupt)); + +// SCI3_RXI3 + +void INT_Excep_SCI3_RXI3(void) __attribute__ ((interrupt)); + +// SCI3_TXI3 + +void INT_Excep_SCI3_TXI3(void) __attribute__ ((interrupt)); + +// SCI3_TEI3 + +void INT_Excep_SCI3_TEI3(void) __attribute__ ((interrupt)); + +// SCI4_ERI4 + +void INT_Excep_SCI4_ERI4(void) __attribute__ ((interrupt)); + +// SCI4_RXI4 + +void INT_Excep_SCI4_RXI4(void) __attribute__ ((interrupt)); + +// SCI4_TXI4 + +void INT_Excep_SCI4_TXI4(void) __attribute__ ((interrupt)); + +// SCI4_TEI4 + +void INT_Excep_SCI4_TEI4(void) __attribute__ ((interrupt)); + +// SCI5_ERI5 + +void INT_Excep_SCI5_ERI5(void) __attribute__ ((interrupt)); + +// SCI5_RXI5 + +void INT_Excep_SCI5_RXI5(void) __attribute__ ((interrupt)); + +// SCI5_TXI5 + +void INT_Excep_SCI5_TXI5(void) __attribute__ ((interrupt)); + +// SCI5_TEI5 + +void INT_Excep_SCI5_TEI5(void) __attribute__ ((interrupt)); + +// SCI6_ERI6 + +void INT_Excep_SCI6_ERI6(void) __attribute__ ((interrupt)); + +// SCI6_RXI6 + +void INT_Excep_SCI6_RXI6(void) __attribute__ ((interrupt)); + +// SCI6_TXI6 + +void INT_Excep_SCI6_TXI6(void) __attribute__ ((interrupt)); + +// SCI6_TEI6 + +void INT_Excep_SCI6_TEI6(void) __attribute__ ((interrupt)); + +// vector 242 reserved +// vector 243 reserved +// vector 244 reserved +// vector 245 reserved + +// RIIC0_EEI0 + +void INT_Excep_RIIC0_EEI0(void) __attribute__ ((interrupt)); + +// RIIC0_RXI0 + +void INT_Excep_RIIC0_RXI0(void) __attribute__ ((interrupt)); + +// RIIC0_TXI0 + +void INT_Excep_RIIC0_TXI0(void) __attribute__ ((interrupt)); + +// RIIC0_TEI0 + +void INT_Excep_RIIC0_TEI0(void) __attribute__ ((interrupt)); + +// RIIC1_EEI1 + +void INT_Excep_RIIC1_EEI1(void) __attribute__ ((interrupt)); + +// RIIC1_RXI1 + +void INT_Excep_RIIC1_RXI1(void) __attribute__ ((interrupt)); + +// RIIC1_TXI1 + +void INT_Excep_RIIC1_TXI1(void) __attribute__ ((interrupt)); + +// RIIC1_TEI1 + +void INT_Excep_RIIC1_TEI1(void) __attribute__ ((interrupt)); + +// vector 254 reserved +// vector 255 reserved + +//;<> +//;Power On Reset PC +extern void PowerON_Reset_PC(void) __attribute__ ((interrupt)); +//;<> + +#endif \ No newline at end of file diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/iodefine.h b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/iodefine.h new file mode 100644 index 000000000..05c3a1937 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/iodefine.h @@ -0,0 +1,10 @@ +/***********************************************************************/ +/* */ +/* FILE :iodefine.h */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Definition of I/O Register */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/typedefine.h b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/typedefine.h new file mode 100644 index 000000000..49b303a56 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/include/typedefine.h @@ -0,0 +1,23 @@ +/***********************************************************************/ +/* */ +/* FILE :typedefine.h */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Aliases of Integer Type */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + +typedef signed char _SBYTE; +typedef unsigned char _UBYTE; +typedef signed short _SWORD; +typedef unsigned short _UWORD; +typedef signed int _SINT; +typedef unsigned int _UINT; +typedef signed long _SDWORD; +typedef unsigned long _UDWORD; +typedef signed long long _SQWORD; +typedef unsigned long long _UQWORD; diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/main.c b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/main.c new file mode 100644 index 000000000..ce8b02afd --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/main.c @@ -0,0 +1,43 @@ +/***********************************************************************/ +/* */ +/* FILE :RTOSDemo.c */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Main Program */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + +#include "iodefine.h" + +#ifdef CPPAPP +//Initialize global constructors +extern "C" void __main() +{ + static int initialized; + if (! initialized) + { + typedef void (*pfunc) (); + extern pfunc __ctors[]; + extern pfunc __ctors_end[]; + pfunc *p; + + initialized = 1; + for (p = __ctors_end; p > __ctors; ) + (*--p) (); + + } +} +#endif + +int main(void) +{ + // TODO: add application code here + + while (1) { + } + return 0; +} diff --git a/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/vects.c b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/vects.c new file mode 100644 index 000000000..312308f1c --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RTOSDemo/vects.c @@ -0,0 +1,608 @@ +/***********************************************************************/ +/* */ +/* FILE :vects.c */ +/* DATE :Wed, Aug 25, 2010 */ +/* DESCRIPTION :Vector Table */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by KPIT GNU Project Generator. */ +/* */ +/***********************************************************************/ + + + + +#include "inthandler.h" + +typedef void (*fp) (void); +extern void start(void); +extern void stack (void); + +#define FVECT_SECT __attribute__ ((section (".fvectors"))) + +const fp HardwareVectors[] FVECT_SECT = { +//;0xffffff80 Reserved + (fp)0, +//;0xffffff84 Reserved + (fp)0, +//;0xffffff88 Reserved + (fp)0, +//;0xffffff8C Reserved + (fp)0, +//;0xffffff90 Reserved + (fp)0, +//;0xffffff94 Reserved + (fp)0, +//;0xffffff98 Reserved + (fp)0, +//;0xffffff9C Reserved + (fp)0, +//;0xffffffA0 Reserved + (fp)0, +//;0xffffffA4 Reserved + (fp)0, +//;0xffffffA8 Reserved + (fp)0, +//;0xffffffAC Reserved + (fp)0, +//;0xffffffB0 Reserved + (fp)0, +//;0xffffffB4 Reserved + (fp)0, +//;0xffffffB8 Reserved + (fp)0, +//;0xffffffBC Reserved + (fp)0, +//;0xffffffC0 Reserved + (fp)0, +//;0xffffffC4 Reserved + (fp)0, +//;0xffffffC8 Reserved + (fp)0, +//;0xffffffCC Reserved + (fp)0, +//;0xffffffd0 Exception(Supervisor Instruction) + INT_Excep_SuperVisorInst, +//;0xffffffd4 Reserved + (fp)0, +//;0xffffffd8 Reserved + (fp)0, +//;0xffffffdc Exception(Undefined Instruction) + INT_Excep_UndefinedInst, +//;0xffffffe0 Reserved + (fp)0, +//;0xffffffe4 Exception(Floating Point) + INT_Excep_FloatingPoint, +//;0xffffffe8 Reserved + (fp)0, +//;0xffffffec Reserved + (fp)0, +//;0xfffffff0 Reserved + (fp)0, +//;0xfffffff4 Reserved + (fp)0, +//;0xfffffff8 NMI + INT_NonMaskableInterrupt, +//;0xfffffffc RESET +//;<> +//;Power On Reset PC + start +//;<> +}; + +#define RVECT_SECT __attribute__ ((section (".rvectors"))) + +const fp RelocatableVectors[] RVECT_SECT = { +//;0x0000 Reserved + (fp)0, +//;0x0004 Reserved + (fp)0, +//;0x0008 Reserved + (fp)0, +//;0x000C Reserved + (fp)0, +//;0x0010 Reserved + (fp)0, +//;0x0014 Reserved + (fp)0, +//;0x0018 Reserved + (fp)0, +//;0x001C Reserved + (fp)0, +//;0x0020 Reserved + (fp)0, +//;0x0024 Reserved + (fp)0, +//;0x0028 Reserved + (fp)0, +//;0x002C Reserved + (fp)0, +//;0x0030 Reserved + (fp)0, +//;0x0034 Reserved + (fp)0, +//;0x0038 Reserved + (fp)0, +//;0x003C Reserved + (fp)0, +//;0x0040 BUSERR + (fp)INT_Excep_BUSERR, +//;0x0044 Reserved + (fp)0, +//;0x0048 Reserved + (fp)0, +//;0x004C Reserved + (fp)0, +//;0x0050 Reserved + (fp)0, +//;0x0054 FCUERR + (fp)INT_Excep_FCU_FCUERR, +//;0x0058 Reserved + (fp)0, +//;0x005C FRDYI + (fp)INT_Excep_FCU_FRDYI, +//;0x0060 Reserved + (fp)0, +//;0x0064 Reserved + (fp)0, +//;0x0068 Reserved + (fp)0, +//;0x006C Reserved + (fp)0, +//;0x0070 CMTU0_CMT0 + (fp)INT_Excep_CMTU0_CMT0, +//;0x0074 CMTU0_CMT1 + (fp)INT_Excep_CMTU0_CMT1, +//;0x0078 CMTU1_CMT2 + (fp)INT_Excep_CMTU1_CMT2, +//;0x007C CMTU1_CMT3 + (fp)INT_Excep_CMTU1_CMT3, +//;0x0080 Reserved + (fp)0, +//;0x0084 Reserved + (fp)0, +//;0x0088 Reserved + (fp)0, +//;0x008C Reserved + (fp)0, +//;0x0090 Reserved + (fp)0, +//;0x0094 Reserved + (fp)0, +//;0x0098 Reserved + (fp)0, +//;0x009C Reserved + (fp)0, +//;0x00A0 Reserved + (fp)0, +//;0x00A4 Reserved + (fp)0, +//;0x00A8 Reserved + (fp)0, +//;0x00AC Reserved + (fp)0, +//;0x00B0 Reserved + (fp)0, +//;0x00B4 Reserved + (fp)0, +//;0x00B8 Reserved + (fp)0, +//;0x00BC Reserved + (fp)0, +//;0x00C0 Reserved + (fp)0, +//;0x00C4 Reserved + (fp)0, +//;0x00C8 Reserved + (fp)0, +//;0x00CC Reserved + (fp)0, +//;0x00D0 Reserved + (fp)0, +//;0x00D4 Reserved + (fp)0, +//;0x00D8 Reserved + (fp)0, +//;0x00DC Reserved + (fp)0, +//;0x00E0 Reserved + (fp)0, +//;0x00E4 Reserved + (fp)0, +//;0x00E8 Reserved + (fp)0, +//;0x00EC Reserved + (fp)0, +//;0x00F0 Reserved + (fp)0, +//;0x00F4 Reserved + (fp)0, +//;0x00F8 Reserved + (fp)0, +//;0x00FC Reserved + (fp)0, +//;0x0100 IRQ0 + (fp)INT_Excep_IRQ0, +//;0x0104 IRQ1 + (fp)INT_Excep_IRQ1, +//;0x0108 IRQ2 + (fp)INT_Excep_IRQ2, +//;0x010C IRQ3 + (fp)INT_Excep_IRQ3, +//;0x0110 IRQ4 + (fp)INT_Excep_IRQ4, +//;0x0114 IRQ5 + (fp)INT_Excep_IRQ5, +//;0x0118 IRQ6 + (fp)INT_Excep_IRQ6, +//;0x011C IRQ7 + (fp)INT_Excep_IRQ7, +//;0x0120 IRQ8 + (fp)INT_Excep_IRQ8, +//;0x0124 IRQ9 + (fp)INT_Excep_IRQ9, +//;0x0128 IRQ10 + (fp)INT_Excep_IRQ10, +//;0x012C IRQ11 + (fp)INT_Excep_IRQ11, +//;0x0130 IRQ12 + (fp)INT_Excep_IRQ12, +//;0x0134 IRQ13 + (fp)INT_Excep_IRQ13, +//;0x0138 IRQ14 + (fp)INT_Excep_IRQ14, +//;0x013C IRQ15 + (fp)INT_Excep_IRQ15, +//;0x0140 Reserved + (fp)0, +//;0x0144 Reserved + (fp)0, +//;0x0148 Reserved + (fp)0, +//;0x014C Reserved + (fp)0, +//;0x0150 Reserved + (fp)0, +//;0x0154 Reserved + (fp)0, +//;0x0158 Reserved + (fp)0, +//;0x015C Reserved + (fp)0, +//;0x0160 Reserved + (fp)0, +//;0x0164 Reserved + (fp)0, +//;0x0168 Reserved + (fp)0, +//;0x016C Reserved + (fp)0, +//;0x0170 Reserved + (fp)0, +//;0x0174 Reserved + (fp)0, +//;0x0178 Reserved + (fp)0, +//;0x017C Reserved + (fp)0, +//;0x0180 WDT_WOVI + (fp)INT_Excep_WDT_WOVI, +//;0x0184 Reserved + (fp)0, +//;0x0188 AD0_ADI0 + (fp)INT_Excep_AD0_ADI0, +//;0x018C AD1_ADI1 + (fp)INT_Excep_AD1_ADI1, +//;0x0190 AD2_ADI2 + (fp)INT_Excep_AD2_ADI2, +//;0x0194 AD3_ADI3 + (fp)INT_Excep_AD3_ADI3, +//;0x0198 Reserved + (fp)0, +//;0x019C Reserved + (fp)0, +//;0x01A0 TPU0_TGI0A + (fp)INT_Excep_TPU0_TGI0A, +//;0x01A4 TPU0_TGI0B + (fp)INT_Excep_TPU0_TGI0B, +//;0x01A8 TPU0_TGI0C + (fp)INT_Excep_TPU0_TGI0C, +//;0x01AC TPU0_TGI0D + (fp)INT_Excep_TPU0_TGI0D, +//;0x01B0 TPU0_TCI0V + (fp)INT_Excep_TPU0_TCI0V, +//;0x01B4 Reserved + (fp)0, +//;0x01B8 Reserved + (fp)0, +//;0x01BC TPU1_TGI1A + (fp)INT_Excep_TPU1_TGI1A, +//;0x01C0 TPU1_TGI1B + (fp)INT_Excep_TPU1_TGI1B, +//;0x01C4 Reserved + (fp)0, +//;0x01C8 Reserved + (fp)0, +//;0x01CC TPU1_TCI1V + (fp)INT_Excep_TPU1_TCI1V, +//;0x01D0 TPU1_TCI1U + (fp)INT_Excep_TPU1_TCI1U, +//;0x01D4 TPU2_TGI2A + (fp)INT_Excep_TPU2_TGI2A, +//;0x01D8 TPU2_TGI2B + (fp)INT_Excep_TPU2_TGI2B, +//;0x01DC Reserved + (fp)0, +//;0x01E0 TPU2_TCI2V + (fp)INT_Excep_TPU2_TCI2V, +//;0x01E4 TPU2_TCI2U + (fp)INT_Excep_TPU2_TCI2U, +//;0x01E8 TPU3_TGI3A + (fp)INT_Excep_TPU3_TGI3A, +//;0x01EC TPU3_TGI3B + (fp)INT_Excep_TPU3_TGI3B, +//;0x01F0 TPU3_TGI3C + (fp)INT_Excep_TPU3_TGI3C, +//;0x01F4 TPU3_TGI3D + (fp)INT_Excep_TPU3_TGI3D, +//;0x01F8 TPU3_TCI3V + (fp)INT_Excep_TPU3_TCI3V, +//;0x01FC TPU4_TGI4A + (fp)INT_Excep_TPU4_TGI4A, +//;0x0200 TPU4_TGI4B + (fp)INT_Excep_TPU4_TGI4B, +//;0x0204 Reserved + (fp)0, +//;0x0208 Reserved + (fp)0, +//;0x020C TPU4_TCI4V + (fp)INT_Excep_TPU4_TCI4V, +//;0x0210 TPU4_TCI4U + (fp)INT_Excep_TPU4_TCI4U, +//;0x0214 TPU5_TGI5A + (fp)INT_Excep_TPU5_TGI5A, +//;0x0218 TPU5_TGI5B + (fp)INT_Excep_TPU5_TGI5B, +//;0x021C Reserved + (fp)0, +//;0x0220 TPU5_TCI5V + (fp)INT_Excep_TPU5_TCI5V, +//;0x0224 TPU5_TCI5U + (fp)INT_Excep_TPU5_TCI5U, +//;0x0228 TPU6_TGI6A + (fp)INT_Excep_TPU6_TGI6A, +//;0x022C TPU6_TGI6B + (fp)INT_Excep_TPU6_TGI6B, +//;0x0230 TPU6_TGI6C + (fp)INT_Excep_TPU6_TGI6C, +//;0x0234 TPU6_TGI6D + (fp)INT_Excep_TPU6_TGI6D, +//;0x0238 TPU6_TCI6V + (fp)INT_Excep_TPU6_TCI6V, +//;0x023C Reserved + (fp)0, +//;0x0240 Reserved + (fp)0, +//;0x0244 TPU7_TGI7A + (fp)INT_Excep_TPU7_TGI7A, +//;0x0248 TPU7_TGI7B + (fp)INT_Excep_TPU7_TGI7B, +//;0x024C Reserved + (fp)0, +//;0x0250 Reserved + (fp)0, +//;0x0254 TPU7_TCI7V + (fp)INT_Excep_TPU7_TCI7V, +//;0x0258 TPU7_TCI7U + (fp)INT_Excep_TPU7_TCI7U, +//;0x025C TPU8_TGI8A + (fp)INT_Excep_TPU8_TGI8A, +//;0x0260 TPU8_TGI8B + (fp)INT_Excep_TPU8_TGI8B, +//;0x0264 Reserved + (fp)0, +//;0x0268 TPU8_TCI8V + (fp)INT_Excep_TPU8_TCI8V, +//;0x026C TPU8_TCI8U + (fp)INT_Excep_TPU8_TCI8U, +//;0x0270 TPU9_TGI9A + (fp)INT_Excep_TPU9_TGI9A, +//;0x0274 TPU9_TGI9B + (fp)INT_Excep_TPU9_TGI9B, +//;0x0278 TPU9_TGI9C + (fp)INT_Excep_TPU9_TGI9C, +//;0x027C TPU9_TGI9D + (fp)INT_Excep_TPU9_TGI9D, +//;0x0280 TPU9_TCI9V + (fp)INT_Excep_TPU9_TCI9V, +//;0x0284 TPU10_TGI10A + (fp)INT_Excep_TPU10_TGI10A, +//;0x0288 TPU10_TGI10B + (fp)INT_Excep_TPU10_TGI10B, +//;0x028C Reserved + (fp)0, +//;0x0290 Reserved + (fp)0, +//;0x0294 TPU10_TCI10V + (fp)INT_Excep_TPU10_TCI10V, +//;0x0298 TPU10_TCI10U + (fp)INT_Excep_TPU10_TCI10U, +//;0x029C TPU11_TGI11A + (fp)INT_Excep_TPU11_TGI11A, +//;0x02A0 TPU11_TGI11B + (fp)INT_Excep_TPU11_TGI11B, +//;0x02A4 Reserved + (fp)0, +//;0x02A8 TPU11_TCI11V + (fp)INT_Excep_TPU11_TCI11V, +//;0x02AC TPU11_TCI11U + (fp)INT_Excep_TPU11_TCI11U, +//;0x02B0 Reserved + (fp)0, +//;0x02B4 Reserved + (fp)0, +//;0x02B8 TMR0_CMI0A + (fp)INT_Excep_TMR0_CMI0A, +//;0x02BC TMR0_CMI0B + (fp)INT_Excep_TMR0_CMI0B, +//;0x02C0 TMR0_OV0I + (fp)INT_Excep_TMR0_OV0I, +//;0x02C4 TMR1_CMI1A + (fp)INT_Excep_TMR1_CMI1A, +//;0x02C8 TMR1_CMI1B + (fp)INT_Excep_TMR1_CMI1B, +//;0x02CC TMR1_OV1I + (fp)INT_Excep_TMR1_OV1I, +//;0x02D0 TMR2_CMI2A + (fp)INT_Excep_TMR2_CMI2A, +//;0x02D4 TMR2_CMI2B + (fp)INT_Excep_TMR2_CMI2B, +//;0x02D8 TMR2_OV2I + (fp)INT_Excep_TMR2_OV2I, +//;0x02DC TMR3_CMI3A + (fp)INT_Excep_TMR3_CMI3A, +//;0x02E0 TMR3_CMI3B + (fp)INT_Excep_TMR3_CMI3B, +//;0x02E4 TMR3_OV3I + (fp)INT_Excep_TMR3_OV3I, +//;0x02E8 Reserved + (fp)0, +//;0x02EC Reserved + (fp)0, +//;0x02F0 Reserved + (fp)0, +//;0x02F4 Reserved + (fp)0, +//;0x02F8 Reserved + (fp)0, +//;0x02FC Reserved + (fp)0, +//;0x0300 Reserved + (fp)0, +//;0x0304 Reserved + (fp)0, +//;0x0308 Reserved + (fp)0, +//;0x030C Reserved + (fp)0, +//;0x0310 Reserved + (fp)0, +//;0x0314 Reserved + (fp)0, +//;0x0318 DMAC_DMTEND0 + (fp)INT_Excep_DMAC_DMTEND0, +//;0x031C DMAC_DMTEND1 + (fp)INT_Excep_DMAC_DMTEND1, +//;0x0320 DMAC_DMTEND2 + (fp)INT_Excep_DMAC_DMTEND2, +//;0x0324 DMAC_DMTEND3 + (fp)INT_Excep_DMAC_DMTEND3, +//;0x0328 Reserved + (fp)0, +//;0x032C Reserved + (fp)0, +//;0x0330 Reserved + (fp)0, +//;0x0334 Reserved + (fp)0, +//;0x0338 Reserved + (fp)0, +//;0x033C Reserved + (fp)0, +//;0x0340 Reserved + (fp)0, +//;0x0344 Reserved + (fp)0, +//;0x0348 Reserved + (fp)0, +//;0x034C Reserved + (fp)0, +//;0x0350 Reserved + (fp)0, +//;0x0354 Reserved + (fp)0, +//;0x0358 SCI0_ERI0 + (fp)INT_Excep_SCI0_ERI0, +//;0x035C SCI0_RXI0 + (fp)INT_Excep_SCI0_RXI0, +//;0x0360 SCI0_TXI0 + (fp)INT_Excep_SCI0_TXI0, +//;0x0364 SCI0_TEI0 + (fp)INT_Excep_SCI0_TEI0, +//;0x0368 SCI1_ERI1 + (fp)INT_Excep_SCI1_ERI1, +//;0x036C SCI1_RXI1 + (fp)INT_Excep_SCI1_RXI1, +//;0x0370 SCI1_TXI1 + (fp)INT_Excep_SCI1_TXI1, +//;0x0374 SCI1_TEI1 + (fp)INT_Excep_SCI1_TEI1, +//;0x0378 SCI2_ERI2 + (fp)INT_Excep_SCI2_ERI2, +//;0x037C SCI2_RXI2 + (fp)INT_Excep_SCI2_RXI2, +//;0x0380 SCI2_TXI2 + (fp)INT_Excep_SCI2_TXI2, +//;0x0384 SCI2_TEI2 + (fp)INT_Excep_SCI2_TEI2, +//;0x0388 SCI3_ERI3 + (fp)INT_Excep_SCI3_ERI3, +//;0x038C SCI3_RXI3 + (fp)INT_Excep_SCI3_RXI3, +//;0x0390 SCI3_TXI3 + (fp)INT_Excep_SCI3_TXI3, +//;0x0394 SCI3_TEI3 + (fp)INT_Excep_SCI3_TEI3, +//;0x0398 SCI4_ERI4 + (fp)INT_Excep_SCI4_ERI4, +//;0x039C SCI4_RXI4 + (fp)INT_Excep_SCI4_RXI4, +//;0x03A0 SCI4_TXI4 + (fp)INT_Excep_SCI4_TXI4, +//;0x03A4 SCI4_TEI4 + (fp)INT_Excep_SCI4_TEI4, +//;0x03A8 SCI5_ERI5 + (fp)INT_Excep_SCI5_ERI5, +//;0x03AC SCI5_RXI5 + (fp)INT_Excep_SCI5_RXI5, +//;0x03B0 SCI5_TXI5 + (fp)INT_Excep_SCI5_TXI5, +//;0x03B4 SCI5_TEI5 + (fp)INT_Excep_SCI5_TEI5, +//;0x03B8 SCI6_ERI6 + (fp)INT_Excep_SCI6_ERI6, +//;0x03BC SCI6_RXI6 + (fp)INT_Excep_SCI6_RXI6, +//;0x03C0 SCI6_TXI6 + (fp)INT_Excep_SCI6_TXI6, +//;0x03C4 SCI6_TEI6 + (fp)INT_Excep_SCI6_TEI6, +//;0x03C8 Reserved + (fp)0, +//;0x03CC Reserved + (fp)0, +//;0x03D0 Reserved + (fp)0, +//;0x03D4 Reserved + (fp)0, +//;0x03D8 RIIC0_EEI0 + (fp)INT_Excep_RIIC0_EEI0, +//;0x03DC RIIC0_RXI0 + (fp)INT_Excep_RIIC0_RXI0, +//;0x03E0 RIIC0_TXI0 + (fp)INT_Excep_RIIC0_TXI0, +//;0x03E4 RIIC0_TEI0 + (fp)INT_Excep_RIIC0_TEI0, +//;0x03E8 RIIC1_EEI1 + (fp)INT_Excep_RIIC1_EEI1, +//;0x03EC RIIC1_RXI1 + (fp)INT_Excep_RIIC1_RXI1, +//;0x03F0 RIIC1_TXI1 + (fp)INT_Excep_RIIC1_TXI1, +//;0x03F4 RIIC1_TEI1 + (fp)INT_Excep_RIIC1_TEI1, +//;0x03F8 Reserved + (fp)0, +//;0x03FC Reserved + (fp)0, +}; diff --git a/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.Hbp b/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.Hbp new file mode 100644 index 000000000..241474974 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.Hbp @@ -0,0 +1,2 @@ +[Setting] +ToolChain=0 diff --git a/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.hws b/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.hws new file mode 100644 index 000000000..35f1d261f --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.hws @@ -0,0 +1,40 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"11.0" +[WORKSPACE_DETAILS] +"RX600_RX62N_MDK_GNURX" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RX600_RX62N_MDK_GNURX.hws" "RX" "KPIT GNURX [ELF]" +[SHARED_WORKSPACE_CONTROL_STATUS] +"" "" "" +"" "" "" +[PROJECTS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\RTOSDemo.hwp" 0 +[INFORMATION] +"No workspace information available" +[SCRAP] +[PROJECT_DEPENDENCY] +[WORKSPACE_PROPERTIES] +[HELP_FILES] +[GENERAL_DATA_PROJECT] +[USERMENUTOOLS] +[CUSTOMPLACEHOLDERS] +[MAKEFILE_BUILD_INFO] +"$(WORKSPDIR)\make\$(PROJECTNAME)_$(CONFIGNAME).mak" "" "$(WORKSPDIR)\make" 0 0 0 +[VD_CONFIGURATION_OPTIONS] +"ACTIVE_DESKTOP" "0" +[VD_CONFIGURATIONS] +"0" "Default1" "1" +"1" "Default2" "1" +"2" "Default3" "1" +"3" "Default4" "1" +[OPTIONS_DEBUG_TAB] +0 0 0 0 0 +[VCS] +"" "" "" 0 +[VCS_PROJECT] +[MAKEFILE_ENV_STRINGS] +[MAKEFILE_ENV_FLAGS] +1 0 0 +[MAKEFILE_CLEAN_INFO] +"" +[END] diff --git a/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.tws b/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.tws new file mode 100644 index 000000000..ec05cd4c3 --- /dev/null +++ b/Demo/RX600_RX62N-MDK_GNURX/RX600_RX62N_MDK_GNURX.tws @@ -0,0 +1,17 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"1.2" +[CURRENT_PROJECT] +"RTOSDemo" +[GENERAL_DATA] +[BREAKPOINTS] +[OPEN_WORKSPACE_FILES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\main.c" +[WORKSPACE_FILE_STATES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\GNU-Files\start.asm" 0 0 1104 409 0 0 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N_MDK_GNURX\RTOSDemo\main.c" -4 -23 1314 638 1 1 +[LOADED_PROJECTS] +"RTOSDemo" +[END]