From: Brock Zheng Techyauld Ltd <yzheng@techyauld.com>
Date: Tue, 6 Jun 2017 01:06:21 +0000 (+0800)
Subject: Fixup bug in PMIC TPS65217 register address definition
X-Git-Tag: v2017.07-rc2~57^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=abf54bf978ed9932d69ee7f937012398d0d8d08f;p=u-boot

Fixup bug in PMIC TPS65217 register address definition

The addresses of the registers in TI TPS65217 are not continuous.
     There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17
     register available.

     Fixup the enum values by adding a 'reserved' placeholder to correct
     the addresses higher than 0x17.

     Series-to: Heiko Schocher <hs@denx.de>

Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
---

diff --git a/include/power/tps65217.h b/include/power/tps65217.h
index 69a49f76fe..cb07ea5ce6 100644
--- a/include/power/tps65217.h
+++ b/include/power/tps65217.h
@@ -38,6 +38,7 @@ enum {
 	TPS65217_DEFLS1,
 	TPS65217_DEFLS2,
 	TPS65217_ENABLE,
+	TPS65217_RESERVED0, /* no 0x17 register available */
 	TPS65217_DEFUVLO,
 	TPS65217_SEQ1,
 	TPS65217_SEQ2,