From: Simon Glass <sjg@chromium.org>
Date: Sun, 17 Jan 2016 23:11:30 +0000 (-0700)
Subject: x86: Bring up northbridge, pch and lpc after the CPUs
X-Git-Tag: v2016.03-rc1~108
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ac643e0363b4fe32e2742ede8084fc9999bd0bfb;p=u-boot

x86: Bring up northbridge, pch and lpc after the CPUs

These devices currently need to be inited early in boot. Once we have the
init in the right places (with each device doing its own init and no
problems with ordering) we should be able to remove this. For now it is
needed to keep things working.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 3c812e97b4..6c3a748f75 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -709,8 +709,24 @@ static int x86_init_cpus(void)
 
 int cpu_init_r(void)
 {
-	if (ll_boot_init())
-		return x86_init_cpus();
+	struct udevice *dev;
+	int ret;
+
+	if (!ll_boot_init())
+		return 0;
+
+	ret = x86_init_cpus();
+	if (ret)
+		return ret;
+
+	/*
+	 * Set up the northbridge, PCH and LPC if available. Note that these
+	 * may have had some limited pre-relocation init if they were probed
+	 * before relocation, but this is post relocation.
+	 */
+	uclass_first_device(UCLASS_NORTHBRIDGE, &dev);
+	uclass_first_device(UCLASS_PCH, &dev);
+	uclass_first_device(UCLASS_LPC, &dev);
 
 	return 0;
 }