From: Marek Vasut Date: Sat, 1 Aug 2015 18:12:31 +0000 (+0200) Subject: ddr: altera: sdram: Clean up set_sdr_mp_pacing() X-Git-Tag: v2015.10-rc2~205 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ad2ba5d60774172c0651d6ed5e2e889251ed0d32;p=u-boot ddr: altera: sdram: Clean up set_sdr_mp_pacing() Get rid of the constant clrsetbits_le32(), instead prepare the whole content of the register once and write it at the end of the function. Signed-off-by: Marek Vasut --- diff --git a/drivers/ddr/altera/sdram.c b/drivers/ddr/altera/sdram.c index f3248055d1..e41815b3a1 100644 --- a/drivers/ddr/altera/sdram.c +++ b/drivers/ddr/altera/sdram.c @@ -441,31 +441,26 @@ static void set_sdr_mp_weight(void) static void set_sdr_mp_pacing(void) { - debug("Configuring MPPACING_MPPACING_0\n"); - clrsetbits_le32(&sdr_ctrl->mp_pacing0, - SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 << + const u32 mp_pacing0 = + (CONFIG_HPS_SDR_CTRLCFG_MPPACING_0_THRESHOLD1_31_0 << SDR_CTRLGRP_MPPACING_MPPACING_0_THRESHOLD1_31_0_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_pacing1, - SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 << - SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_pacing1, - SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 << + const u32 mp_pacing1 = + (CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD1_59_32 << + SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD1_59_32_LSB) | + (CONFIG_HPS_SDR_CTRLCFG_MPPACING_1_THRESHOLD2_3_0 << SDR_CTRLGRP_MPPACING_MPPACING_1_THRESHOLD2_3_0_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_pacing2, - SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 << + const u32 mp_pacing2 = + (CONFIG_HPS_SDR_CTRLCFG_MPPACING_2_THRESHOLD2_35_4 << SDR_CTRLGRP_MPPACING_MPPACING_2_THRESHOLD2_35_4_LSB); - - clrsetbits_le32(&sdr_ctrl->mp_pacing3, - SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_MASK, - CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 << + const u32 mp_pacing3 = + (CONFIG_HPS_SDR_CTRLCFG_MPPACING_3_THRESHOLD2_59_36 << SDR_CTRLGRP_MPPACING_MPPACING_3_THRESHOLD2_59_36_LSB); + + debug("Configuring MPPACING_MPPACING_0\n"); + writel(mp_pacing0, &sdr_ctrl->mp_pacing0); + writel(mp_pacing1, &sdr_ctrl->mp_pacing1); + writel(mp_pacing2, &sdr_ctrl->mp_pacing2); + writel(mp_pacing3, &sdr_ctrl->mp_pacing3); } static void set_sdr_mp_threshold(void)