From: Marek Vasut Date: Mon, 27 Nov 2017 04:37:53 +0000 (+0100) Subject: ARM: rmobile: Configure DRAM sizes from DT X-Git-Tag: v2018.01-rc1~26^2~10 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=aee24b594a0fd9814b7819b565a35c84b4710b70;p=u-boot ARM: rmobile: Configure DRAM sizes from DT Drop the ad-hoc DRAM configuration with macros and just decode the DRAM configuration from device tree instead. This makes it far cleaner and easier. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index f21360c4c5..882a35c140 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -109,36 +109,16 @@ int board_init(void) int dram_init(void) { - gd->ram_size = PHYS_SDRAM_1_SIZE; -#if (CONFIG_NR_DRAM_BANKS >= 2) - gd->ram_size += PHYS_SDRAM_2_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 3) - gd->ram_size += PHYS_SDRAM_3_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 4) - gd->ram_size += PHYS_SDRAM_4_SIZE; -#endif + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; return 0; } int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#if (CONFIG_NR_DRAM_BANKS >= 2) - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 3) - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; - gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 4) - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; - gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; -#endif + fdtdec_setup_memory_banksize(); + return 0; } diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c index 000dd51ab7..ed891c833c 100644 --- a/board/renesas/ulcb/ulcb.c +++ b/board/renesas/ulcb/ulcb.c @@ -97,35 +97,15 @@ int board_init(void) int dram_init(void) { - gd->ram_size = PHYS_SDRAM_1_SIZE; -#if (CONFIG_NR_DRAM_BANKS >= 2) - gd->ram_size += PHYS_SDRAM_2_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 3) - gd->ram_size += PHYS_SDRAM_3_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 4) - gd->ram_size += PHYS_SDRAM_4_SIZE; -#endif + if (fdtdec_setup_memory_size() != 0) + return -EINVAL; return 0; } int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#if (CONFIG_NR_DRAM_BANKS >= 2) - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 3) - gd->bd->bi_dram[2].start = PHYS_SDRAM_3; - gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE; -#endif -#if (CONFIG_NR_DRAM_BANKS >= 4) - gd->bd->bi_dram[3].start = PHYS_SDRAM_4; - gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE; -#endif + fdtdec_setup_memory_banksize(); + return 0; }