From: richardbarry <richardbarry@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Wed, 12 Aug 2009 16:10:55 +0000 (+0000)
Subject: Add LM3Sxxx Rowley demo.
X-Git-Tag: V6.0.0~81
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b16c90e29db648b126cc7ed546b96f66d749f9ec;p=freertos

Add LM3Sxxx Rowley demo.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@847 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---

diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/FreeRTOSConfig.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/FreeRTOSConfig.h
new file mode 100644
index 000000000..a001565d1
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/FreeRTOSConfig.h
@@ -0,0 +1,108 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under
+	the terms of the GNU General Public License (version 2) as published by the
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the
+	source code for proprietary components outside of the FreeRTOS kernel.
+	Alternative commercial license and support terms are also available upon
+	request.  See the licensing section of http://www.FreeRTOS.org for full
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION			1
+#define configUSE_IDLE_HOOK				0
+#define configUSE_TICK_HOOK				1
+#define configCPU_CLOCK_HZ				( ( unsigned portLONG ) 50000000 )
+#define configTICK_RATE_HZ				( ( portTickType ) 1000 )
+#define configMINIMAL_STACK_SIZE		( ( unsigned portSHORT ) 80 )
+#define configTOTAL_HEAP_SIZE			( ( size_t ) ( 24000 ) )
+#define configMAX_TASK_NAME_LEN			( 12 )
+#define configUSE_TRACE_FACILITY		1
+#define configUSE_16_BIT_TICKS			0
+#define configIDLE_SHOULD_YIELD			0
+#define configUSE_CO_ROUTINES 			0
+#define configUSE_MUTEXES				1
+#define configCHECK_FOR_STACK_OVERFLOW	2
+#define configUSE_RECURSIVE_MUTEXES		1
+#define configQUEUE_REGISTRY_SIZE		10
+#define configGENERATE_RUN_TIME_STATS	1
+#define configUSE_MALLOC_FAILED_HOOK	1
+
+#define configMAX_PRIORITIES		( ( unsigned portBASE_TYPE ) 5 )
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+
+#define INCLUDE_vTaskPrioritySet			1
+#define INCLUDE_uxTaskPriorityGet			1
+#define INCLUDE_vTaskDelete					1
+#define INCLUDE_vTaskCleanUpResources		0
+#define INCLUDE_vTaskSuspend				1
+#define INCLUDE_vTaskDelayUntil				1
+#define INCLUDE_vTaskDelay					1
+#define INCLUDE_uxTaskGetStackHighWaterMark	1
+
+
+
+#define configKERNEL_INTERRUPT_PRIORITY 		( ( unsigned portCHAR ) 7 << ( unsigned portCHAR ) 5 )	/* Priority 7, or 255 as only the top three bits are implemented.  This is the lowest priority. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( ( unsigned portCHAR ) 5 << ( unsigned portCHAR ) 5 )  /* Priority 5, or 160 as only the top three bits are implemented. */
+
+extern volatile unsigned long ulHighFrequencyTimerTicks;
+/* There is already a high frequency timer running - just reset its count back
+to zero. */
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() ( ulHighFrequencyTimerTicks = 0UL )
+#define portGET_RUN_TIME_COUNTER_VALUE()	ulHighFrequencyTimerTicks
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/IntQueueTimer.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/IntQueueTimer.c
new file mode 100644
index 000000000..acb6f57a5
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/IntQueueTimer.c
@@ -0,0 +1,115 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under 
+	the terms of the GNU General Public License (version 2) as published by the 
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the 
+	source code for proprietary components outside of the FreeRTOS kernel.  
+	Alternative commercial license and support terms are also available upon 
+	request.  See the licensing section of http://www.FreeRTOS.org for full 
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+
+/* Demo includes. */
+#include "IntQueueTimer.h"
+#include "IntQueue.h"
+
+/* Library includes. */
+#include "hw_ints.h"
+#include "hw_memmap.h"
+#include "hw_types.h"
+#include "interrupt.h"
+#include "sysctl.h"
+#include "lmi_timer.h"
+
+#define tmrTIMER_2_FREQUENCY	( 2000UL )
+#define tmrTIMER_3_FREQUENCY	( 2001UL )
+
+void vInitialiseTimerForIntQueueTest( void )
+{
+unsigned long ulFrequency;
+
+	/* Timer 2 and 3 are utilised for this test. */
+	SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER2 );
+    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER3 );
+    TimerConfigure( TIMER2_BASE, TIMER_CFG_32_BIT_PER );
+    TimerConfigure( TIMER3_BASE, TIMER_CFG_32_BIT_PER );
+	
+	/* Set the timer interrupts to be above the kernel.  The interrupts are
+	 assigned different priorities so they nest with each other. */
+	IntPrioritySet( INT_TIMER2A, configMAX_SYSCALL_INTERRUPT_PRIORITY + ( 1 << 5 ) ); /* Shift left 5 as only the top 3 bits are implemented. */
+	IntPrioritySet( INT_TIMER3A, configMAX_SYSCALL_INTERRUPT_PRIORITY );
+
+	/* Ensure interrupts do not start until the scheduler is running. */
+	portDISABLE_INTERRUPTS();
+	
+	/* The rate at which the timers will interrupt. */
+	ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_2_FREQUENCY;	
+    TimerLoadSet( TIMER2_BASE, TIMER_A, ulFrequency );
+    IntEnable( INT_TIMER2A );
+    TimerIntEnable( TIMER2_BASE, TIMER_TIMA_TIMEOUT );
+
+	/* The rate at which the timers will interrupt. */
+	ulFrequency = configCPU_CLOCK_HZ / tmrTIMER_3_FREQUENCY;	
+    TimerLoadSet( TIMER3_BASE, TIMER_A, ulFrequency );
+    IntEnable( INT_TIMER3A );
+    TimerIntEnable( TIMER3_BASE, TIMER_TIMA_TIMEOUT );
+
+    /* Enable both timers. */	
+    TimerEnable( TIMER2_BASE, TIMER_A );
+    TimerEnable( TIMER3_BASE, TIMER_A );
+}
+/*-----------------------------------------------------------*/
+
+void vT2InterruptHandler( void )
+{
+    TimerIntClear( TIMER2_BASE, TIMER_TIMA_TIMEOUT );	
+	portEND_SWITCHING_ISR( xFirstTimerHandler() );
+}
+/*-----------------------------------------------------------*/
+
+void vT3InterruptHandler( void )
+{
+	TimerIntClear( TIMER3_BASE, TIMER_TIMA_TIMEOUT );
+	portEND_SWITCHING_ISR( xSecondTimerHandler() );
+}
+
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/IntQueueTimer.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/IntQueueTimer.h
new file mode 100644
index 000000000..8bc6ddc02
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/IntQueueTimer.h
@@ -0,0 +1,56 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under 
+	the terms of the GNU General Public License (version 2) as published by the 
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the 
+	source code for proprietary components outside of the FreeRTOS kernel.  
+	Alternative commercial license and support terms are also available upon 
+	request.  See the licensing section of http://www.FreeRTOS.org for full 
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+#ifndef INT_QUEUE_TIMER_H
+#define INT_QUEUE_TIMER_H
+
+void vInitialiseTimerForIntQueueTest( void );
+portBASE_TYPE xTimer0Handler( void );
+portBASE_TYPE xTimer1Handler( void );
+
+#endif
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Startup.s b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Startup.s
new file mode 100644
index 000000000..53ce62b7a
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Startup.s
@@ -0,0 +1,199 @@
+/*****************************************************************************
+ * Copyright (c) 2006 Rowley Associates Limited.                             *
+ *                                                                           *
+ * This file may be distributed under the terms of the License Agreement     *
+ * provided with this software.                                              *
+ *                                                                           *
+ * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE   *
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
+ *****************************************************************************/
+
+/*****************************************************************************
+ *                           Preprocessor Definitions
+ *                           ------------------------
+ *
+ * STARTUP_FROM_RESET
+ *
+ *   If defined, the program will startup from power-on/reset. If not defined
+ *   the program will just loop endlessly from power-on/reset.
+ *
+ *   This definition is not defined by default on this target because the
+ *   debugger is unable to reset this target and maintain control of it over the
+ *   JTAG interface. The advantage of doing this is that it allows the debugger
+ *   to reset the CPU and run programs from a known reset CPU state on each run.
+ *   It also acts as a safety net if you accidently download a program in FLASH
+ *   that crashes and prevents the debugger from taking control over JTAG
+ *   rendering the target unusable over JTAG. The obvious disadvantage of doing
+ *   this is that your application will not startup without the debugger.
+ *
+ *   We advise that on this target you keep STARTUP_FROM_RESET undefined whilst
+ *   you are developing and only define STARTUP_FROM_RESET when development is
+ *   complete.
+ *
+ *****************************************************************************/
+
+.extern xPortPendSVHandler
+.extern xPortSysTickHandler
+.extern vPortSVCHandler
+.extern Timer0IntHandler
+.extern vT2InterruptHandler
+.extern vT3InterruptHandler
+.extern vEMAC_ISR
+
+
+.global reset_handler
+
+.macro DEFAULT_ISR_HANDLER name=
+  .thumb_func
+  .weak \name
+\name:
+1: b 1b /* endless loop */
+.endm
+
+  .section .vectors, "ax"
+  .code 16
+  .align 0
+  .global _vectors
+
+_vectors:
+  .word __stack_end__
+#ifdef STARTUP_FROM_RESET
+  .word reset_handler
+#else
+  .word reset_wait
+#endif /* STARTUP_FROM_RESET */
+  .word Nmi_ISR
+  .word Fault_ISR
+  .word MPU_Fault_ISR
+  .word 0  /* Populate if using Bus fault */
+  .word 0  /* Populate if using Usage fault */
+  .word 0  /* Reserved */
+  .word 0  /* Reserved */
+  .word 0  /* Reserved */
+  .word 0  /* Reserved */
+  .word vPortSVCHandler
+  .word 0  /* Populate if using a debug monitor */
+  .word 0  /* Reserved */
+  .word xPortPendSVHandler
+  .word xPortSysTickHandler
+  .word GPIO_Port_A_ISR
+  .word GPIO_Port_B_ISR
+  .word GPIO_Port_C_ISR
+  .word GPIO_Port_D_ISR
+  .word GPIO_Port_E_ISR
+  .word UART0_ISR
+  .word UART1_ISR
+  .word SSI_ISR
+  .word I2C_ISR
+  .word PWM_Fault_ISR
+  .word PWM_Generator_0_ISR
+  .word PWM_Generator_1_ISR
+  .word PWM_Generator_2_ISR
+  .word QEI_ISR
+  .word ADC_Sequence_0_ISR
+  .word ADC_Sequence_1_ISR
+  .word ADC_Sequence_2_ISR
+  .word ADC_Sequence_3_ISR
+  .word Watchdog_Timer_ISR
+  .word Timer0IntHandler
+  .word Timer0B_ISR
+  .word Timer1A_ISR
+  .word Timer1B_ISR
+  .word vT2InterruptHandler
+  .word Timer2B_ISR
+  .word Analog_Comparator_0_ISR
+  .word Analog_Comparator_1_ISR
+  .word Analog_Comparator_2_ISR
+  .word System_Control_ISR
+  .word FLASH_Control_ISR
+  .word GPIO_Port_F_ISR
+  .word GPIO_Port_G_ISR
+  .word GPIO_Port_H_ISR
+  .word UART2_ISR
+  .word SSI1_ISR
+  .word vT3InterruptHandler
+  .word Timer3B_ISR
+  .word I2C1_ISR
+  .word QEI1_ISR
+  .word CAN0_ISR
+  .word CAN1_ISR
+  .word CAN2_ISR
+  .word vEMAC_ISR
+  .word HIBERNATE_ISR
+  .word USB0_ISR
+  .word PWM_Generator_3_ISR
+  .word uDMA_Software_Transfer_ISR
+  .word uDMA_Error_ISR
+_vectors_end:
+
+  .section .init, "ax"
+  .thumb_func
+
+reset_handler:
+#ifdef __RAM_BUILD
+  /* If this is a RAM build, configure vector table offset register to point
+     to the RAM vector table. */
+  ldr r0, =0xE000ED08
+  ldr r1, =_vectors
+  str r1, [r0]
+#endif
+  b _start
+
+DEFAULT_ISR_HANDLER Nmi_ISR
+DEFAULT_ISR_HANDLER Fault_ISR
+DEFAULT_ISR_HANDLER MPU_Fault_ISR
+DEFAULT_ISR_HANDLER SVCall_ISR
+DEFAULT_ISR_HANDLER SysTick_ISR
+DEFAULT_ISR_HANDLER PendSV_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_A_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_B_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_C_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_D_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_E_ISR
+DEFAULT_ISR_HANDLER UART0_ISR
+DEFAULT_ISR_HANDLER UART1_ISR
+DEFAULT_ISR_HANDLER SSI_ISR
+DEFAULT_ISR_HANDLER I2C_ISR
+DEFAULT_ISR_HANDLER PWM_Fault_ISR
+DEFAULT_ISR_HANDLER PWM_Generator_0_ISR
+DEFAULT_ISR_HANDLER PWM_Generator_1_ISR
+DEFAULT_ISR_HANDLER PWM_Generator_2_ISR
+DEFAULT_ISR_HANDLER QEI_ISR
+DEFAULT_ISR_HANDLER ADC_Sequence_0_ISR
+DEFAULT_ISR_HANDLER ADC_Sequence_1_ISR
+DEFAULT_ISR_HANDLER ADC_Sequence_2_ISR
+DEFAULT_ISR_HANDLER ADC_Sequence_3_ISR
+DEFAULT_ISR_HANDLER Watchdog_Timer_ISR
+DEFAULT_ISR_HANDLER Timer0A_ISR
+DEFAULT_ISR_HANDLER Timer0B_ISR
+DEFAULT_ISR_HANDLER Timer1A_ISR
+DEFAULT_ISR_HANDLER Timer1B_ISR
+DEFAULT_ISR_HANDLER Timer2A_ISR
+DEFAULT_ISR_HANDLER Timer2B_ISR
+DEFAULT_ISR_HANDLER Analog_Comparator_0_ISR
+DEFAULT_ISR_HANDLER Analog_Comparator_1_ISR
+DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR
+DEFAULT_ISR_HANDLER System_Control_ISR
+DEFAULT_ISR_HANDLER FLASH_Control_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_F_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_G_ISR
+DEFAULT_ISR_HANDLER GPIO_Port_H_ISR
+DEFAULT_ISR_HANDLER UART2_ISR
+DEFAULT_ISR_HANDLER SSI1_ISR
+DEFAULT_ISR_HANDLER Timer3A_ISR
+DEFAULT_ISR_HANDLER Timer3B_ISR
+DEFAULT_ISR_HANDLER I2C1_ISR
+DEFAULT_ISR_HANDLER QEI1_ISR
+DEFAULT_ISR_HANDLER CAN0_ISR
+DEFAULT_ISR_HANDLER CAN1_ISR
+DEFAULT_ISR_HANDLER CAN2_ISR
+DEFAULT_ISR_HANDLER ETHERNET_ISR
+DEFAULT_ISR_HANDLER HIBERNATE_ISR
+DEFAULT_ISR_HANDLER USB0_ISR
+DEFAULT_ISR_HANDLER PWM_Generator_3_ISR
+DEFAULT_ISR_HANDLER uDMA_Software_Transfer_ISR
+DEFAULT_ISR_HANDLER uDMA_Error_ISR
+
+#ifndef STARTUP_FROM_RESET
+DEFAULT_ISR_HANDLER reset_wait
+#endif /* STARTUP_FROM_RESET */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Target.js b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Target.js
new file mode 100644
index 000000000..55a9c2c7c
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/LM3S_Target.js
@@ -0,0 +1,28 @@
+/******************************************************************************
+  Target Script for LM3S.
+
+  Copyright (c) 2006 Rowley Associates Limited.
+
+  This file may be distributed under the terms of the License Agreement
+  provided with this software.
+
+  THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE
+  WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ ******************************************************************************/
+
+function Reset()
+{
+  TargetInterface.resetAndStop(1000);
+}
+
+function RAMReset()
+{
+  Reset();
+}
+
+function FLASHReset()
+{
+  Reset();
+}
+
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/ParTest/ParTest.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/ParTest/ParTest.c
new file mode 100644
index 000000000..efd90007e
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/ParTest/ParTest.c
@@ -0,0 +1,95 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under 
+	the terms of the GNU General Public License (version 2) as published by the 
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the 
+	source code for proprietary components outside of the FreeRTOS kernel.  
+	Alternative commercial license and support terms are also available upon 
+	request.  See the licensing section of http://www.FreeRTOS.org for full 
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+/*-----------------------------------------------------------
+ * Simple parallel port IO routines.
+ *-----------------------------------------------------------*/
+
+/*
+*/
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Demo includes. */
+#include "partest.h"
+
+/* Library includes. */
+#include "hw_types.h"
+#include "gpio.h"
+#include "hw_memmap.h"
+
+
+/*-----------------------------------------------------------*/
+
+void vParTestInitialise( void )
+{
+    GPIODirModeSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT );
+    GPIOPadConfigSet( GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );
+    GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, 0 );
+}
+/*-----------------------------------------------------------*/
+
+void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
+{
+	/* There is only one LED. */
+	( void ) uxLED;
+	
+    GPIOPinWrite( GPIO_PORTF_BASE, GPIO_PIN_0, xValue );
+}
+/*-----------------------------------------------------------*/
+
+unsigned portBASE_TYPE uxParTestGetLED( unsigned portBASE_TYPE uxLED )
+{
+	/* There is only one LED. */
+	( void ) uxLED;
+
+	return GPIOPinRead( GPIO_PORTF_BASE, GPIO_PIN_0 );	
+}
+
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzp b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzp
new file mode 100644
index 000000000..6bb8072b9
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzp
@@ -0,0 +1,119 @@
+<!DOCTYPE CrossStudio_Project_File>
+<solution Name="RTOSDemo" version="2">
+  <project Name="RTOSDemo">
+    <configuration Name="Common" Target="LM3S8962" arm_architecture="v7M" arm_core_type="Cortex-M3" arm_linker_fiq_stack_size="0" arm_linker_heap_size="0" arm_linker_irq_stack_size="0" arm_linker_stack_size="512" arm_simulator_memory_simulation_filename="$(PackagesDir)/targets/Luminary_LM3S/LM3SSimulatorMemory.dll" arm_simulator_memory_simulation_parameter="0x40000;0x10000" arm_target_debug_interface_type="ADIv5" arm_target_flash_loader_type="LIBMEM RPC Loader" build_remove_unused_symbols="No" c_preprocessor_definitions="PACK_STRUCT_END=__attribute((packed));ALIGN_STRUCT_END=__attribute((aligned(4)));sprintf=usprintf;snprintf=usnprintf;printf=uipprintf" c_user_include_directories="..\\Common\\ethernet\\uIP\\uip-1.0\\uip;..\\..\\Source\\include;..\\..\\Source\\portable\\GCC\\ARM_CM3;..\\Common\\include;..\\Common\\drivers\\LuminaryMicro;.\\webserver;.;$(SamplesDir)/Luminary_Stellaris_Driver_Library" linker_additional_files="" linker_memory_map_file="$(PackagesDir)/targets/Luminary_LM3S/LM3S8962_MemoryMap.xml" linker_output_format="None" linker_printf_fmt_level="int" linker_printf_width_precision_supported="No" linker_scanf_fmt_level="int" project_directory="" project_type="Executable" property_groups_file_path="$(PackagesDir)/targets/Luminary_LM3S/propertyGroups.xml"/>
+    <configuration Name="Flash" Placement="Flash" arm_target_flash_loader_file_path="$(PackagesDir)/targets/Luminary_LM3S/Release/Loader.elf" linker_section_placement_file="$(PackagesDir)/targets/Luminary_LM3S/flash_placement.xml" target_reset_script="FLASHReset()"/>
+    <configuration Name="RAM" Placement="RAM" linker_section_placement_file="$(PackagesDir)/targets/Luminary_LM3S/ram_placement.xml" target_reset_script="RAMReset()"/>
+    <folder Name="Source Files">
+      <configuration Name="Common" filter="c;cpp;cxx;cc;h;s;asm;inc"/>
+      <folder Name="FreeRTOS">
+        <folder Name="include">
+          <file file_name="../../Source/portable/GCC/ARM_CM3/portmacro.h"/>
+          <file file_name="../../Source/include/task.h"/>
+          <file file_name="../../Source/include/FreeRTOS.h"/>
+          <file file_name="../../Source/include/list.h"/>
+          <file file_name="../../Source/include/portable.h"/>
+          <file file_name="../../Source/include/projdefs.h"/>
+          <file file_name="../../Source/include/queue.h"/>
+          <file file_name="../../Source/include/semphr.h"/>
+          <file file_name="../../Source/include/StackMacros.h"/>
+        </folder>
+        <file file_name="../../Source/tasks.c"/>
+        <file file_name="../../Source/list.c"/>
+        <file file_name="../../Source/queue.c"/>
+        <file file_name="../../Source/portable/GCC/ARM_CM3/port.c"/>
+        <file file_name="../../Source/portable/MemMang/heap_2.c"/>
+      </folder>
+      <file file_name="main.c"/>
+      <file file_name="timertest.c"/>
+      <file file_name="formike128x128x16.c"/>
+      <file file_name="IntQueueTimer.c"/>
+      <folder Name="include">
+        <file file_name="bitmap.h"/>
+        <file file_name="formike128x128x16.h"/>
+        <file file_name="FreeRTOSConfig.h"/>
+        <file file_name="IntQueueTimer.h"/>
+        <file file_name="lcd_message.h"/>
+        <file file_name="osram128x64x4.h"/>
+      </folder>
+      <folder Name="Common Demo Tasks">
+        <file file_name="../Common/Minimal/IntQueue.c"/>
+        <file file_name="../Common/Minimal/PollQ.c"/>
+        <file file_name="../Common/Minimal/QPeek.c"/>
+        <file file_name="../Common/Minimal/recmutex.c"/>
+        <file file_name="../Common/Minimal/semtest.c"/>
+        <file file_name="../Common/Minimal/BlockQ.c"/>
+        <file file_name="../Common/Minimal/blocktim.c"/>
+        <file file_name="../Common/Minimal/death.c"/>
+        <file file_name="../Common/Minimal/GenQTest.c"/>
+        <file file_name="../Common/Minimal/integer.c"/>
+        <folder Name="include">
+          <file file_name="../Common/include/IntQueue.h"/>
+          <file file_name="../Common/include/PollQ.h"/>
+          <file file_name="../Common/include/QPeek.h"/>
+          <file file_name="../Common/include/recmutex.h"/>
+          <file file_name="../Common/include/semtest.h"/>
+          <file file_name="../Common/include/BlockQ.h"/>
+          <file file_name="../Common/include/blocktim.h"/>
+          <file file_name="../Common/include/death.h"/>
+          <file file_name="../Common/include/GenQTest.h"/>
+          <file file_name="../Common/include/integer.h"/>
+        </folder>
+      </folder>
+      <folder Name="WEB Server">
+        <file file_name="webserver/uIP_Task.c"/>
+        <file file_name="webserver/emac.c"/>
+        <file file_name="webserver/httpd.c"/>
+        <file file_name="webserver/httpd-cgi.c"/>
+        <file file_name="webserver/httpd-fs.c"/>
+        <file file_name="webserver/http-strings.c"/>
+        <folder Name="include">
+          <file file_name="webserver/webserver.h"/>
+          <file file_name="webserver/clock-arch.h"/>
+          <file file_name="webserver/emac.h"/>
+          <file file_name="webserver/httpd.h"/>
+          <file file_name="webserver/httpd-cgi.h"/>
+          <file file_name="webserver/httpd-fs.h"/>
+          <file file_name="webserver/httpd-fsdata.h"/>
+          <file file_name="webserver/http-strings.h"/>
+          <file file_name="webserver/uip-conf.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/clock.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/psock.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/pt.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/timer.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arch.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arp.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uiplib.h"/>
+          <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uipopt.h"/>
+        </folder>
+        <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip.c"/>
+        <file file_name="../Common/ethernet/uIP/uip-1.0/uip/uip_arp.c"/>
+        <file file_name="../Common/ethernet/uIP/uip-1.0/uip/psock.c"/>
+        <file file_name="../Common/ethernet/uIP/uip-1.0/uip/timer.c"/>
+      </folder>
+      <folder Name="Libraries">
+        <file file_name="../Common/drivers/LuminaryMicro/Rowley/libgr.a"/>
+        <file file_name="../Common/drivers/LuminaryMicro/Rowley/libdriver.a"/>
+      </folder>
+      <file file_name="ParTest/ParTest.c"/>
+      <file file_name="rit128x96x4.c"/>
+      <file file_name="osram128x64x4.c"/>
+      <file file_name="../Common/drivers/LuminaryMicro/ustdlib.c"/>
+    </folder>
+    <folder Name="System Files">
+      <file file_name="thumb_crt0.s"/>
+      <file file_name="LM3S_Startup.s"/>
+      <file file_name="LM3S_Target.js">
+        <configuration Name="Common" build_exclude_from_build="Yes" file_type="Reset Script"/>
+        <configuration Name="THUMB Flash Debug" build_exclude_from_build="No"/>
+      </file>
+    </folder>
+  </project>
+  <configuration Name="THUMB Flash Debug" inherited_configurations="THUMB;Flash;Debug"/>
+  <configuration Name="THUMB" Platform="ARM" arm_instruction_set="THUMB" arm_library_instruction_set="THUMB" c_preprocessor_definitions="__THUMB" hidden="Yes"/>
+  <configuration Name="Flash" c_preprocessor_definitions="__FLASH_BUILD" hidden="Yes"/>
+  <configuration Name="Debug" build_debug_information="Yes" c_preprocessor_definitions="DEBUG" gcc_optimization_level="None" hidden="Yes" link_include_startup_code="No"/>
+  <configuration Name="THUMB Flash Release" inherited_configurations="THUMB;Flash;Release"/>
+  <configuration Name="Release" build_debug_information="No" c_additional_options="-g1" c_preprocessor_definitions="NDEBUG" gcc_optimization_level="Level 1" hidden="Yes" link_include_startup_code="No"/>
+</solution>
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzs b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzs
new file mode 100644
index 000000000..3da311498
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/RTOSDemo.hzs
@@ -0,0 +1,55 @@
+<!DOCTYPE CrossStudio_for_ARM_Session_File>
+<session>
+ <Bookmarks/>
+ <Breakpoints/>
+ <ExecutionCountWindow/>
+ <Memory1>
+  <MemoryWindow autoEvaluate="0" addressText="0x200002d0" numColumns="8" sizeText="120" dataSize="1" radix="16" addressSpace="" />
+ </Memory1>
+ <Memory2>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory2>
+ <Memory3>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory3>
+ <Memory4>
+  <MemoryWindow autoEvaluate="0" addressText="" numColumns="8" sizeText="" dataSize="1" radix="16" addressSpace="" />
+ </Memory4>
+ <Project>
+  <ProjectSessionItem path="RTOSDemo" name="unnamed" />
+  <ProjectSessionItem path="RTOSDemo;RTOSDemo" name="unnamed" />
+  <ProjectSessionItem path="RTOSDemo;RTOSDemo;Source Files" name="unnamed" />
+ </Project>
+ <Register1>
+  <RegisterWindow openNodes="CPU;CPU/xPSR;CPU/CFBP" binaryNodes="" unsignedNodes="" visibleGroups="CPU" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register1>
+ <Register2>
+  <RegisterWindow openNodes="" binaryNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register2>
+ <Register3>
+  <RegisterWindow openNodes="" binaryNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register3>
+ <Register4>
+  <RegisterWindow openNodes="" binaryNodes="" unsignedNodes="" visibleGroups="" decimalNodes="" octalNodes="" asciiNodes="" />
+ </Register4>
+ <TargetWindow programAction="" uploadFileType="" programLoadAddress="" programSize="" uploadFileName="" uploadMemoryInterface="" programFileName="" uploadStartAddress="" programFileType="" uploadSize="" programMemoryInterface="" />
+ <TraceWindow>
+  <Trace enabled="Yes" />
+ </TraceWindow>
+ <Watch1>
+  <Watches active="1" update="Never" />
+ </Watch1>
+ <Watch2>
+  <Watches active="0" update="Never" />
+ </Watch2>
+ <Watch3>
+  <Watches active="0" update="Never" />
+ </Watch3>
+ <Watch4>
+  <Watches active="0" update="Never" />
+ </Watch4>
+ <Files>
+  <SessionOpenFile useTextEdit="1" useBinaryEdit="0" codecName="Latin1" x="0" debugPath="C:\E\Dev\FreeRTOS\Trial\FreeRTOS_MPU\FreeRTOS\Demo\CORTEX_MPU_LM3Sxxxx_Rowley\main.c" y="219" path="C:\E\Dev\FreeRTOS\Trial\FreeRTOS_MPU\FreeRTOS\Demo\CORTEX_MPU_LM3Sxxxx_Rowley\main.c" left="0" selected="1" name="unnamed" top="209" />
+ </Files>
+ <ARMCrossStudioWindow activeProject="RTOSDemo" autoConnectTarget="Luminary USB Debug" debugSearchFileMap="" fileDialogInitialDirectory="C:\E\Dev\FreeRTOS\Trial\FreeRTOS_MPU\FreeRTOS\Demo\Common\drivers\LuminaryMicro" fileDialogDefaultFilter="*.*" autoConnectCapabilities="388991" debugSearchPath="" buildConfiguration="THUMB Flash Debug" />
+</session>
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/bitmap.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/bitmap.h
new file mode 100644
index 000000000..29f813fd1
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/bitmap.h
@@ -0,0 +1,336 @@
+#ifndef BITMAP_H
+#define BITMAP_H
+
+#define bmpBITMAP_HEIGHT	50
+#define bmpBITMAP_WIDTH		128
+
+const unsigned char pucBasicBitmap[] =
+{
+0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0x00, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x0a, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa,
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7,
+0x00, 0x8f, 0xff, 0xff, 0xf8, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x88, 0x88, 0x88,
+0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x88, 0x77, 0x77, 0x78, 0x8f, 0xff, 0xff, 0xff,
+0xff, 0xff, 0xff, 0xff, 0xff, 0xf8, 0x88, 0x77, 0x77, 0x88, 0x8f, 0xff, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,
+0xff, 0xff, 0xf0, 0x00, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff,
+0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77,
+0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xfa, 0xaa,
+0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x00, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,
+0x77, 0x77, 0xff, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77,
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f,
+0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x08, 0x00, 0x8f, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77,
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff,
+0xff, 0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77,
+0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x00, 0x0f, 0x00, 0x8f, 0x00, 0xff,
+0x87, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xf7, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,
+0x77, 0x77, 0x78, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77,
+0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff, 0xff, 0xff, 0x70, 0x07,
+0x00, 0x70, 0x00, 0xff, 0x87, 0x77, 0x77, 0x77, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77, 0xff, 0xff, 0xff, 0xff, 0xff,
+0x77, 0x77, 0x77, 0x7f, 0xff, 0xff, 0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x78, 0xff, 0xff, 0xf8, 0x77, 0x77, 0x77, 0x77,
+0xff, 0xff, 0x87, 0x77, 0x77, 0x77, 0x8f, 0xff, 0xff, 0xff, 0x88, 0x8f, 0xff, 0xff, 0xfa, 0xaa, 0xaa, 0xaf, 0xff, 0xff,
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+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xa0, 0x00, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
+0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x00,
+0x00 };
+
+const unsigned char pucGrLibBitmap[] =
+{
+    IMAGE_FMT_4BPP_COMP,
+    124, 0,
+    49, 0,
+
+    15,
+    0x00, 0x00, 0x00,
+    0x00, 0x0c, 0x00,
+    0x20, 0x44, 0x20,
+    0x00, 0x75, 0x00,
+    0x69, 0x69, 0x69,
+    0x00, 0xc2, 0x00,
+    0x00, 0xd2, 0x00,
+    0x38, 0xb6, 0x38,
+    0x00, 0xea, 0x00,
+    0x00, 0xf2, 0x00,
+    0xaa, 0xb2, 0xaa,
+    0x65, 0xff, 0x65,
+    0x69, 0xff, 0x69,
+    0x6d, 0xff, 0x6d,
+    0x71, 0xff, 0x71,
+    0xff, 0xff, 0xff,
+
+    0x03, 0x21, 0x33, 0x53, 0x33, 0x33, 0x33, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f,
+    0x17, 0x07, 0x06, 0x35, 0x33, 0x12, 0x03, 0x23, 0x96, 0x68, 0x88, 0x88,
+    0x88, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f, 0x17, 0x07, 0x06, 0x86, 0x69, 0x32,
+    0x03, 0x29, 0x66, 0x65, 0x66, 0x66, 0x66, 0xe9, 0xd4, 0xf8, 0xa7, 0x5f,
+    0x17, 0x07, 0x06, 0x56, 0x66, 0x92, 0x07, 0x78, 0x63, 0x11, 0x11, 0x11,
+    0xe9, 0xd4, 0xa7, 0xf0, 0x5f, 0x17, 0x07, 0x07, 0x11, 0x36, 0x87, 0x78,
+    0x0f, 0x63, 0x00, 0x00, 0x00, 0xe9, 0xd4, 0xa7, 0x5f, 0xe0, 0x17, 0x07,
+    0x07, 0x00, 0x36, 0x87, 0x78, 0x63, 0xfe, 0x07, 0x07, 0x77, 0x2f, 0x07,
+    0x07, 0x02, 0x36, 0x1e, 0x87, 0x78, 0x63, 0x07, 0x07, 0x77, 0x2f, 0x00,
+    0x10, 0x01, 0x22, 0x20, 0x07, 0x00, 0x00, 0x22, 0x21, 0x84, 0x03, 0x36,
+    0x87, 0x78, 0x63, 0x02, 0x02, 0xaa, 0x01, 0xa2, 0x22, 0x20, 0x02, 0x77,
+    0x77, 0x77, 0xe9, 0x3a, 0x22, 0x22, 0x7a, 0xa4, 0x71, 0x20, 0x0a, 0x27,
+    0xb8, 0x29, 0x72, 0xb2, 0x9e, 0x93, 0x36, 0x87, 0x78, 0x40, 0x63, 0x62,
+    0x2a, 0xff, 0xf2, 0xaa, 0x40, 0x07, 0x08, 0xad, 0xdd, 0xdd, 0xdd, 0xe9,
+    0xd7, 0x72, 0x00, 0x40, 0x00, 0xa6, 0xdd, 0xda, 0x70, 0x00, 0x00, 0x02,
+    0x00, 0x77, 0xdd, 0xdc, 0xcc, 0xcd, 0xde, 0xc7, 0x20, 0x00, 0x00, 0x00,
+    0x00, 0x00, 0x01, 0x27, 0xde, 0xdc, 0x08, 0xcc, 0xcc, 0xdd, 0xea, 0x99,
+    0x36, 0x87, 0x78, 0x40, 0x63, 0x69, 0x02, 0xaf, 0xaa, 0xf2, 0x2f, 0xa0,
+    0x04, 0x02, 0xdb, 0xbb, 0xbb, 0xbb, 0xe9, 0xbc, 0xe7, 0x10, 0x20, 0x00,
+    0x07, 0xa5, 0xbb, 0xbd, 0x70, 0x00, 0x10, 0x00, 0x27, 0xec, 0x3b, 0xcd,
+    0xd7, 0x00, 0x00, 0x80, 0x9f, 0xbd, 0x20, 0x00, 0x00, 0x36, 0x87, 0x78,
+    0x40, 0x63, 0x69, 0x02, 0xfa, 0x2a, 0xf2, 0x2f, 0xa0, 0x31, 0x02, 0xdb,
+    0x43, 0x31, 0x42, 0x00, 0x07, 0xa7, 0x0a, 0x70, 0x00, 0x02, 0xdd, 0x41,
+    0xcc, 0x21, 0xce, 0x04, 0x70, 0x00, 0x00, 0x02, 0x7d, 0x39, 0xbc, 0xcb,
+    0x00, 0xbb, 0xbd, 0x20, 0x00, 0x00, 0x36, 0x87, 0x78, 0x20, 0x63, 0x00,
+    0x69, 0xfa, 0x0a, 0xf2, 0x2f, 0xa0, 0x01, 0x02, 0xdb, 0xbb, 0xbb, 0xdd,
+    0xdd, 0xdc, 0x11, 0x08, 0xe7, 0x00, 0x07, 0xad, 0xbb, 0xcd, 0xdd, 0xda,
+    0x09, 0x70, 0x00, 0x2d, 0xcb, 0x41, 0xcc, 0xdd, 0xd1, 0x04, 0xe7, 0x00,
+    0x00, 0x07, 0xeb, 0x51, 0xdc, 0xcd, 0x00, 0xdd, 0xdd, 0x20, 0x00, 0x00,
+    0x36, 0x87, 0x78, 0x00, 0x63, 0x00, 0x00, 0x00, 0x02, 0xfa, 0x2a, 0xf2,
+    0x00, 0xaf, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x72, 0x22, 0x00, 0x77, 0xdc,
+    0xbb, 0xbb, 0xc7, 0x20, 0x07, 0x77, 0x04, 0x77, 0x77, 0xcb, 0xbb, 0xbc,
+    0xd1, 0x20, 0x01, 0x28, 0x7d, 0xbb, 0x42, 0x27, 0x41, 0xcd, 0x20, 0x00,
+    0x40, 0x27, 0x51, 0x72, 0x22, 0x22, 0x27, 0x7c, 0x20, 0x00, 0x00, 0x00,
+    0x36, 0x87, 0x78, 0x63, 0x00, 0x00, 0x00, 0x00, 0x02, 0xaf, 0xaa, 0xfa,
+    0xff, 0x20, 0x02, 0x10, 0xdb, 0xbb, 0xbe, 0x61, 0x2d, 0xbb, 0xbb, 0xcc,
+    0xa8, 0x29, 0x00, 0x89, 0xbd, 0xc3, 0xeb, 0xbb, 0xbb, 0x00, 0xd7, 0x10,
+    0x00, 0x00, 0x2c, 0xcb, 0xbb, 0xbd, 0x58, 0x70, 0x12, 0xc7, 0x13, 0x29,
+    0x36, 0x87, 0x78, 0x40, 0x63, 0xa9, 0x00, 0xaf, 0xff, 0xff, 0xfa, 0x20,
+    0x08, 0x02, 0xdb, 0xbb, 0xbd, 0x39, 0x07, 0xdb, 0xbb, 0x72, 0xcc, 0x03,
+    0x8c, 0x82, 0xbd, 0x70, 0x84, 0xbc, 0x03, 0xd2, 0x00, 0x2d, 0xbb, 0xbb,
+    0xd7, 0x19, 0x01, 0x02, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0xa2, 0x0a,
+    0x10, 0xaf, 0xff, 0xa2, 0x0a, 0xbd, 0x20, 0x00, 0x00, 0x0c, 0x07, 0xdb,
+    0xbb, 0xc7, 0xc9, 0x8e, 0x00, 0x2c, 0x40, 0xcb, 0xc4, 0x00, 0x7c, 0xbb,
+    0xbb, 0xe7, 0x00, 0x06, 0x2d, 0xbb, 0xbb, 0xc7, 0x10, 0x92, 0x31, 0x36,
+    0x10, 0x87, 0x78, 0x63, 0xab, 0x22, 0x22, 0x00, 0x00, 0x00, 0x02, 0xdb,
+    0xbb, 0xbd, 0x20, 0x00, 0x00, 0x07, 0x18, 0xcb, 0xbb, 0xd7, 0x0a, 0x8d,
+    0x00, 0x2d, 0xbb, 0x23, 0xbb, 0xc7, 0x82, 0x00, 0x2e, 0xbb, 0x39, 0x91,
+    0x20, 0xbd, 0x72, 0x8b, 0x00, 0x00, 0x36, 0x87, 0x78, 0x48, 0x63, 0x33,
+    0x02, 0x20, 0xe1, 0xdb, 0xbb, 0xbd, 0x01, 0x20, 0x00, 0x02, 0x7d, 0xbb,
+    0xbb, 0xe2, 0x6b, 0x94, 0x8b, 0x00, 0x00, 0x81, 0xd7, 0x82, 0x00, 0x2d,
+    0x00, 0xbb, 0xbb, 0xc7, 0x20, 0x2c, 0xcb, 0xbb, 0xbb, 0x10, 0xdd, 0x77,
+    0x22, 0x7b, 0x36, 0x87, 0x78, 0x63, 0x80, 0x32, 0x02, 0xaa, 0xf2, 0x22,
+    0x20, 0x02, 0xdb, 0x00, 0xbb, 0xbc, 0x77, 0x77, 0x77, 0xdb, 0xbb, 0xce,
+    0x42, 0x71, 0x63, 0xdb, 0xbb, 0xbd, 0x20, 0x19, 0x7d, 0x10, 0xbb, 0xbb,
+    0xd2, 0x82, 0x00, 0x27, 0xcb, 0xbb, 0x00, 0xc7, 0x20, 0x07, 0xeb, 0xbb,
+    0xbb, 0xbb, 0xcd, 0x21, 0xd7, 0x72, 0x72, 0x36, 0x87, 0x78, 0x63, 0x32,
+    0x01, 0x4f, 0xff, 0xf2, 0xaf, 0xa0, 0x02, 0xdb, 0x41, 0x03, 0xdd, 0xdc,
+    0xbb, 0xbc, 0xd7, 0x20, 0x22, 0x89, 0x42, 0xbd, 0xba, 0x7d, 0xbb, 0xbb,
+    0xd2, 0x82, 0x00, 0x02, 0x27, 0xcb, 0xbb, 0xcc, 0x20, 0x02, 0x89, 0xbb,
+    0x08, 0xbb, 0xbc, 0xdd, 0x72, 0x31, 0x36, 0x87, 0x78, 0x40, 0x63, 0x31,
+    0x02, 0xaf, 0xaa, 0xf2, 0x2f, 0xa0, 0x21, 0x02, 0xdb, 0x3a, 0xbb, 0xbb,
+    0xc7, 0x20, 0x31, 0x88, 0x59, 0xdb, 0xbb, 0xbd, 0xb2, 0x7d, 0xbb, 0xbb,
+    0x40, 0xd2, 0x7b, 0x27, 0xcb, 0xbb, 0xcc, 0x20, 0x00, 0x00, 0x27, 0xec,
+    0xbb, 0xbb, 0xbb, 0xbb, 0xbc, 0xe7, 0x84, 0x29, 0x36, 0x87, 0x78, 0x63,
+    0x31, 0x02, 0xfa, 0x02, 0x0a, 0xf2, 0x2f, 0xa0, 0x02, 0xdb, 0x42, 0xbb,
+    0x31, 0xbb, 0xc7, 0x39, 0x5a, 0xdb, 0xbb, 0xbd, 0xb2, 0x08, 0x7d, 0xbb,
+    0xbb, 0xd2, 0x7b, 0x27, 0xcb, 0xbb, 0x00, 0xcc, 0x20, 0x00, 0x02, 0x77,
+    0xed, 0xcb, 0xbb, 0x00, 0xbb, 0xbb, 0xbd, 0x71, 0x00, 0x00, 0x36, 0x87,
+    0x20, 0x78, 0x63, 0x31, 0x02, 0xfa, 0x0a, 0xf2, 0x2f, 0x00, 0xa0, 0x02,
+    0xdb, 0xbb, 0xbb, 0xcd, 0xdd, 0xcb, 0x18, 0xbb, 0xbc, 0xe2, 0x69, 0x59,
+    0xdb, 0xbb, 0xbd, 0x42, 0x20, 0x19, 0x7d, 0xbb, 0xbb, 0xd2, 0x7b, 0x27,
+    0x10, 0xcb, 0xbb, 0xcb, 0x79, 0x02, 0x27, 0x7d, 0xdc, 0x00, 0xbb, 0xbb,
+    0xbb, 0xe2, 0x00, 0x00, 0x36, 0x87, 0x20, 0x78, 0x63, 0x31, 0x02, 0xfa,
+    0x2a, 0xf2, 0xaf, 0x00, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x72, 0x27, 0x4c,
+    0x1d, 0xbb, 0xbb, 0xd7, 0x69, 0x59, 0x89, 0x20, 0x19, 0x42, 0x7d, 0x7e,
+    0x2c, 0xbb, 0xbb, 0xc7, 0x7a, 0x00, 0x10, 0x22, 0x7c, 0xcb, 0x63, 0x36,
+    0x87, 0x78, 0x63, 0x80, 0x31, 0x02, 0xaf, 0xfa, 0xff, 0xff, 0x20, 0x02,
+    0x00, 0xdb, 0xbb, 0xbd, 0x20, 0x00, 0x2c, 0xcb, 0xbb, 0x28, 0xcb, 0x20,
+    0x61, 0x00, 0x8c, 0x00, 0x00, 0x2d, 0x12, 0xbb, 0xbb, 0xd7, 0x82, 0x00,
+    0x2e, 0xbe, 0x00, 0x21, 0x02, 0x7c, 0x63, 0x36, 0x87, 0x78, 0x63, 0x32,
+    0x00, 0x2f, 0xff, 0xff, 0xfa, 0x00, 0x02, 0xdb, 0xbb, 0x00, 0xbd, 0x20,
+    0x00, 0x07, 0xdb, 0xbb, 0xbe, 0x20, 0xc2, 0x62, 0x8c, 0x00, 0x00, 0x2c,
+    0xcb, 0xc4, 0x00, 0x0c, 0x7d, 0xbb, 0xbb, 0xe7, 0x3a, 0x19, 0x2d, 0xbb,
+    0x00, 0xbb, 0xc7, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0x80, 0x3a, 0x02,
+    0xaa, 0xaa, 0x40, 0x00, 0x02, 0xdb, 0x00, 0xbb, 0xbd, 0x20, 0x00, 0x02,
+    0xcc, 0xbb, 0xbd, 0x63, 0x70, 0x63, 0x8b, 0x00, 0x00, 0x07, 0x49, 0x7a,
+    0x98, 0x09, 0xbb, 0xd2, 0x3a, 0x19, 0x2d, 0xbb, 0xbb, 0x01, 0xd7, 0x00,
+    0x00, 0x36, 0x87, 0x78, 0x63, 0x3a, 0x14, 0xaa, 0x22, 0x20, 0x0b, 0xbd,
+    0xc9, 0x7d, 0xbb, 0x30, 0xbb, 0xd2, 0x61, 0x8e, 0x00, 0x02, 0xeb, 0xbb,
+    0x20, 0xbb, 0xd7, 0x79, 0x27, 0xcb, 0xbb, 0xbd, 0x70, 0x24, 0x00, 0x02,
+    0x6a, 0x00, 0x7d, 0x6b, 0x36, 0x87, 0x24, 0x78, 0x63, 0x39, 0x02, 0xff,
+    0x62, 0x02, 0xdb, 0x21, 0xbb, 0xbd, 0x21, 0x2e, 0xbb, 0xbb, 0xe7, 0x61,
+    0x80, 0x8e, 0x00, 0x02, 0x7d, 0xbb, 0xbb, 0xbd, 0x72, 0x00, 0x22, 0x27,
+    0xcc, 0xbb, 0xbb, 0xcd, 0x20, 0x00, 0x08, 0x07, 0xe7, 0x72, 0x22, 0xa3,
+    0xe2, 0x00, 0x00, 0x00, 0x36, 0x87, 0x78, 0x63, 0x00, 0x00, 0x00, 0x02,
+    0x20, 0xaf, 0xa0, 0xd2, 0xdb, 0xbb, 0xbd, 0x20, 0x00, 0x03, 0x00, 0x2b,
+    0xcb, 0xbb, 0xc7, 0x10, 0x8f, 0x11, 0x01, 0x2d, 0xcb, 0xbb, 0xbb, 0xdd,
+    0xb7, 0xcd, 0xd1, 0x00, 0xe7, 0x00, 0x00, 0x07, 0xdc, 0xdd, 0xcb, 0x7b,
+    0x00, 0xdd, 0xcb, 0xbb, 0xbc, 0x72, 0x00, 0x00, 0x36, 0x10, 0x87, 0x78,
+    0x63, 0x01, 0x00, 0x2a, 0xfa, 0x42, 0x01, 0x22, 0x20, 0x02, 0xdb, 0xbb,
+    0xbd, 0x20, 0x01, 0xb0, 0xcc, 0x00, 0x8d, 0xb9, 0xec, 0xbb, 0xbb, 0xbb,
+    0x00, 0xcc, 0xcb, 0xbb, 0xbb, 0xbe, 0x71, 0x00, 0x00, 0x05, 0x27, 0xcb,
+    0xbb, 0xcc, 0xcc, 0x81, 0xce, 0x29, 0x08, 0x36, 0x87, 0x78, 0x63, 0x02,
+    0xaa, 0xff, 0xff, 0x02, 0xff, 0xa0, 0x02, 0xdb, 0xbb, 0xbd, 0x61, 0x02,
+    0x0e, 0xeb, 0xbb, 0xbd, 0x70, 0x5a, 0x8c, 0x09, 0x27, 0x00, 0xec, 0xbb,
+    0xbb, 0xbb, 0xbb, 0xbb, 0xbd, 0xd7, 0x54, 0x10, 0xa1, 0xcb, 0xa4, 0xd2,
+    0x31, 0x36, 0x87, 0x20, 0x78, 0x63, 0x01, 0x02, 0xff, 0xff, 0xff, 0xff,
+    0x02, 0xa0, 0x07, 0xad, 0xdd, 0xda, 0x20, 0x99, 0xde, 0x1c, 0xdd, 0xde,
+    0xc2, 0x21, 0x8d, 0x0a, 0x7c, 0xed, 0x04, 0xcc, 0xcc, 0xcc, 0xde, 0xd7,
+    0x92, 0x2c, 0xed, 0x40, 0xdc, 0xa7, 0x36, 0x87, 0x78, 0x63, 0x00, 0x02,
+    0x00, 0x22, 0x02, 0xaa, 0xaa, 0xaa, 0xaa, 0x20, 0x02, 0x1b, 0x77, 0x77,
+    0x77, 0x5a, 0xc9, 0x72, 0x21, 0x8e, 0x88, 0xaa, 0x27, 0x77, 0x7b, 0x9d,
+    0x12, 0x27, 0x77, 0x20, 0x77, 0xb7, 0x3d, 0x36, 0x87, 0x78, 0x63, 0x00,
+    0x3e, 0x02, 0xaa, 0x43, 0x22, 0xc6, 0x87, 0x3e, 0x12, 0x21, 0x22, 0x22,
+    0x06, 0x01, 0x22, 0x22, 0x21, 0x04, 0x00, 0x36, 0x87, 0x78, 0x63, 0x00,
+    0x02, 0xfa, 0x22, 0x3f, 0xaa, 0x20, 0x26, 0xc6, 0x87, 0x3f, 0x07, 0x07,
+    0x00, 0x36, 0x87, 0x78, 0x63, 0x00, 0x02, 0xfa, 0x02, 0x7e, 0xff, 0x07,
+    0x07, 0x77, 0x2f, 0x07, 0x06, 0x36, 0x00, 0x87, 0x78, 0x63, 0x00, 0x02,
+    0xff, 0xaa, 0xfa, 0x07, 0x44, 0x44, 0x44, 0x20, 0x02, 0xd9, 0xc1, 0xd4,
+    0xf0, 0xa7, 0x5f, 0x17, 0x04, 0x42, 0x00, 0x00, 0x36, 0x00, 0x87, 0x78,
+    0x63, 0x00, 0x02, 0xff, 0xff, 0xff, 0x9f, 0xe9, 0xa0, 0x0a, 0xc4, 0x94,
+    0xa7, 0x5f, 0x17, 0x80, 0x04, 0xfa, 0x20, 0x00, 0x36, 0x87, 0x78, 0x63,
+    0x13, 0x00, 0x00, 0xaf, 0x03, 0xa0, 0x0a, 0x07, 0xbf, 0xe0, 0x77, 0x2f,
+    0x07, 0xfa, 0x20, 0x00, 0x36, 0x87, 0x00, 0x78, 0x63, 0x00, 0x00, 0x02,
+    0xaa, 0xfa, 0xaa, 0x0f, 0xaa, 0xaa, 0x20, 0x02, 0xd9, 0xc1, 0xd4, 0xa7,
+    0xe0, 0x5f, 0x17, 0x05, 0x00, 0x00, 0x36, 0x87, 0x78, 0x03, 0x63, 0x00,
+    0x00, 0x00, 0x02, 0xff, 0xd9, 0xc1, 0xfc, 0xd4, 0xa7, 0x5f, 0x17, 0x07,
+    0x03, 0x36, 0x87, 0x23, 0x78, 0x63, 0x01, 0x02, 0x44, 0x20, 0x07, 0x07,
+    0xf0, 0x77, 0x2f, 0x07, 0x05, 0x36, 0x87, 0x78, 0x63, 0xfe, 0x07, 0x07,
+    0x77, 0x2f, 0x07, 0x07, 0x02, 0x36, 0x1f, 0x87, 0x78, 0x63, 0x07, 0x07,
+    0x77, 0x2f, 0x07, 0xc0, 0x07, 0x02, 0x36, 0x87, 0x78, 0x63, 0x11, 0x11,
+    0x7f, 0x11, 0xe9, 0xd4, 0xa7, 0x5f, 0x17, 0x07, 0x07, 0x00, 0x11, 0x36,
+    0x87, 0x29, 0x66, 0x55, 0x55, 0x55, 0xfe, 0xe9, 0xd4, 0xa7, 0x5f, 0x17,
+    0x07, 0x07, 0x55, 0x00, 0x66, 0x92, 0x23, 0x96, 0x68, 0x88, 0x88, 0x88,
+    0xfe, 0xe9, 0xd4, 0xa7, 0x5f, 0x17, 0x07, 0x06, 0x86, 0x01, 0x69, 0x32,
+    0x21, 0x33, 0x55, 0x55, 0x55, 0xe9, 0xfc, 0xd4, 0xa7, 0x5f, 0x17, 0x07,
+    0x07, 0x55, 0x33, 0x00, 0x12,
+};
+
+
+#endif
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/formike128x128x16.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/formike128x128x16.c
new file mode 100644
index 000000000..87ff5feb4
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/formike128x128x16.c
@@ -0,0 +1,902 @@
+//*****************************************************************************
+//
+// formike128x128x16.c - Display driver for the Formike Electronic
+//                       KWH015C04-F01 CSTN panel with an ST7637 controller.
+//
+// Copyright (c) 2008 Luminary Micro, Inc.  All rights reserved.
+// 
+// Software License Agreement
+// 
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+// 
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  You may not combine
+// this software with "viral" open-source software in order to form a larger
+// program.  Any use in violation of the foregoing restrictions may subject
+// the user to criminal sanctions under applicable laws, as well as to civil
+// liability for the breach of the terms and conditions of this license.
+// 
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+// 
+// This is part of revision 2523 of the Stellaris Peripheral Driver Library.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup ek_lm3s3748_api
+//! @{
+//
+//*****************************************************************************
+
+#include "hw_gpio.h"
+#include "hw_memmap.h"
+#include "hw_types.h"
+#include "gpio.h"
+#include "sysctl.h"
+#include "rom.h"
+#include "grlib.h"
+#include "formike128x128x16.h"
+#include <string.h>
+
+//*****************************************************************************
+//
+// Defines for the pins that are used to communicate with the ST7637.
+//
+//*****************************************************************************
+#define LCD_A0_BASE            GPIO_PORTB_BASE
+#define LCD_A0_PIN             GPIO_PIN_2
+#define LCD_WR_BASE            GPIO_PORTC_BASE
+#define LCD_WR_PIN             GPIO_PIN_4
+#define LCD_RD_BASE            GPIO_PORTC_BASE
+#define LCD_RD_PIN             GPIO_PIN_5
+#define LCD_BL_BASE            GPIO_PORTF_BASE
+#define LCD_BL_PIN             GPIO_PIN_1
+#define LCD_DATA_BASE          GPIO_PORTG_BASE
+
+//*****************************************************************************
+//
+// Translates a 24-bit RGB color to a display driver-specific color.
+//
+// \param c is the 24-bit RGB color.  The least-significant byte is the blue
+// channel, the next byte is the green channel, and the third byte is the red
+// channel.
+//
+// This macro translates a 24-bit RGB color into a value that can be written
+// into the display's frame buffer in order to reproduce that color, or the
+// closest possible approximation of that color.
+//
+// \return Returns the display-driver specific color.
+//
+//*****************************************************************************
+#define DPYCOLORTRANSLATE(c)    ((((c) & 0x00ff0000) >> 19) |               \
+                                 ((((c) & 0x0000ff00) >> 5) & 0x000007e0) | \
+                                 ((((c) & 0x000000ff) << 8) & 0x0000f800))
+
+//*****************************************************************************
+//
+// Writes a data word to the ST7637.
+//
+//*****************************************************************************
+static void
+WriteData(unsigned char ucData)
+{
+    //
+    // Write the data to the data bus.
+    //
+    HWREG(LCD_DATA_BASE + GPIO_O_DATA + (0xff << 2)) = ucData;
+
+    //
+    // Assert the write enable signal.
+    //
+    HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = 0;
+
+    //
+    // Deassert the write enable signal.
+    //
+    HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = LCD_WR_PIN;
+}
+
+//*****************************************************************************
+//
+// Writes a command to the ST7637.
+//
+//*****************************************************************************
+static void
+WriteCommand(unsigned char ucData)
+{
+    //
+    // Write the command to the data bus.
+    //
+    HWREG(LCD_DATA_BASE + GPIO_O_DATA + (0xff << 2)) = ucData;
+
+    //
+    // Set the A0 signal low, indicating a command.
+    //
+    HWREG(LCD_A0_BASE + GPIO_O_DATA + (LCD_A0_PIN << 2)) = 0;
+
+    //
+    // Assert the write enable signal.
+    //
+    HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = 0;
+
+    //
+    // Deassert the write enable signal.
+    //
+    HWREG(LCD_WR_BASE + GPIO_O_DATA + (LCD_WR_PIN << 2)) = LCD_WR_PIN;
+
+    //
+    // Set the A0 signal high, indicating that following writes are data.
+    //
+    HWREG(LCD_A0_BASE + GPIO_O_DATA + (LCD_A0_PIN << 2)) = LCD_A0_PIN;
+}
+
+//*****************************************************************************
+//
+//! Initializes the display driver.
+//!
+//! This function initializes the ST7637 display controller on the panel,
+//! preparing it to display data.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+Formike128x128x16Init(void)
+{
+    unsigned long ulClockMS, ulCount;
+
+    //
+    // Get the value to pass to SysCtlDelay() in order to delay for 1 ms.
+    //
+    ulClockMS = SysCtlClockGet() / (3 * 1000);
+
+    //
+    // Enable the GPIO peripherals used to interface to the ST7637.
+    //
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
+
+    //
+    // Configure the pins that connect to the LCD as GPIO outputs.
+    //
+    GPIOPinTypeGPIOOutput(LCD_A0_BASE, LCD_A0_PIN);
+    GPIOPinTypeGPIOOutput(LCD_WR_BASE, LCD_WR_PIN);
+    GPIOPinTypeGPIOOutput(LCD_RD_BASE, LCD_RD_PIN);
+    GPIOPinTypeGPIOOutput(LCD_BL_BASE, LCD_BL_PIN);
+    GPIOPinTypeGPIOOutput(LCD_DATA_BASE, 0xff);
+
+    //
+    // Set the LCD control pins to their default values.
+    //
+    GPIOPinWrite(LCD_A0_BASE, LCD_A0_PIN, LCD_A0_PIN);
+    GPIOPinWrite(LCD_WR_BASE, LCD_WR_PIN | LCD_RD_PIN,
+                     LCD_WR_PIN | LCD_RD_PIN);
+    GPIOPinWrite(LCD_BL_BASE, LCD_BL_PIN, 0);
+    GPIOPinWrite(LCD_DATA_BASE, 0xff, 0x00);
+
+    //
+    // Perform a software reset of the ST7637.
+    //
+    WriteCommand(0x01);
+
+    //
+    // Delay for 120ms.
+    //
+    SysCtlDelay(ulClockMS * 120);
+
+    //
+    // Disable auto-load of mask rom data.
+    //
+    WriteCommand(0xD7);
+    WriteData(0xBF);
+
+    //
+    // Set the OTP control mode to read.
+    //
+    WriteCommand(0xE0);
+    WriteData(0x00);
+
+    //
+    // Delay for 10ms.
+    //
+    SysCtlDelay(ulClockMS * 10);
+
+    //
+    // Start the OTP read.
+    //
+    WriteCommand(0xE3);
+
+    //
+    // Delay for 20ms.
+    //
+    SysCtlDelay(ulClockMS * 20);
+
+    //
+    // Cancel the OTP read (it should have finished by now).
+    //
+    WriteCommand(0xE1);
+
+    //
+    // Turn off the display.
+    //
+    WriteCommand(0x28);
+
+    //
+    // Exit sleep mode.
+    //
+    WriteCommand(0x11);
+
+    //
+    // Delay for 50ms.
+    //
+    SysCtlDelay(ulClockMS * 50);
+
+    //
+    // Program the LCD supply voltage V0 to 14V.
+    //
+    WriteCommand(0xC0);
+    WriteData(0x04);
+    WriteData(0x01);
+
+    //
+    // Select an LCD bias voltage ratio of 1/12.
+    //
+    WriteCommand(0xC3);
+    WriteData(0x00);
+
+    //
+    // Enable the x8 booster circuit.
+    //
+    WriteCommand(0xC4);
+    WriteData(0x07);
+
+    //
+    // Invert the column scan direction for the panel.
+    //
+    WriteCommand(0xB7);
+    WriteData(0xC0);
+
+    //
+    // Select 16bpp, 5-6-5 data input mode.
+    //
+    WriteCommand(0x3A);
+    WriteData(0x05);
+
+    //
+    // Select the memory scanning direction.  The scanning mode does not matter
+    // for this driver since the row/column selects will constrain the writes
+    // to the desired area of the display.
+    //
+    WriteCommand(0x36);
+    WriteData(0x00);
+
+    //
+    // Turn on the display.
+    //
+    WriteCommand(0x29);
+
+    //
+    // Clear the contents of the display buffer.
+    //
+    WriteCommand(0x2A);
+    WriteData(0x00);
+    WriteData(0x7F);
+    WriteCommand(0x2B);
+    WriteData(0x01);
+    WriteData(0x80);
+    WriteCommand(0x2c);
+    for(ulCount = 0; ulCount < (128 * 128); ulCount++)
+    {
+        WriteData(0x00);
+        WriteData(0x00);
+    }
+
+    //
+    // Enable normal operation of the LCD.
+    //
+    WriteCommand(0x13);
+}
+
+//*****************************************************************************
+//
+//! Turns on the backlight.
+//!
+//! This function turns on the backlight on the display.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+Formike128x128x16BacklightOn(void)
+{
+    //
+    // Assert the signal that turns on the backlight.
+    //
+    HWREG(LCD_BL_BASE + GPIO_O_DATA + (LCD_BL_PIN << 2)) = LCD_BL_PIN;
+}
+
+//*****************************************************************************
+//
+//! Turns off the backlight.
+//!
+//! This function turns off the backlight on the display.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+Formike128x128x16BacklightOff(void)
+{
+    //
+    // Deassert the signal that turns on the backlight.
+    //
+    HWREG(LCD_BL_BASE + GPIO_O_DATA + (LCD_BL_PIN << 2)) = 0;
+}
+
+//*****************************************************************************
+//
+//! Draws a pixel on the screen.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//! \param lX is the X coordinate of the pixel.
+//! \param lY is the Y coordinate of the pixel.
+//! \param ulValue is the color of the pixel.
+//!
+//! This function sets the given pixel to a particular color.  The coordinates
+//! of the pixel are assumed to be within the extents of the display.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+Formike128x128x16PixelDraw(void *pvDisplayData, long lX, long lY,
+                           unsigned long ulValue)
+{
+    //
+    // Set the X address of the display cursor.
+    //
+    WriteCommand(0x2a);
+    WriteData(lX);
+    WriteData(lX);
+
+    //
+    // Set the Y address of the display cursor.
+    //
+    WriteCommand(0x2b);
+    WriteData(lY + 1);
+    WriteData(lY + 1);
+
+    //
+    // Write the pixel value.
+    //
+    WriteCommand(0x2c);
+    WriteData(ulValue >> 8);
+    WriteData(ulValue);
+}
+
+//*****************************************************************************
+//
+//! Draws a horizontal sequence of pixels on the screen.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//! \param lX is the X coordinate of the first pixel.
+//! \param lY is the Y coordinate of the first pixel.
+//! \param lX0 is sub-pixel offset within the pixel data, which is valid for 1
+//! or 4 bit per pixel formats.
+//! \param lCount is the number of pixels to draw.
+//! \param lBPP is the number of bits per pixel; must be 1, 4, or 8.
+//! \param pucData is a pointer to the pixel data.  For 1 and 4 bit per pixel
+//! formats, the most significant bit(s) represent the left-most pixel.
+//! \param pucPalette is a pointer to the palette used to draw the pixels.
+//!
+//! This function draws a horizontal sequence of pixels on the screen, using
+//! the supplied palette.  For 1 bit per pixel format, the palette contains
+//! pre-translated colors; for 4 and 8 bit per pixel formats, the palette
+//! contains 24-bit RGB values that must be translated before being written to
+//! the display.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+Formike128x128x16PixelDrawMultiple(void *pvDisplayData, long lX, long lY,
+                                   long lX0, long lCount, long lBPP,
+                                   const unsigned char *pucData,
+                                   const unsigned char *pucPalette)
+{
+    unsigned long ulByte;
+
+    //
+    // Set the extent of the line along the X axis.
+    //
+    WriteCommand(0x2a);
+    WriteData(lX);
+    WriteData(lX + lCount - 1);
+
+    //
+    // Set the Y address of the display cursor.
+    //
+    WriteCommand(0x2b);
+    WriteData(lY + 1);
+    WriteData(lY + 1);
+
+    //
+    // Write the data RAM write command.
+    //
+    WriteCommand(0x2c);
+
+    //
+    // Determine how to interpret the pixel data based on the number of bits
+    // per pixel.
+    //
+    switch(lBPP)
+    {
+        //
+        // The pixel data is in 1 bit per pixel format.
+        //
+        case 1:
+        {
+            //
+            // Loop while there are more pixels to draw.
+            //
+            while(lCount)
+            {
+                //
+                // Get the next byte of image data.
+                //
+                ulByte = *pucData++;
+
+                //
+                // Loop through the pixels in this byte of image data.
+                //
+                for(; (lX0 < 8) && lCount; lX0++, lCount--)
+                {
+                    //
+                    // Draw this pixel in the appropriate color.
+                    //
+                    lBPP = ((unsigned long *)pucPalette)[(ulByte >>
+                                                          (7 - lX0)) & 1];
+                    WriteData(lBPP >> 8);
+                    WriteData(lBPP);
+                }
+
+                //
+                // Start at the beginning of the next byte of image data.
+                //
+                lX0 = 0;
+            }
+
+            //
+            // The image data has been drawn.
+            //
+            break;
+        }
+
+        //
+        // The pixel data is in 4 bit per pixel format.
+        //
+        case 4:
+        {
+            //
+            // Loop while there are more pixels to draw.  "Duff's device" is
+            // used to jump into the middle of the loop if the first nibble of
+            // the pixel data should not be used.  Duff's device makes use of
+            // the fact that a case statement is legal anywhere within a
+            // sub-block of a switch statement.  See
+            // http://en.wikipedia.org/wiki/Duff's_device for detailed
+            // information about Duff's device.
+            //
+            switch(lX0 & 1)
+            {
+                case 0:
+                    while(lCount)
+                    {
+                        //
+                        // Get the upper nibble of the next byte of pixel data
+                        // and extract the corresponding entry from the
+                        // palette.
+                        //
+                        ulByte = (*pucData >> 4) * 3;
+                        ulByte = (*(unsigned long *)(pucPalette + ulByte) &
+                                  0x00ffffff);
+
+                        //
+                        // Translate this palette entry and write it to the
+                        // screen.
+                        //
+                        ulByte = DPYCOLORTRANSLATE(ulByte);
+                        WriteData(ulByte >> 8);
+                        WriteData(ulByte);
+
+                        //
+                        // Decrement the count of pixels to draw.
+                        //
+                        lCount--;
+
+                        //
+                        // See if there is another pixel to draw.
+                        //
+                        if(lCount)
+                        {
+                case 1:
+                            //
+                            // Get the lower nibble of the next byte of pixel
+                            // data and extract the corresponding entry from
+                            // the palette.
+                            //
+                            ulByte = (*pucData++ & 15) * 3;
+                            ulByte = (*(unsigned long *)(pucPalette + ulByte) &
+                                      0x00ffffff);
+
+                            //
+                            // Translate this palette entry and write it to the
+                            // screen.
+                            //
+                            ulByte = DPYCOLORTRANSLATE(ulByte);
+                            WriteData(ulByte >> 8);
+                            WriteData(ulByte);
+
+                            //
+                            // Decrement the count of pixels to draw.
+                            //
+                            lCount--;
+                        }
+                    }
+            }
+
+            //
+            // The image data has been drawn.
+            //
+            break;
+        }
+
+        //
+        // The pixel data is in 8 bit per pixel format.
+        //
+        case 8:
+        {
+            //
+            // Loop while there are more pixels to draw.
+            //
+            while(lCount--)
+            {
+                //
+                // Get the next byte of pixel data and extract the
+                // corresponding entry from the palette.
+                //
+                ulByte = *pucData++ * 3;
+                ulByte = *(unsigned long *)(pucPalette + ulByte) & 0x00ffffff;
+
+                //
+                // Translate this palette entry and write it to the screen.
+                //
+                ulByte = DPYCOLORTRANSLATE(ulByte);
+                WriteData(ulByte >> 8);
+                WriteData(ulByte);
+            }
+
+            //
+            // The image data has been drawn.
+            //
+            break;
+        }
+    }
+}
+
+//*****************************************************************************
+//
+//! Flushes any cached drawing operations.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//!
+//! This functions flushes any cached drawing operations to the display.  This
+//! is useful when a local frame buffer is used for drawing operations, and the
+//! flush would copy the local frame buffer to the display.  For the ST7637
+//! driver, the flush is a no operation.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+Formike128x128x16Flush(void *pvDisplayData)
+{
+    //
+    // There is nothing to be done.
+    //
+}
+
+//*****************************************************************************
+//
+//! Draws a horizontal line.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//! \param lX1 is the X coordinate of the start of the line.
+//! \param lX2 is the X coordinate of the end of the line.
+//! \param lY is the Y coordinate of the line.
+//! \param ulValue is the color of the line.
+//!
+//! This function draws a horizontal line on the display.  The coordinates of
+//! the line are assumed to be within the extents of the display.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+Formike128x128x16LineDrawH(void *pvDisplayData, long lX1, long lX2, long lY,
+                           unsigned long ulValue)
+{
+    //
+    // Set the extent of the line along the X axis.
+    //
+    WriteCommand(0x2a);
+    WriteData(lX1);
+    WriteData(lX2);
+
+    //
+    // Set the Y address of the display cursor.
+    //
+    WriteCommand(0x2b);
+    WriteData(lY + 1);
+    WriteData(lY + 1);
+
+    //
+    // Write the data RAM write command.
+    //
+    WriteCommand(0x2c);
+
+    //
+    // Loop through the pixels of this horizontal line.
+    //
+    while(lX1++ <= lX2)
+    {
+        //
+        // Write the pixel value.
+        //
+        WriteData(ulValue >> 8);
+        WriteData(ulValue);
+    }
+}
+
+//*****************************************************************************
+//
+//! Draws a vertical line.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//! \param lX is the X coordinate of the line.
+//! \param lY1 is the Y coordinate of the start of the line.
+//! \param lY2 is the Y coordinate of the end of the line.
+//! \param ulValue is the color of the line.
+//!
+//! This function draws a vertical line on the display.  The coordinates of the
+//! line are assumed to be within the extents of the display.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+Formike128x128x16LineDrawV(void *pvDisplayData, long lX, long lY1, long lY2,
+                           unsigned long ulValue)
+{
+    //
+    // Set the X address of the display cursor.
+    //
+    WriteCommand(0x2a);
+    WriteData(lX);
+    WriteData(lX);
+
+    //
+    // Set the extent of the line along the Y axis.
+    //
+    WriteCommand(0x2b);
+    WriteData(lY1 + 1);
+    WriteData(lY2 + 1);
+
+    //
+    // Write the data RAM write command.
+    //
+    WriteCommand(0x2c);
+
+    //
+    // Loop through the pixels of this vertical line.
+    //
+    while(lY1++ <= lY2)
+    {
+        //
+        // Write the pixel value.
+        //
+        WriteData(ulValue >> 8);
+        WriteData(ulValue);
+    }
+}
+
+//*****************************************************************************
+//
+//! Fills a rectangle.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//! \param pRect is a pointer to the structure describing the rectangle.
+//! \param ulValue is the color of the rectangle.
+//!
+//! This function fills a rectangle on the display.  The coordinates of the
+//! rectangle are assumed to be within the extents of the display, and the
+//! rectangle specification is fully inclusive (i.e. both sXMin and sXMax are
+//! drawn, along with sYMin and sYMax).
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+Formike128x128x16RectFill(void *pvDisplayData, const tRectangle *pRect,
+                          unsigned long ulValue)
+{
+    long lCount;
+
+    //
+    // Set the extent of the rectangle along the X axis.
+    //
+    WriteCommand(0x2a);
+    WriteData(pRect->sXMin);
+    WriteData(pRect->sXMax);
+
+    //
+    // Set the extent of the rectangle along the Y axis.
+    //
+    WriteCommand(0x2b);
+    WriteData(pRect->sYMin + 1);
+    WriteData(pRect->sYMax + 1);
+
+    //
+    // Write the data RAM write command.
+    //
+    WriteCommand(0x2c);
+
+    //
+    // Loop through the pixels in this rectangle.
+    //
+    for(lCount = ((pRect->sXMax - pRect->sXMin + 1) *
+                  (pRect->sYMax - pRect->sYMin + 1)); lCount > 0; lCount--)
+    {
+        //
+        // Write the pixel value.
+        //
+        WriteData(ulValue >> 8);
+        WriteData(ulValue);
+    }
+}
+
+//*****************************************************************************
+//
+//! Translates a 24-bit RGB color to a display driver-specific color.
+//!
+//! \param pvDisplayData is a pointer to the driver-specific data for this
+//! display driver.
+//! \param ulValue is the 24-bit RGB color.  The least-significant byte is the
+//! blue channel, the next byte is the green channel, and the third byte is the
+//! red channel.
+//!
+//! This function translates a 24-bit RGB color into a value that can be
+//! written into the display's frame buffer in order to reproduce that color,
+//! or the closest possible approximation of that color.
+//!
+//! \return Returns the display-driver specific color.
+//
+//*****************************************************************************
+static unsigned long
+Formike128x128x16ColorTranslate(void *pvDisplayData, unsigned long ulValue)
+{
+    //
+    // Translate from a 24-bit RGB color to a 5-6-5 RGB color.
+    //
+    return(DPYCOLORTRANSLATE(ulValue));
+}
+
+//*****************************************************************************
+//
+//! The display structure that describes the driver for the Formike Electronic
+//! KWH015C04-F01 CSTN panel with an ST7637 controller.
+//
+//*****************************************************************************
+const tDisplay g_sFormike128x128x16 =
+{
+    sizeof(tDisplay),
+    0,
+    128,
+    128,
+    Formike128x128x16PixelDraw,
+    Formike128x128x16PixelDrawMultiple,
+    Formike128x128x16LineDrawH,
+    Formike128x128x16LineDrawV,
+    Formike128x128x16RectFill,
+    Formike128x128x16ColorTranslate,
+    Formike128x128x16Flush
+};
+
+//*****************************************************************************
+//
+// Close the Doxygen group.
+//! @}
+//
+//*****************************************************************************
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+/* FreeRTOS.org demo wrappers.  These are required so the prototypes for the
+functions are the same as for the display drivers used by other evaluation
+kits. */
+
+static tContext sContext;
+
+void vFormike128x128x16Clear( void )
+{
+const tRectangle xRectangle = { 0, 0, 127, 127 };
+
+    GrContextForegroundSet( &sContext, ClrBlack );
+    GrRectFill( &sContext, &xRectangle );
+	GrContextForegroundSet(&sContext, ClrWhite);
+}
+/*-----------------------------------------------------------*/
+
+void vFormike128x128x16StringDraw( const char *pcString, unsigned long lX, unsigned long lY, unsigned char ucColor )
+{
+	GrContextForegroundSet(&sContext, ClrWhite);
+	GrStringDraw( &sContext, pcString, strlen( pcString ), lX, lY, false );
+}
+/*-----------------------------------------------------------*/
+
+void vFormike128x128x16Init( unsigned long ul )
+{
+tRectangle rectScreen;
+const unsigned char *pcAppName = "www.FreeRTOS.org";
+
+	( void ) ul;
+	
+    Formike128x128x16Init();
+    Formike128x128x16BacklightOn();
+    GrContextInit(&sContext, &g_sFormike128x128x16);
+    GrContextFontSet(&sContext, &g_sFontCmss12);
+    rectScreen.sXMin = 0;
+
+	/* Fill the screen with a black rectangle. */
+    rectScreen.sYMin = 0;
+    rectScreen.sXMax = g_sFormike128x128x16.usWidth - 1;
+    rectScreen.sYMax = g_sFormike128x128x16.usHeight - 1;
+    GrContextForegroundSet(&sContext, ClrBlack);
+    GrRectFill(&sContext, &rectScreen);
+}
+/*-----------------------------------------------------------*/
+
+void vFormike128x128x16ImageDraw( const unsigned char *pucImage, unsigned long ulX, unsigned long ulY, unsigned long ulWidth, unsigned long ulHeight )
+{
+	GrImageDraw( &sContext, pucImage, ( long ) ulX, ( long ) ulY);
+}
+
+
+
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/formike128x128x16.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/formike128x128x16.h
new file mode 100644
index 000000000..feaec758f
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/formike128x128x16.h
@@ -0,0 +1,51 @@
+//*****************************************************************************
+//
+// formike128x128x16.h - Prototypes for the Formike Electronic KWH015C04-F01
+//                       display driver.
+//
+// Copyright (c) 2008 Luminary Micro, Inc.  All rights reserved.
+// 
+// Software License Agreement
+// 
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+// 
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  You may not combine
+// this software with "viral" open-source software in order to form a larger
+// program.  Any use in violation of the foregoing restrictions may subject
+// the user to criminal sanctions under applicable laws, as well as to civil
+// liability for the breach of the terms and conditions of this license.
+// 
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+// 
+// This is part of revision 2523 of the Stellaris Peripheral Driver Library.
+//
+//*****************************************************************************
+
+#ifndef __FORMIKE128X128X16_H__
+#define __FORMIKE128X128X16_H__
+
+//*****************************************************************************
+//
+// Prototypes for the globals exported by this driver.
+//
+//*****************************************************************************
+extern void Formike128x128x16Init(void);
+extern void Formike128x128x16BacklightOn(void);
+extern void Formike128x128x16BacklightOff(void);
+extern const tDisplay g_sFormike128x128x16;
+
+/* FreeRTOS.org demo wrappers.  These are required so the prototypes for the
+functions are the same as for the display drivers used by other evaluation
+kits. */
+void vFormike128x128x16Clear( void );
+void vFormike128x128x16StringDraw( const char *pcString, unsigned long lX, unsigned long lY, unsigned char ucColor );
+void vFormike128x128x16Init( unsigned long ul );
+void vFormike128x128x16ImageDraw( const unsigned char *pucImage, unsigned long ulX, unsigned long ulY, unsigned long ulWidth, unsigned long ulHeight );
+
+#endif // __FORMIKE128X128X16_H__
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/lcd_message.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/lcd_message.h
new file mode 100644
index 000000000..ced7a1dbc
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/lcd_message.h
@@ -0,0 +1,9 @@
+#ifndef LCD_MESSAGE_H
+#define LCD_MESSAGE_H
+
+typedef struct
+{
+	char *pcMessage;
+} xOLEDMessage;
+
+#endif /* LCD_MESSAGE_H */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/main.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/main.c
new file mode 100644
index 000000000..36d18ee12
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/main.c
@@ -0,0 +1,457 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under
+	the terms of the GNU General Public License (version 2) as published by the
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the
+	source code for proprietary components outside of the FreeRTOS kernel.
+	Alternative commercial license and support terms are also available upon
+	request.  See the licensing section of http://www.FreeRTOS.org for full
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+
+/*
+ * Creates all the demo application tasks, then starts the scheduler.  The WEB
+ * documentation provides more details of the standard demo application tasks.
+ * In addition to the standard demo tasks, the following tasks and tests are
+ * defined and/or created within this file:
+ *
+ * "Fast Interrupt Test" - A high frequency periodic interrupt is generated
+ * using a free running timer to demonstrate the use of the
+ * configKERNEL_INTERRUPT_PRIORITY configuration constant.  The interrupt
+ * service routine measures the number of processor clocks that occur between
+ * each interrupt - and in so doing measures the jitter in the interrupt timing.
+ * The maximum measured jitter time is latched in the ulMaxJitter variable, and
+ * displayed on the OLED display by the 'OLED' task as described below.  The
+ * fast interrupt is configured and handled in the timertest.c source file.
+ *
+ * "OLED" task - the OLED task is a 'gatekeeper' task.  It is the only task that
+ * is permitted to access the display directly.  Other tasks wishing to write a
+ * message to the OLED send the message on a queue to the OLED task instead of
+ * accessing the OLED themselves.  The OLED task just blocks on the queue waiting
+ * for messages - waking and displaying the messages as they arrive.
+ *
+ * "Check" hook -  This only executes every five seconds from the tick hook.
+ * Its main function is to check that all the standard demo tasks are still
+ * operational.  Should any unexpected behaviour within a demo task be discovered
+ * the tick hook will write an error to the OLED (via the OLED task).  If all the
+ * demo tasks are executing with their expected behaviour then the check task
+ * writes PASS to the OLED (again via the OLED task), as described above.
+ *
+ * "uIP" task -  This is the task that handles the uIP stack.  All TCP/IP
+ * processing is performed in this task.
+ */
+
+
+
+
+/*************************************************************************
+ * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html
+ * which provides information on configuring and running this demo for the
+ * various Luminary Micro EKs.
+ *************************************************************************/
+
+
+
+
+/* Standard includes. */
+#include <stdio.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* Hardware library includes. */
+#include "hw_memmap.h"
+#include "hw_types.h"
+#include "hw_sysctl.h"
+#include "sysctl.h"
+#include "gpio.h"
+#include "grlib.h"
+#include "rit128x96x4.h"
+#include "osram128x64x4.h"
+#include "formike128x128x16.h"
+
+/* Demo app includes. */
+#include "BlockQ.h"
+#include "death.h"
+#include "integer.h"
+#include "blocktim.h"
+#include "flash.h"
+#include "partest.h"
+#include "semtest.h"
+#include "PollQ.h"
+#include "lcd_message.h"
+#include "bitmap.h"
+#include "GenQTest.h"
+#include "QPeek.h"
+#include "recmutex.h"
+#include "IntQueue.h"
+
+/*-----------------------------------------------------------*/
+
+/* The time between cycles of the 'check' functionality (defined within the
+tick hook. */
+#define mainCHECK_DELAY						( ( portTickType ) 5000 / portTICK_RATE_MS )
+
+/* Size of the stack allocated to the uIP task. */
+#define mainBASIC_WEB_STACK_SIZE            ( configMINIMAL_STACK_SIZE * 3 )
+
+/* The OLED task uses the sprintf function so requires a little more stack too. */
+#define mainOLED_TASK_STACK_SIZE			( configMINIMAL_STACK_SIZE + 50 )
+
+/* Task priorities. */
+#define mainQUEUE_POLL_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainCHECK_TASK_PRIORITY				( tskIDLE_PRIORITY + 3 )
+#define mainSEM_TEST_PRIORITY				( tskIDLE_PRIORITY + 1 )
+#define mainBLOCK_Q_PRIORITY				( tskIDLE_PRIORITY + 2 )
+#define mainCREATOR_TASK_PRIORITY           ( tskIDLE_PRIORITY + 3 )
+#define mainINTEGER_TASK_PRIORITY           ( tskIDLE_PRIORITY )
+#define mainGEN_QUEUE_TASK_PRIORITY			( tskIDLE_PRIORITY )
+
+/* The maximum number of message that can be waiting for display at any one
+time. */
+#define mainOLED_QUEUE_SIZE					( 3 )
+
+/* Dimensions the buffer into which the jitter time is written. */
+#define mainMAX_MSG_LEN						25
+
+/* The period of the system clock in nano seconds.  This is used to calculate
+the jitter time in nano seconds. */
+#define mainNS_PER_CLOCK					( ( unsigned portLONG ) ( ( 1.0 / ( double ) configCPU_CLOCK_HZ ) * 1000000000.0 ) )
+
+/* Constants used when writing strings to the display. */
+#define mainCHARACTER_HEIGHT				( 9 )
+#define mainMAX_ROWS_128					( mainCHARACTER_HEIGHT * 14 )
+#define mainMAX_ROWS_96						( mainCHARACTER_HEIGHT * 10 )
+#define mainMAX_ROWS_64						( mainCHARACTER_HEIGHT * 7 )
+#define mainFULL_SCALE						( 15 )
+#define ulSSI_FREQUENCY						( 3500000UL )
+
+/*-----------------------------------------------------------*/
+
+/*
+ * The task that handles the uIP stack.  All TCP/IP processing is performed in
+ * this task.
+ */
+extern void vuIP_Task( void *pvParameters );
+
+/*
+ * The display is written two by more than one task so is controlled by a
+ * 'gatekeeper' task.  This is the only task that is actually permitted to
+ * access the display directly.  Other tasks wanting to display a message send
+ * the message to the gatekeeper.
+ */
+static void vOLEDTask( void *pvParameters );
+
+/*
+ * Configure the hardware for the demo.
+ */
+static void prvSetupHardware( void );
+
+/*
+ * Configures the high frequency timers - those used to measure the timing
+ * jitter while the real time kernel is executing.
+ */
+extern void vSetupHighFrequencyTimer( void );
+
+/*
+ * The idle hook is used to run a test of the scheduler context switch
+ * mechanism.
+ */
+void vApplicationIdleHook( void ) __attribute__((naked));
+/*-----------------------------------------------------------*/
+
+/* The queue used to send messages to the OLED task. */
+xQueueHandle xOLEDQueue;
+
+/* The welcome text. */
+const portCHAR * const pcWelcomeMessage = "   www.FreeRTOS.org";
+
+/* Variables used to detect the test in the idle hook failing. */
+unsigned portLONG ulIdleError = pdFALSE;
+
+/*-----------------------------------------------------------*/
+
+/*************************************************************************
+ * Please ensure to read http://www.freertos.org/portLM3Sxxxx_Eclipse.html
+ * which provides information on configuring and running this demo for the
+ * various Luminary Micro EKs.
+ *************************************************************************/
+int main( void )
+{
+	prvSetupHardware();
+
+	/* Create the queue used by the OLED task.  Messages for display on the OLED
+	are received via this queue. */
+	xOLEDQueue = xQueueCreate( mainOLED_QUEUE_SIZE, sizeof( xOLEDMessage ) );
+
+	/* Create the uIP task if running on a processor that includes a MAC and
+	PHY. */
+	if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )
+	{
+		xTaskCreate( vuIP_Task, ( signed portCHAR * ) "uIP", mainBASIC_WEB_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY - 1, NULL );
+	}
+
+	/* Start the standard demo tasks. */
+	vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
+    vCreateBlockTimeTasks();
+    vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
+    vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
+    vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );
+    vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
+    vStartQueuePeekTasks();
+    vStartRecursiveMutexTasks();
+    vStartInterruptQueueTasks();
+
+	/* Start the tasks defined within this file/specific to this demo. */
+	xTaskCreate( vOLEDTask, ( signed portCHAR * ) "OLED", mainOLED_TASK_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+
+	/* The suicide tasks must be created last as they need to know how many
+	tasks were running prior to their creation in order to ascertain whether
+	or not the correct/expected number of tasks are running at any given time. */
+    vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
+
+	/* Configure the high frequency interrupt used to measure the interrupt
+	jitter time. */
+	vSetupHighFrequencyTimer();
+
+	/* Start the scheduler. */
+	vTaskStartScheduler();
+
+    /* Will only get here if there was insufficient memory to create the idle
+    task. */
+	for( ;; );
+	return 0;
+}
+/*-----------------------------------------------------------*/
+
+void prvSetupHardware( void )
+{
+    /* If running on Rev A2 silicon, turn the LDO voltage up to 2.75V.  This is
+    a workaround to allow the PLL to operate reliably. */
+    if( DEVICE_IS_REVA2 )
+    {
+        SysCtlLDOSet( SYSCTL_LDO_2_75V );
+    }
+
+	/* Set the clocking to run from the PLL at 50 MHz */
+	SysCtlClockSet( SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_8MHZ );
+
+	/* 	Enable Port F for Ethernet LEDs
+		LED0        Bit 3   Output
+		LED1        Bit 2   Output */
+	SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOF );
+	GPIODirModeSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3), GPIO_DIR_MODE_HW );
+	GPIOPadConfigSet( GPIO_PORTF_BASE, (GPIO_PIN_2 | GPIO_PIN_3 ), GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD );
+
+	vParTestInitialise();
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationTickHook( void )
+{
+static xOLEDMessage xMessage = { "PASS" };
+static unsigned portLONG ulTicksSinceLastDisplay = 0;
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
+
+	/* Called from every tick interrupt.  Have enough ticks passed to make it
+	time to perform our health status check again? */
+	ulTicksSinceLastDisplay++;
+	if( ulTicksSinceLastDisplay >= mainCHECK_DELAY )
+	{
+		ulTicksSinceLastDisplay = 0;
+
+		/* Has an error been found in any task? */
+		if( xAreGenericQueueTasksStillRunning() != pdTRUE )
+		{
+			xMessage.pcMessage = "ERROR IN GEN Q";
+		}
+		else if( xAreQueuePeekTasksStillRunning() != pdTRUE )
+		{
+			xMessage.pcMessage = "ERROR IN PEEK Q";
+		}
+		else if( xAreBlockingQueuesStillRunning() != pdTRUE )
+		{
+			xMessage.pcMessage = "ERROR IN BLOCK Q";
+		}
+		else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
+		{
+			xMessage.pcMessage = "ERROR IN BLOCK TIME";
+		}
+	    else if( xAreSemaphoreTasksStillRunning() != pdTRUE )
+	    {
+	        xMessage.pcMessage = "ERROR IN SEMAPHORE";
+	    }
+	    else if( xArePollingQueuesStillRunning() != pdTRUE )
+	    {
+	        xMessage.pcMessage = "ERROR IN POLL Q";
+	    }
+	    else if( xIsCreateTaskStillRunning() != pdTRUE )
+	    {
+	        xMessage.pcMessage = "ERROR IN CREATE";
+	    }
+	    else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
+	    {
+	        xMessage.pcMessage = "ERROR IN MATH";
+	    }
+	    else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
+	    {
+	    	xMessage.pcMessage = "ERROR IN REC MUTEX";
+	    }
+		else if( ulIdleError != pdFALSE )
+		{
+			xMessage.pcMessage = "ERROR IN HOOK";
+		}
+		else if( xAreIntQueueTasksStillRunning() != pdTRUE )
+		{
+			xMessage.pcMessage = "ERROR IN INT QUEUE";
+		}
+
+
+		/* Send the message to the OLED gatekeeper for display. */
+		xHigherPriorityTaskWoken = pdFALSE;
+		xQueueSendFromISR( xOLEDQueue, &xMessage, &xHigherPriorityTaskWoken );
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vOLEDTask( void *pvParameters )
+{
+xOLEDMessage xMessage;
+unsigned portLONG ulY, ulMaxY;
+static portCHAR cMessage[ mainMAX_MSG_LEN ];
+extern volatile unsigned portLONG ulMaxJitter;
+unsigned portBASE_TYPE uxUnusedStackOnEntry, uxUnusedStackNow;
+const unsigned portCHAR *pucImage;
+
+/* Functions to access the OLED.  The one used depends on the dev kit
+being used. */
+void ( *vOLEDInit )( unsigned portLONG ) = NULL;
+void ( *vOLEDStringDraw )( const portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portCHAR ) = NULL;
+void ( *vOLEDImageDraw )( const unsigned portCHAR *, unsigned portLONG, unsigned portLONG, unsigned portLONG, unsigned portLONG ) = NULL;
+void ( *vOLEDClear )( void ) = NULL;
+
+	/* Just for demo purposes. */
+	uxUnusedStackOnEntry = uxTaskGetStackHighWaterMark( NULL );
+
+	/* Map the OLED access functions to the driver functions that are appropriate
+	for the evaluation kit being used. */
+	switch( HWREG( SYSCTL_DID1 ) & SYSCTL_DID1_PRTNO_MASK )
+	{
+		case SYSCTL_DID1_PRTNO_6965	:
+		case SYSCTL_DID1_PRTNO_2965	:	vOLEDInit = OSRAM128x64x4Init;
+										vOLEDStringDraw = OSRAM128x64x4StringDraw;
+										vOLEDImageDraw = OSRAM128x64x4ImageDraw;
+										vOLEDClear = OSRAM128x64x4Clear;
+										ulMaxY = mainMAX_ROWS_64;
+										pucImage = pucBasicBitmap;
+										break;
+
+		case SYSCTL_DID1_PRTNO_1968	:
+		case SYSCTL_DID1_PRTNO_8962 :	vOLEDInit = RIT128x96x4Init;
+										vOLEDStringDraw = RIT128x96x4StringDraw;
+										vOLEDImageDraw = RIT128x96x4ImageDraw;
+										vOLEDClear = RIT128x96x4Clear;
+										ulMaxY = mainMAX_ROWS_96;
+										pucImage = pucBasicBitmap;
+										break;
+
+		default						:	vOLEDInit = vFormike128x128x16Init;
+										vOLEDStringDraw = vFormike128x128x16StringDraw;
+										vOLEDImageDraw = vFormike128x128x16ImageDraw;
+										vOLEDClear = vFormike128x128x16Clear;
+										ulMaxY = mainMAX_ROWS_128;
+										pucImage = pucGrLibBitmap;
+										break;
+	}
+
+	ulY = ulMaxY;
+
+	/* Initialise the OLED and display a startup message. */
+	vOLEDInit( ulSSI_FREQUENCY );
+	vOLEDStringDraw( "POWERED BY FreeRTOS", 0, 0, mainFULL_SCALE );
+	vOLEDImageDraw( pucImage, 0, mainCHARACTER_HEIGHT + 1, bmpBITMAP_WIDTH, bmpBITMAP_HEIGHT );
+
+	for( ;; )
+	{
+		/* Wait for a message to arrive that requires displaying. */
+		xQueueReceive( xOLEDQueue, &xMessage, portMAX_DELAY );
+
+		/* Write the message on the next available row. */
+		ulY += mainCHARACTER_HEIGHT;
+		if( ulY >= ulMaxY )
+		{
+			ulY = mainCHARACTER_HEIGHT;
+			vOLEDClear();
+			vOLEDStringDraw( pcWelcomeMessage, 0, 0, mainFULL_SCALE );
+		}
+
+		/* Display the message along with the maximum jitter time from the
+		high priority time test. */
+		sprintf( cMessage, "%s [%uns]", xMessage.pcMessage, ulMaxJitter * mainNS_PER_CLOCK );
+		vOLEDStringDraw( cMessage, 0, ulY, mainFULL_SCALE );
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationStackOverflowHook( xTaskHandle *pxTask, signed portCHAR *pcTaskName )
+{
+	for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationMallocFailedHook( void )
+{
+	for( ;; );
+}
+/*-----------------------------------------------------------*/
+
+/* Just to keep the linker happy. */
+void __error__( char *pcFilename, unsigned long ulLine )
+{
+	for( ;; );
+}
+
+int uipprintf( const char *fmt, ... )
+{
+	return( 0 );
+}
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/osram128x64x4.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/osram128x64x4.c
new file mode 100644
index 000000000..3353a82e6
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/osram128x64x4.c
@@ -0,0 +1,933 @@
+//*****************************************************************************
+//
+// osram128x64x4.c - Driver for the OSRAM 128x64x4 graphical OLED display.
+//
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.
+// 
+// Software License Agreement
+// 
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+// 
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+// 
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+// 
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup ek_lm3sx965_api
+//! @{
+//
+//*****************************************************************************
+
+#include "hw_ssi.h"
+#include "hw_memmap.h"
+#include "hw_sysctl.h"
+#include "hw_types.h"
+#include "debug.h"
+#include "gpio.h"
+#include "ssi.h"
+#include "sysctl.h"
+#include "osram128x64x4.h"
+
+//*****************************************************************************
+//
+// Flag to indicate if SSI port is enabled for OSRAM usage.
+//
+//*****************************************************************************
+static volatile tBoolean g_bSSIEnabled = false;
+
+//*****************************************************************************
+//
+// Define the OSRAM 128x64x4 Remap Setting(s).  This will be used in
+// several places in the code to switch between vertical and horizontal
+// address incrementing.
+//
+// The Remap Command (0xA0) takes one 8-bit parameter.  The parameter is
+// defined as follows.
+//
+// Bit 7: Reserved
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even
+//        When enabled, the COM signals are split Odd on one side, even on
+//        the other.  Otherwise, they are split 0-39 on one side, 40-79 on
+//        the other.
+// Bit 5: Reserved
+// Bit 4: Disable(0)/Enable(1) COM Remap
+//        When Enabled, ROW 0-79 map to COM 79-0 (i.e. reverse row order)
+// Bit 3: Reserved
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment
+//        When set, data RAM address will increment along the column rather
+//        than along the row.
+// Bit 1: Disable(0)/Enable(1) Nibble Remap
+//        When enabled, the upper and lower nibbles in the DATA bus for access
+//        to the data RAM are swapped.
+// Bit 0: Disable(0)/Enable(1) Column Address Remap
+//        When enabled, DATA RAM columns 0-63 are remapped to Segment Columns
+//        127-0.
+//
+//*****************************************************************************
+#define OSRAM_INIT_REMAP    0x52
+#define OSRAM_INIT_OFFSET   0x4C
+static const unsigned char g_pucOSRAM128x64x4VerticalInc[]   = { 0xA0, 0x56 };
+static const unsigned char g_pucOSRAM128x64x4HorizontalInc[] = { 0xA0, 0x52 };
+
+//*****************************************************************************
+//
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this
+// table) for displaying text on the OLED display.  The data is organized as
+// bytes from the left column to the right column, with each byte containing
+// the top row in the LSB and the bottom row in the MSB.
+//
+// Note:  This is the same font data that is used in the EK-LM3S811
+// osram96x16x1 driver.  The single bit-per-pixel is expaned in the StringDraw
+// function to the appropriate four bit-per-pixel gray scale format.
+//
+//*****************************************************************************
+static const unsigned char g_pucFont[96][5] =
+{
+    { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "
+    { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !
+    { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "
+    { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #
+    { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $
+    { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %
+    { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &
+    { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '
+    { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (
+    { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )
+    { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *
+    { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +
+    { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,
+    { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -
+    { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .
+    { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /
+    { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0
+    { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1
+    { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2
+    { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3
+    { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4
+    { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5
+    { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6
+    { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7
+    { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8
+    { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9
+    { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :
+    { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;
+    { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <
+    { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =
+    { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >
+    { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?
+    { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @
+    { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A
+    { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B
+    { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C
+    { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D
+    { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E
+    { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F
+    { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G
+    { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H
+    { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I
+    { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J
+    { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K
+    { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L
+    { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M
+    { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N
+    { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O
+    { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P
+    { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q
+    { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R
+    { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S
+    { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T
+    { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U
+    { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V
+    { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W
+    { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X
+    { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y
+    { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z
+    { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [
+    { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"
+    { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]
+    { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^
+    { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _
+    { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `
+    { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a
+    { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b
+    { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c
+    { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d
+    { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e
+    { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f
+    { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g
+    { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h
+    { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i
+    { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j
+    { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k
+    { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l
+    { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m
+    { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n
+    { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o
+    { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p
+    { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q
+    { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r
+    { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s
+    { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t
+    { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u
+    { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v
+    { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w
+    { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x
+    { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y
+    { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z
+    { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {
+    { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |
+    { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~
+};
+
+//*****************************************************************************
+//
+// The sequence of commands used to initialize the SSD0303 controller.  Each
+// command is described as follows:  there is a byte specifying the number of
+// bytes in the command sequence, followed by that many bytes of command data.
+// Note:  This initialization sequence is derived from OSRAM App Note AN018.
+//
+//*****************************************************************************
+static const unsigned char g_pucOSRAM128x64x4Init[] =
+{
+    //
+    // Column Address
+    //
+    4, 0x15, 0, 63, 0xe3,
+
+    //
+    // Row Address
+    //
+    4, 0x75, 0, 63, 0xe3,
+
+    //
+    // Contrast Control
+    //
+    3, 0x81, 50, 0xe3,
+
+    //
+    // Half Current Range
+    //
+    2, 0x85, 0xe3,
+
+    //
+    // Display Re-map
+    //
+    3, 0xA0, OSRAM_INIT_REMAP, 0xe3,
+
+    //
+    // Display Start Line
+    //
+    3, 0xA1, 0, 0xe3,
+
+    //
+    // Display Offset
+    //
+    3, 0xA2, OSRAM_INIT_OFFSET, 0xe3,
+
+    //
+    // Display Mode Normal
+    //
+    2, 0xA4, 0xe3,
+
+    //
+    // Multiplex Ratio
+    //
+    3, 0xA8, 63, 0xe3,
+
+    //
+    // Phase Length
+    //
+    3, 0xB1, 0x22, 0xe3,
+
+    //
+    // Row Period
+    //
+    3, 0xB2, 70, 0xe3,
+
+    //
+    // Display Clock Divide
+    //
+    3, 0xB3, 0xF1, 0xe3,
+
+    //
+    // VSL
+    //
+    3, 0xBF, 0x0D, 0xe3,
+
+    //
+    // VCOMH
+    //
+    3, 0xBE, 0x02, 0xe3,
+
+    //
+    // VP
+    //
+    3, 0xBC, 0x10, 0xe3,
+
+    //
+    // Gamma
+    //
+    10, 0xB8, 0x01, 0x11, 0x22, 0x32, 0x43, 0x54, 0x65, 0x76, 0xe3,
+
+    //
+    // Set DC-DC
+    3, 0xAD, 0x03, 0xe3,
+
+    //
+    // Display ON/OFF
+    //
+    2, 0xAF, 0xe3,
+};
+
+//*****************************************************************************
+//
+//! \internal
+//!
+//! Write a sequence of command bytes to the SSD0323 controller.
+//!
+//! The data is written in a polled fashion; this function will not return
+//! until the entire byte sequence has been written to the controller.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+OSRAMWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)
+{
+    unsigned long ulTemp;
+
+    //
+    // Return iff SSI port is not enabled for OSRAM.
+    //
+    if(!g_bSSIEnabled)
+    {
+        return;
+    }
+
+    //
+    // Clear the command/control bit to enable command mode.
+    //
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);
+
+    //
+    // Loop while there are more bytes left to be transferred.
+    //
+    while(ulCount != 0)
+    {
+        //
+        // Write the next byte to the controller.
+        //
+        SSIDataPut(SSI0_BASE, *pucBuffer++);
+
+        //
+        // Dummy read to drain the fifo and time the GPIO signal.
+        //
+        SSIDataGet(SSI0_BASE, &ulTemp);
+
+        //
+        // Decrement the BYTE counter.
+        //
+        ulCount--;
+    }
+}
+
+//*****************************************************************************
+//
+//! \internal
+//!
+//! Write a sequence of data bytes to the SSD0323 controller.
+//!
+//! The data is written in a polled fashion; this function will not return
+//! until the entire byte sequence has been written to the controller.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+OSRAMWriteData(const unsigned char *pucBuffer, unsigned long ulCount)
+{
+    unsigned long ulTemp;
+
+    //
+    // Return iff SSI port is not enabled for OSRAM.
+    //
+    if(!g_bSSIEnabled)
+    {
+        return;
+    }
+
+    //
+    // Set the command/control bit to enable data mode.
+    //
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);
+
+    //
+    // Loop while there are more bytes left to be transferred.
+    //
+    while(ulCount != 0)
+    {
+        //
+        // Write the next byte to the controller.
+        //
+        SSIDataPut(SSI0_BASE, *pucBuffer++);
+
+        //
+        // Dummy read to drain the fifo and time the GPIO signal.
+        //
+        SSIDataGet(SSI0_BASE, &ulTemp);
+
+        //
+        // Decrement the BYTE counter.
+        //
+        ulCount--;
+    }
+}
+
+//*****************************************************************************
+//
+//! Clears the OLED display.
+//!
+//! This function will clear the display RAM.  All pixels in the display will
+//! be turned off.
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4Clear(void)
+{
+    static const unsigned char pucCommand1[] = { 0x15, 0, 63 };
+    static const unsigned char pucCommand2[] = { 0x75, 0, 79 };
+    unsigned long ulRow, ulColumn;
+    static unsigned char pucZeroBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0};
+
+    //
+    // Set the window to fill the entire display.
+    //
+    OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));
+    OSRAMWriteCommand(pucCommand2, sizeof(pucCommand2));
+    OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,
+                      sizeof(g_pucOSRAM128x64x4VerticalInc));
+
+    //
+    // In vertical address increment mode, loop through each column, filling
+    // each row with 0.
+    //
+    for(ulColumn = 0; ulColumn < (128/2); ulColumn++)
+    {
+        //
+        // 8 rows (bytes) per row of text.
+        //
+        for(ulRow = 0; ulRow < 80; ulRow += 8)
+        {
+            OSRAMWriteData(pucZeroBuffer, sizeof(pucZeroBuffer));
+        }
+    }
+}
+
+//*****************************************************************************
+//
+//! Displays a string on the OLED display.
+//!
+//! \param pcStr is a pointer to the string to display.
+//! \param ulX is the horizontal position to display the string, specified in
+//! columns from the left edge of the display.
+//! \param ulY is the vertical position to display the string, specified in
+//! rows from the top edge of the display.
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.
+//!
+//! This function will draw a string on the display.  Only the ASCII characters
+//! between 32 (space) and 126 (tilde) are supported; other characters will
+//! result in random data being draw on the display (based on whatever appears
+//! before/after the font in memory).  The font is mono-spaced, so characters
+//! such as "i" and "l" have more white space around them than characters such
+//! as "m" or "w".
+//!
+//! If the drawing of the string reaches the right edge of the display, no more
+//! characters will be drawn.  Therefore, special care is not required to avoid
+//! supplying a string that is "too long" to display.
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4StringDraw(const char *pcStr, unsigned long ulX,
+                        unsigned long ulY, unsigned char ucLevel)
+{
+    static unsigned char pucBuffer[8];
+    unsigned long ulIdx1, ulIdx2;
+    unsigned char ucTemp;
+
+    //
+    // Check the arguments.
+    //
+    ASSERT(ulX < 128);
+    ASSERT((ulX & 1) == 0);
+    ASSERT(ulY < 64);
+    ASSERT(ucLevel < 16);
+
+    //
+    // Setup a window starting at the specified column and row, ending
+    // at the right edge of the display and 8 rows down (single character row).
+    //
+    pucBuffer[0] = 0x15;
+    pucBuffer[1] = ulX / 2;
+    pucBuffer[2] = 63;
+    OSRAMWriteCommand(pucBuffer, 3);
+    pucBuffer[0] = 0x75;
+    pucBuffer[1] = ulY;
+    pucBuffer[2] = ulY + 7;
+    OSRAMWriteCommand(pucBuffer, 3);
+    OSRAMWriteCommand(g_pucOSRAM128x64x4VerticalInc,
+                      sizeof(g_pucOSRAM128x64x4VerticalInc));
+
+    //
+    // Loop while there are more characters in the string.
+    //
+    while(*pcStr != 0)
+    {
+        //
+        // Get a working copy of the current character and convert to an
+        // index into the character bit-map array.
+        //
+        ucTemp = *pcStr;
+        ucTemp &= 0x7F;
+        if(ucTemp < ' ')
+        {
+            ucTemp = ' ';
+        }
+        else
+        {
+            ucTemp -= ' ';
+        }
+
+        //
+        // Build and display the character buffer.
+        //
+        for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)
+        {
+            //
+            // Convert two columns of 1-bit font data into a single data
+            // byte column of 4-bit font data.
+            //
+            for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)
+            {
+                pucBuffer[ulIdx2] = 0;
+                if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))
+                {
+                    pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);
+                }
+                if((ulIdx1 < 2) &&
+                    (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))
+                {
+                    pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);
+                }
+            }
+
+            //
+            // If there is room, dump the single data byte column to the
+            // display.  Otherwise, bail out.
+            //
+            if(ulX < 126)
+            {
+                OSRAMWriteData(pucBuffer, 8);
+                ulX += 2;
+            }
+            else
+            {
+                return;
+            }
+        }
+
+        //
+        // Advance to the next character.
+        //
+        pcStr++;
+    }
+}
+
+//*****************************************************************************
+//
+//! Displays an image on the OLED display.
+//!
+//! \param pucImage is a pointer to the image data.
+//! \param ulX is the horizontal position to display this image, specified in
+//! columns from the left edge of the display.
+//! \param ulY is the vertical position to display this image, specified in
+//! rows from the top of the display.
+//! \param ulWidth is the width of the image, specified in columns.
+//! \param ulHeight is the height of the image, specified in rows.
+//!
+//! This function will display a bitmap graphic on the display.  Because of the
+//! format of the display RAM, the starting column (/e ulX) and the number of
+//! columns (/e ulWidth) must be an integer multiple of two.
+//!
+//! The image data is organized with the first row of image data appearing left
+//! to right, followed immediately by the second row of image data.  Each byte
+//! contains the data for two columns in the current row, with the leftmost
+//! column being contained in bits 7:4 and the rightmost column being contained
+//! in bits 3:0.
+//!
+//! For example, an image six columns wide and seven scan lines tall would
+//! be arranged as follows (showing how the twenty one bytes of the image would
+//! appear on the display):
+//!
+//! \verbatim
+//!     +-------------------+-------------------+-------------------+
+//!     |      Byte 0       |      Byte 1       |      Byte 2       |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 3       |      Byte 4       |      Byte 5       |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 6       |      Byte 7       |      Byte 8       |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 9       |      Byte 10      |      Byte 11      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 12      |      Byte 13      |      Byte 14      |
+//!     +---------+---------+---------+--3------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 15      |      Byte 16      |      Byte 17      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 18      |      Byte 19      |      Byte 20      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//! \endverbatim
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by`
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,
+               unsigned long ulY, unsigned long ulWidth,
+               unsigned long ulHeight)
+{
+    static unsigned char pucBuffer[8];
+
+    //
+    // Check the arguments.
+    //
+    ASSERT(ulX < 128);
+    ASSERT((ulX & 1) == 0);
+    ASSERT(ulY < 64);
+    ASSERT((ulX + ulWidth) <= 128);
+    ASSERT((ulY + ulHeight) <= 64);
+    ASSERT((ulWidth & 1) == 0);
+
+    //
+    // Setup a window starting at the specified column and row, and ending
+    // at the column + width and row+height.
+    //
+    pucBuffer[0] = 0x15;
+    pucBuffer[1] = ulX / 2;
+    pucBuffer[2] = (ulX + ulWidth - 2) / 2;
+    OSRAMWriteCommand(pucBuffer, 3);
+    pucBuffer[0] = 0x75;
+    pucBuffer[1] = ulY;
+    pucBuffer[2] = ulY + ulHeight - 1;
+    OSRAMWriteCommand(pucBuffer, 3);
+    OSRAMWriteCommand(g_pucOSRAM128x64x4HorizontalInc,
+                      sizeof(g_pucOSRAM128x64x4HorizontalInc));
+
+    //
+    // Loop while there are more rows to display.
+    //
+    while(ulHeight--)
+    {
+        //
+        // Write this row of image data.
+        //
+        OSRAMWriteData(pucImage, (ulWidth / 2));
+
+        //
+        // Advance to the next row of the image.
+        //
+        pucImage += (ulWidth / 2);
+    }
+}
+
+//*****************************************************************************
+//
+//! Enable the SSI component of the OLED display driver.
+//!
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.
+//!
+//! This function initializes the SSI interface to the OLED display.
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4Enable(unsigned long ulFrequency)
+{
+    unsigned long ulTemp;
+
+    //
+    // Disable the SSI port.
+    //
+    SSIDisable(SSI0_BASE);
+
+    //
+    // Configure the SSI0 port for master mode.
+    //
+    SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);
+
+    //
+    // (Re)Enable SSI control of the FSS pin.
+    //
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+
+    //
+    // Enable the SSI port.
+    //
+    SSIEnable(SSI0_BASE);
+
+    //
+    // Drain the receive fifo.
+    //
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)
+    {
+    }
+
+    //
+    // Indicate that the OSRAM driver can use the SSI Port.
+    //
+    g_bSSIEnabled = true;
+}
+
+//*****************************************************************************
+//
+//! Enable the SSI component of the OLED display driver.
+//!
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.
+//!
+//! This function initializes the SSI interface to the OLED display.
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4Disable(void)
+{
+    unsigned long ulTemp;
+
+    //
+    // Indicate that the OSRAM driver can no longer use the SSI Port.
+    //
+    g_bSSIEnabled = false;
+
+    //
+    // Drain the receive fifo.
+    //
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)
+    {
+    }
+
+    //
+    // Disable the SSI port.
+    //
+    SSIDisable(SSI0_BASE);
+
+    //
+    // Disable SSI control of the FSS pin.
+    //
+    GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_DIR_MODE_OUT);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);
+
+}
+
+//*****************************************************************************
+//
+//! Initialize the OLED display.
+//!
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.
+//!
+//! This function initializes the SSI interface to the OLED display and
+//! configures the SSD0323 controller on the panel.
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4Init(unsigned long ulFrequency)
+{
+    unsigned long ulIdx;
+
+    //
+    // Enable the SSI0 and GPIO port  blocks as they are needed by this driver.
+    //
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
+
+    //
+    // Configure the SSI0CLK and SSIOTX pins for SSI operation.
+    //
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_5, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+
+    //
+    // Configure the PC7 pin as a D/Cn signal for OLED device.
+    //
+    GPIODirModeSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_DIR_MODE_OUT);
+    GPIOPadConfigSet(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD);
+    GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);
+
+    //
+    // Configure and enable the SSI0 port for master mode.
+    //
+    OSRAM128x64x4Enable(ulFrequency);
+
+    //
+    // Clear the frame buffer.
+    //
+    OSRAM128x64x4Clear();
+
+    //
+    // Initialize the SSD0323 controller.  Loop through the initialization
+    // sequence array, sending each command "string" to the controller.
+    //
+    for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);
+        ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)
+    {
+        //
+        // Send this command.
+        //
+        OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,
+                          g_pucOSRAM128x64x4Init[ulIdx] - 1);
+    }
+}
+
+//*****************************************************************************
+//
+//! Turns on the OLED display.
+//!
+//! This function will turn on the OLED display, causing it to display the
+//! contents of its internal frame buffer.
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4DisplayOn(void)
+{
+    unsigned long ulIdx;
+
+    //
+    // Initialize the SSD0323 controller.  Loop through the initialization
+    // sequence array, sending each command "string" to the controller.
+    //
+    for(ulIdx = 0; ulIdx < sizeof(g_pucOSRAM128x64x4Init);
+        ulIdx += g_pucOSRAM128x64x4Init[ulIdx] + 1)
+    {
+        //
+        // Send this command.
+        //
+        OSRAMWriteCommand(g_pucOSRAM128x64x4Init + ulIdx + 1,
+                          g_pucOSRAM128x64x4Init[ulIdx] - 1);
+    }
+}
+
+//*****************************************************************************
+//
+//! Turns off the OLED display.
+//!
+//! This function will turn off the OLED display.  This will stop the scanning
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to
+//! the panel due to burn-in (it has similar characters to a CRT in this
+//! respect).
+//!
+//! This function is contained in <tt>osram128x64x4.c</tt>, with
+//! <tt>osram128x64x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+OSRAM128x64x4DisplayOff(void)
+{
+    static const unsigned char pucCommand1[] =
+    {
+        0xAE, 0xAD, 0x02
+    };
+
+    //
+    // Turn off the DC-DC converter and the display.
+    //
+    OSRAMWriteCommand(pucCommand1, sizeof(pucCommand1));
+}
+
+//*****************************************************************************
+//
+// Close the Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/osram128x64x4.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/osram128x64x4.h
new file mode 100644
index 000000000..2ba7cb956
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/osram128x64x4.h
@@ -0,0 +1,63 @@
+//*****************************************************************************
+//
+// osram128x64x4.h - Prototypes for the driver for the OSRAM 128x64x4 graphical
+//                   OLED display.
+//
+// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.
+// 
+// Software License Agreement
+// 
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+// 
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+// 
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+// 
+// This is part of revision 1408 of the Stellaris Peripheral Driver Library.
+//
+//*****************************************************************************
+
+#ifndef __OSRAM128X64X4_H__
+#define __OSRAM128X64X4_H__
+
+//*****************************************************************************
+//
+// Prototypes for the driver APIs.
+//
+//*****************************************************************************
+extern void OSRAM128x64x4Clear(void);
+extern void OSRAM128x64x4StringDraw(const char *pcStr,
+                                    unsigned long ulX,
+                                    unsigned long ulY,
+                                    unsigned char ucLevel);
+extern void OSRAM128x64x4ImageDraw(const unsigned char *pucImage,
+                                   unsigned long ulX,
+                                   unsigned long ulY,
+                                   unsigned long ulWidth,
+                                   unsigned long ulHeight);
+extern void OSRAM128x64x4Init(unsigned long ulFrequency);
+extern void OSRAM128x64x4Enable(unsigned long ulFrequency);
+extern void OSRAM128x64x4Disable(void);
+extern void OSRAM128x64x4DisplayOn(void);
+extern void OSRAM128x64x4DisplayOff(void);
+
+//*****************************************************************************
+//
+// The following macro(s) map old names for the OSRAM functions to the new
+// names.  In new code, the new names should be used in favor of the old names.
+//
+//*****************************************************************************
+#ifndef DEPRECATED
+#define OSRAM128x64x1InitSSI    OSRAM128x64x4Enable
+#endif
+
+#endif // __OSRAM128X64X4_H__
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/pack_struct_end.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/pack_struct_end.h
new file mode 100644
index 000000000..621c9fe39
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/pack_struct_end.h
@@ -0,0 +1,2 @@
+/* Note used by this port of uIP, but required for compilation. */
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/pack_struct_start.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/pack_struct_start.h
new file mode 100644
index 000000000..621c9fe39
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/pack_struct_start.h
@@ -0,0 +1,2 @@
+/* Note used by this port of uIP, but required for compilation. */
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/rit128x96x4.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/rit128x96x4.c
new file mode 100644
index 000000000..cff38d557
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/rit128x96x4.c
@@ -0,0 +1,981 @@
+//*****************************************************************************
+//
+// rit128x96x4.c - Driver for the RIT 128x96x4 graphical OLED display.
+//
+// Copyright (c) 2007 Luminary Micro, Inc.  All rights reserved.
+// 
+// Software License Agreement
+// 
+// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
+// exclusively on LMI's microcontroller products.
+// 
+// The software is owned by LMI and/or its suppliers, and is protected under
+// applicable copyright laws.  All rights are reserved.  Any use in violation
+// of the foregoing restrictions may subject the user to criminal sanctions
+// under applicable laws, as well as to civil liability for the breach of the
+// terms and conditions of this license.
+// 
+// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+// 
+// This is part of revision 1504-conf of the Stellaris Peripheral Driver Library.
+//
+//*****************************************************************************
+
+//*****************************************************************************
+//
+//! \addtogroup ek_lm3sLM3S8962_api
+//! @{
+//
+//*****************************************************************************
+
+#include "hw_ssi.h"
+#include "hw_memmap.h"
+#include "hw_sysctl.h"
+#include "hw_types.h"
+#include "debug.h"
+#include "gpio.h"
+#include "ssi.h"
+#include "sysctl.h"
+#include "rit128x96x4.h"
+
+//*****************************************************************************
+//
+// Macros that define the peripheral, port, and pin used for the OLEDDC
+// panel control signal.
+//
+//*****************************************************************************
+
+unsigned long ulGPIOId = 0, ulGPIOBase = 0, ulOLEDDC_PIN = 0, ulOLEDEN_PIN = 0;
+
+#define LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC   SYSCTL_PERIPH_GPIOA
+#define LM3S8962_GPIO_OLEDDC_BASE            GPIO_PORTA_BASE
+#define LM3S8962_GPIO_OLEDDC_PIN             GPIO_PIN_6
+#define LM3S8962_GPIO_OLEDEN_PIN             GPIO_PIN_7
+
+#define LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC   SYSCTL_PERIPH_GPIOH
+#define LM3S1968_GPIO_OLEDDC_BASE            GPIO_PORTH_BASE
+#define LM3S1968_GPIO_OLEDDC_PIN             GPIO_PIN_2
+#define LM3S1968_GPIO_OLEDEN_PIN             GPIO_PIN_3
+
+
+//*****************************************************************************
+//
+// Flag to indicate if SSI port is enabled for display usage.
+//
+//*****************************************************************************
+static volatile tBoolean g_bSSIEnabled = false;
+
+//*****************************************************************************
+//
+// Buffer for storing sequences of command and data for the display.
+//
+//*****************************************************************************
+static unsigned char g_pucBuffer[8];
+
+//*****************************************************************************
+//
+// Define the SSD1329 128x96x4 Remap Setting(s).  This will be used in
+// several places in the code to switch between vertical and horizontal
+// address incrementing.  Note that the controller support 128 rows while
+// the RIT display only uses 96.
+//
+// The Remap Command (0xA0) takes one 8-bit parameter.  The parameter is
+// defined as follows.
+//
+// Bit 7: Reserved
+// Bit 6: Disable(0)/Enable(1) COM Split Odd Even
+//        When enabled, the COM signals are split Odd on one side, even on
+//        the other.  Otherwise, they are split 0-63 on one side, 64-127 on
+//        the other.
+// Bit 5: Reserved
+// Bit 4: Disable(0)/Enable(1) COM Remap
+//        When Enabled, ROW 0-127 map to COM 127-0 (i.e. reverse row order)
+// Bit 3: Reserved
+// Bit 2: Horizontal(0)/Vertical(1) Address Increment
+//        When set, data RAM address will increment along the column rather
+//        than along the row.
+// Bit 1: Disable(0)/Enable(1) Nibble Remap
+//        When enabled, the upper and lower nibbles in the DATA bus for access
+//        to the data RAM are swapped.
+// Bit 0: Disable(0)/Enable(1) Column Address Remap
+//        When enabled, DATA RAM columns 0-63 are remapped to Segment Columns
+//        127-0.
+//
+//*****************************************************************************
+#define RIT_INIT_REMAP      0x52 // app note says 0x51
+#define RIT_INIT_OFFSET     0x00
+static const unsigned char g_pucRIT128x96x4VerticalInc[]   = { 0xA0, 0x56 };
+static const unsigned char g_pucRIT128x96x4HorizontalInc[] = { 0xA0, 0x52 };
+
+//*****************************************************************************
+//
+// A 5x7 font (in a 6x8 cell, where the sixth column is omitted from this
+// table) for displaying text on the OLED display.  The data is organized as
+// bytes from the left column to the right column, with each byte containing
+// the top row in the LSB and the bottom row in the MSB.
+//
+// Note:  This is the same font data that is used in the EK-LM3S811
+// osram96x16x1 driver.  The single bit-per-pixel is expaned in the StringDraw
+// function to the appropriate four bit-per-pixel gray scale format.
+//
+//*****************************************************************************
+static const unsigned char g_pucFont[96][5] =
+{
+    { 0x00, 0x00, 0x00, 0x00, 0x00 }, // " "
+    { 0x00, 0x00, 0x4f, 0x00, 0x00 }, // !
+    { 0x00, 0x07, 0x00, 0x07, 0x00 }, // "
+    { 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // #
+    { 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $
+    { 0x23, 0x13, 0x08, 0x64, 0x62 }, // %
+    { 0x36, 0x49, 0x55, 0x22, 0x50 }, // &
+    { 0x00, 0x05, 0x03, 0x00, 0x00 }, // '
+    { 0x00, 0x1c, 0x22, 0x41, 0x00 }, // (
+    { 0x00, 0x41, 0x22, 0x1c, 0x00 }, // )
+    { 0x14, 0x08, 0x3e, 0x08, 0x14 }, // *
+    { 0x08, 0x08, 0x3e, 0x08, 0x08 }, // +
+    { 0x00, 0x50, 0x30, 0x00, 0x00 }, // ,
+    { 0x08, 0x08, 0x08, 0x08, 0x08 }, // -
+    { 0x00, 0x60, 0x60, 0x00, 0x00 }, // .
+    { 0x20, 0x10, 0x08, 0x04, 0x02 }, // /
+    { 0x3e, 0x51, 0x49, 0x45, 0x3e }, // 0
+    { 0x00, 0x42, 0x7f, 0x40, 0x00 }, // 1
+    { 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2
+    { 0x21, 0x41, 0x45, 0x4b, 0x31 }, // 3
+    { 0x18, 0x14, 0x12, 0x7f, 0x10 }, // 4
+    { 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5
+    { 0x3c, 0x4a, 0x49, 0x49, 0x30 }, // 6
+    { 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7
+    { 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8
+    { 0x06, 0x49, 0x49, 0x29, 0x1e }, // 9
+    { 0x00, 0x36, 0x36, 0x00, 0x00 }, // :
+    { 0x00, 0x56, 0x36, 0x00, 0x00 }, // ;
+    { 0x08, 0x14, 0x22, 0x41, 0x00 }, // <
+    { 0x14, 0x14, 0x14, 0x14, 0x14 }, // =
+    { 0x00, 0x41, 0x22, 0x14, 0x08 }, // >
+    { 0x02, 0x01, 0x51, 0x09, 0x06 }, // ?
+    { 0x32, 0x49, 0x79, 0x41, 0x3e }, // @
+    { 0x7e, 0x11, 0x11, 0x11, 0x7e }, // A
+    { 0x7f, 0x49, 0x49, 0x49, 0x36 }, // B
+    { 0x3e, 0x41, 0x41, 0x41, 0x22 }, // C
+    { 0x7f, 0x41, 0x41, 0x22, 0x1c }, // D
+    { 0x7f, 0x49, 0x49, 0x49, 0x41 }, // E
+    { 0x7f, 0x09, 0x09, 0x09, 0x01 }, // F
+    { 0x3e, 0x41, 0x49, 0x49, 0x7a }, // G
+    { 0x7f, 0x08, 0x08, 0x08, 0x7f }, // H
+    { 0x00, 0x41, 0x7f, 0x41, 0x00 }, // I
+    { 0x20, 0x40, 0x41, 0x3f, 0x01 }, // J
+    { 0x7f, 0x08, 0x14, 0x22, 0x41 }, // K
+    { 0x7f, 0x40, 0x40, 0x40, 0x40 }, // L
+    { 0x7f, 0x02, 0x0c, 0x02, 0x7f }, // M
+    { 0x7f, 0x04, 0x08, 0x10, 0x7f }, // N
+    { 0x3e, 0x41, 0x41, 0x41, 0x3e }, // O
+    { 0x7f, 0x09, 0x09, 0x09, 0x06 }, // P
+    { 0x3e, 0x41, 0x51, 0x21, 0x5e }, // Q
+    { 0x7f, 0x09, 0x19, 0x29, 0x46 }, // R
+    { 0x46, 0x49, 0x49, 0x49, 0x31 }, // S
+    { 0x01, 0x01, 0x7f, 0x01, 0x01 }, // T
+    { 0x3f, 0x40, 0x40, 0x40, 0x3f }, // U
+    { 0x1f, 0x20, 0x40, 0x20, 0x1f }, // V
+    { 0x3f, 0x40, 0x38, 0x40, 0x3f }, // W
+    { 0x63, 0x14, 0x08, 0x14, 0x63 }, // X
+    { 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y
+    { 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z
+    { 0x00, 0x7f, 0x41, 0x41, 0x00 }, // [
+    { 0x02, 0x04, 0x08, 0x10, 0x20 }, // "\"
+    { 0x00, 0x41, 0x41, 0x7f, 0x00 }, // ]
+    { 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^
+    { 0x40, 0x40, 0x40, 0x40, 0x40 }, // _
+    { 0x00, 0x01, 0x02, 0x04, 0x00 }, // `
+    { 0x20, 0x54, 0x54, 0x54, 0x78 }, // a
+    { 0x7f, 0x48, 0x44, 0x44, 0x38 }, // b
+    { 0x38, 0x44, 0x44, 0x44, 0x20 }, // c
+    { 0x38, 0x44, 0x44, 0x48, 0x7f }, // d
+    { 0x38, 0x54, 0x54, 0x54, 0x18 }, // e
+    { 0x08, 0x7e, 0x09, 0x01, 0x02 }, // f
+    { 0x0c, 0x52, 0x52, 0x52, 0x3e }, // g
+    { 0x7f, 0x08, 0x04, 0x04, 0x78 }, // h
+    { 0x00, 0x44, 0x7d, 0x40, 0x00 }, // i
+    { 0x20, 0x40, 0x44, 0x3d, 0x00 }, // j
+    { 0x7f, 0x10, 0x28, 0x44, 0x00 }, // k
+    { 0x00, 0x41, 0x7f, 0x40, 0x00 }, // l
+    { 0x7c, 0x04, 0x18, 0x04, 0x78 }, // m
+    { 0x7c, 0x08, 0x04, 0x04, 0x78 }, // n
+    { 0x38, 0x44, 0x44, 0x44, 0x38 }, // o
+    { 0x7c, 0x14, 0x14, 0x14, 0x08 }, // p
+    { 0x08, 0x14, 0x14, 0x18, 0x7c }, // q
+    { 0x7c, 0x08, 0x04, 0x04, 0x08 }, // r
+    { 0x48, 0x54, 0x54, 0x54, 0x20 }, // s
+    { 0x04, 0x3f, 0x44, 0x40, 0x20 }, // t
+    { 0x3c, 0x40, 0x40, 0x20, 0x7c }, // u
+    { 0x1c, 0x20, 0x40, 0x20, 0x1c }, // v
+    { 0x3c, 0x40, 0x30, 0x40, 0x3c }, // w
+    { 0x44, 0x28, 0x10, 0x28, 0x44 }, // x
+    { 0x0c, 0x50, 0x50, 0x50, 0x3c }, // y
+    { 0x44, 0x64, 0x54, 0x4c, 0x44 }, // z
+    { 0x00, 0x08, 0x36, 0x41, 0x00 }, // {
+    { 0x00, 0x00, 0x7f, 0x00, 0x00 }, // |
+    { 0x00, 0x41, 0x36, 0x08, 0x00 }, // }
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~
+    { 0x02, 0x01, 0x02, 0x04, 0x02 }, // ~
+};
+
+//*****************************************************************************
+//
+// The sequence of commands used to initialize the SSD1329 controller.  Each
+// command is described as follows:  there is a byte specifying the number of
+// bytes in the command sequence, followed by that many bytes of command data.
+// Note:  This initialization sequence is derived from RIT App Note for
+// the P14201.  Values used are from the RIT app note, except where noted.
+//
+//*****************************************************************************
+static const unsigned char g_pucRIT128x96x4Init[] =
+{
+    //
+    // Unlock commands
+    //
+    3, 0xFD, 0x12, 0xe3,
+
+    //
+    // Display off
+    //
+    2, 0xAE, 0xe3,
+
+    //
+    // Icon off
+    //
+    3, 0x94, 0, 0xe3,
+
+    //
+    // Multiplex ratio
+    //
+    3, 0xA8, 95, 0xe3,
+
+    //
+    // Contrast
+    //
+    3, 0x81, 0xb7, 0xe3,
+
+    //
+    // Pre-charge current
+    //
+    3, 0x82, 0x3f, 0xe3,
+
+    //
+    // Display Re-map
+    //
+    3, 0xA0, RIT_INIT_REMAP, 0xe3,
+
+    //
+    // Display Start Line
+    //
+    3, 0xA1, 0, 0xe3,
+
+    //
+    // Display Offset
+    //
+    3, 0xA2, RIT_INIT_OFFSET, 0xe3,
+
+    //
+    // Display Mode Normal
+    //
+    2, 0xA4, 0xe3,
+
+    //
+    // Phase Length
+    //
+    3, 0xB1, 0x11, 0xe3,
+
+    //
+    // Frame frequency
+    //
+    3, 0xB2, 0x23, 0xe3,
+
+    //
+    // Front Clock Divider
+    //
+    3, 0xB3, 0xe2, 0xe3,
+
+    //
+    // Set gray scale table.  App note uses default command:
+    // 2, 0xB7, 0xe3
+    // This gray scale attempts some gamma correction to reduce the
+    // the brightness of the low levels.
+    //
+    17, 0xB8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3,
+
+    //
+    // Second pre-charge period. App note uses value 0x04.
+    //
+    3, 0xBB, 0x01, 0xe3,
+
+    //
+    // Pre-charge voltage
+    //
+    3, 0xBC, 0x3f, 0xe3,
+
+    //
+    // Display ON
+    //
+    2, 0xAF, 0xe3,
+};
+
+//*****************************************************************************
+//
+//! \internal
+//!
+//! Write a sequence of command bytes to the SSD1329 controller.
+//!
+//! The data is written in a polled fashion; this function will not return
+//! until the entire byte sequence has been written to the controller.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+RITWriteCommand(const unsigned char *pucBuffer, unsigned long ulCount)
+{
+    unsigned long ulTemp;
+
+    //
+    // Return if SSI port is not enabled for RIT display.
+    //
+    if(!g_bSSIEnabled)
+    {
+        return;
+    }
+
+    //
+    // Clear the command/control bit to enable command mode.
+    //
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, 0); 
+
+    //
+    // Loop while there are more bytes left to be transferred.
+    //
+    while(ulCount != 0)
+    {
+        //
+        // Write the next byte to the controller.
+        //
+        SSIDataPut(SSI0_BASE, *pucBuffer++);
+
+        //
+        // Dummy read to drain the fifo and time the GPIO signal.
+        //
+        SSIDataGet(SSI0_BASE, &ulTemp);
+
+        //
+        // Decrement the BYTE counter.
+        //
+        ulCount--;
+    }
+}
+
+//*****************************************************************************
+//
+//! \internal
+//!
+//! Write a sequence of data bytes to the SSD1329 controller.
+//!
+//! The data is written in a polled fashion; this function will not return
+//! until the entire byte sequence has been written to the controller.
+//!
+//! \return None.
+//
+//*****************************************************************************
+static void
+RITWriteData(const unsigned char *pucBuffer, unsigned long ulCount)
+{
+    unsigned long ulTemp;
+
+    //
+    // Return if SSI port is not enabled for RIT display.
+    //
+    if(!g_bSSIEnabled)
+    {
+        return;
+    }
+
+    //
+    // Set the command/control bit to enable data mode.
+    //
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN, ulOLEDDC_PIN);
+
+    //
+    // Loop while there are more bytes left to be transferred.
+    //
+    while(ulCount != 0)
+    {
+        //
+        // Write the next byte to the controller.
+        //
+        SSIDataPut(SSI0_BASE, *pucBuffer++);
+
+        //
+        // Dummy read to drain the fifo and time the GPIO signal.
+        //
+        SSIDataGet(SSI0_BASE, &ulTemp);
+
+        //
+        // Decrement the BYTE counter.
+        //
+        ulCount--;
+    }
+}
+
+//*****************************************************************************
+//
+//! Clears the OLED display.
+//!
+//! This function will clear the display RAM.  All pixels in the display will
+//! be turned off.
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4Clear(void)
+{
+    static const unsigned char pucCommand1[] = { 0x15, 0, 63 };
+    static const unsigned char pucCommand2[] = { 0x75, 0, 127 };
+    unsigned long ulRow, ulColumn;
+
+    //
+    // Clear out the buffer used for sending bytes to the display.
+    *(unsigned long *)&g_pucBuffer[0] = 0;
+    *(unsigned long *)&g_pucBuffer[4] = 0;
+
+    //
+    // Set the window to fill the entire display.
+    //
+    RITWriteCommand(pucCommand1, sizeof(pucCommand1));
+    RITWriteCommand(pucCommand2, sizeof(pucCommand2));
+    RITWriteCommand(g_pucRIT128x96x4HorizontalInc,
+                    sizeof(g_pucRIT128x96x4HorizontalInc));
+
+    //
+    // Loop through the rows
+    //
+    for(ulRow = 0; ulRow < 96; ulRow++)
+    {
+        //
+        // Loop through the columns.  Each byte is two pixels,
+        // and the buffer hold 8 bytes, so 16 pixels are cleared
+        // at a time.
+        //
+        for(ulColumn = 0; ulColumn < 128; ulColumn += 8 * 2)
+        {
+            //
+            // Write 8 clearing bytes to the display, which will
+            // clear 16 pixels across.
+            //
+            RITWriteData(g_pucBuffer, sizeof(g_pucBuffer));
+        }
+    }
+}
+
+//*****************************************************************************
+//
+//! Displays a string on the OLED display.
+//!
+//! \param pcStr is a pointer to the string to display.
+//! \param ulX is the horizontal position to display the string, specified in
+//! columns from the left edge of the display.
+//! \param ulY is the vertical position to display the string, specified in
+//! rows from the top edge of the display.
+//! \param ucLevel is the 4-bit grey scale value to be used for displayed text.
+//!
+//! This function will draw a string on the display.  Only the ASCII characters
+//! between 32 (space) and 126 (tilde) are supported; other characters will
+//! result in random data being draw on the display (based on whatever appears
+//! before/after the font in memory).  The font is mono-spaced, so characters
+//! such as "i" and "l" have more white space around them than characters such
+//! as "m" or "w".
+//!
+//! If the drawing of the string reaches the right edge of the display, no more
+//! characters will be drawn.  Therefore, special care is not required to avoid
+//! supplying a string that is "too long" to display.
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \note Because the OLED display packs 2 pixels of data in a single byte, the
+//! parameter \e ulX must be an even column number (e.g. 0, 2, 4, etc).
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4StringDraw(const char *pcStr, unsigned long ulX,
+                      unsigned long ulY, unsigned char ucLevel)
+{
+    unsigned long ulIdx1, ulIdx2;
+    unsigned char ucTemp;
+
+    //
+    // Check the arguments.
+    //
+    ASSERT(ulX < 128);
+    ASSERT((ulX & 1) == 0);
+    ASSERT(ulY < 96);
+    ASSERT(ucLevel < 16);
+
+    //
+    // Setup a window starting at the specified column and row, ending
+    // at the right edge of the display and 8 rows down (single character row).
+    //
+    g_pucBuffer[0] = 0x15;
+    g_pucBuffer[1] = ulX / 2;
+    g_pucBuffer[2] = 63;
+    RITWriteCommand(g_pucBuffer, 3);
+    g_pucBuffer[0] = 0x75;
+    g_pucBuffer[1] = ulY;
+    g_pucBuffer[2] = ulY + 7;
+    RITWriteCommand(g_pucBuffer, 3);
+    RITWriteCommand(g_pucRIT128x96x4VerticalInc,
+                    sizeof(g_pucRIT128x96x4VerticalInc));
+
+    //
+    // Loop while there are more characters in the string.
+    //
+    while(*pcStr != 0)
+    {
+        //
+        // Get a working copy of the current character and convert to an
+        // index into the character bit-map array.
+        //
+        ucTemp = *pcStr;
+        ucTemp &= 0x7F;
+        if(ucTemp < ' ')
+        {
+            ucTemp = ' ';
+        }
+        else
+        {
+            ucTemp -= ' ';
+        }
+
+        //
+        // Build and display the character buffer.
+        //
+        for(ulIdx1 = 0; ulIdx1 < 3; ulIdx1++)
+        {
+            //
+            // Convert two columns of 1-bit font data into a single data
+            // byte column of 4-bit font data.
+            //
+            for(ulIdx2 = 0; ulIdx2 < 8; ulIdx2++)
+            {
+                g_pucBuffer[ulIdx2] = 0;
+                if(g_pucFont[ucTemp][ulIdx1*2] & (1 << ulIdx2))
+                {
+                    g_pucBuffer[ulIdx2] = ((ucLevel << 4) & 0xf0);
+                }
+                if((ulIdx1 < 2) &&
+                    (g_pucFont[ucTemp][ulIdx1*2+1] & (1 << ulIdx2)))
+                {
+                    g_pucBuffer[ulIdx2] |= ((ucLevel << 0) & 0x0f);
+                }
+            }
+
+            //
+            // If there is room, dump the single data byte column to the
+            // display.  Otherwise, bail out.
+            //
+            if(ulX < 126)
+            {
+                RITWriteData(g_pucBuffer, 8);
+                ulX += 2;
+            }
+            else
+            {
+                return;
+            }
+        }
+
+        //
+        // Advance to the next character.
+        //
+        pcStr++;
+    }
+}
+
+//*****************************************************************************
+//
+//! Displays an image on the OLED display.
+//!
+//! \param pucImage is a pointer to the image data.
+//! \param ulX is the horizontal position to display this image, specified in
+//! columns from the left edge of the display.
+//! \param ulY is the vertical position to display this image, specified in
+//! rows from the top of the display.
+//! \param ulWidth is the width of the image, specified in columns.
+//! \param ulHeight is the height of the image, specified in rows.
+//!
+//! This function will display a bitmap graphic on the display.  Because of the
+//! format of the display RAM, the starting column (\e ulX) and the number of
+//! columns (\e ulWidth) must be an integer multiple of two.
+//!
+//! The image data is organized with the first row of image data appearing left
+//! to right, followed immediately by the second row of image data.  Each byte
+//! contains the data for two columns in the current row, with the leftmost
+//! column being contained in bits 7:4 and the rightmost column being contained
+//! in bits 3:0.
+//!
+//! For example, an image six columns wide and seven scan lines tall would
+//! be arranged as follows (showing how the twenty one bytes of the image would
+//! appear on the display):
+//!
+//! \verbatim
+//!     +-------------------+-------------------+-------------------+
+//!     |      Byte 0       |      Byte 1       |      Byte 2       |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 3       |      Byte 4       |      Byte 5       |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 6       |      Byte 7       |      Byte 8       |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 9       |      Byte 10      |      Byte 11      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 12      |      Byte 13      |      Byte 14      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 15      |      Byte 16      |      Byte 17      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     |      Byte 18      |      Byte 19      |      Byte 20      |
+//!     +---------+---------+---------+---------+---------+---------+
+//!     | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 | 7 6 5 4 | 3 2 1 0 |
+//!     +---------+---------+---------+---------+---------+---------+
+//! \endverbatim
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4ImageDraw(const unsigned char *pucImage, unsigned long ulX,
+                     unsigned long ulY, unsigned long ulWidth,
+                     unsigned long ulHeight)
+{
+    //
+    // Check the arguments.
+    //
+    ASSERT(ulX < 128);
+    ASSERT((ulX & 1) == 0);
+    ASSERT(ulY < 96);
+    ASSERT((ulX + ulWidth) <= 128);
+    ASSERT((ulY + ulHeight) <= 96);
+    ASSERT((ulWidth & 1) == 0);
+
+    //
+    // Setup a window starting at the specified column and row, and ending
+    // at the column + width and row+height.
+    //
+    g_pucBuffer[0] = 0x15;
+    g_pucBuffer[1] = ulX / 2;
+    g_pucBuffer[2] = (ulX + ulWidth - 2) / 2;
+    RITWriteCommand(g_pucBuffer, 3);
+    g_pucBuffer[0] = 0x75;
+    g_pucBuffer[1] = ulY;
+    g_pucBuffer[2] = ulY + ulHeight - 1;
+    RITWriteCommand(g_pucBuffer, 3);
+    RITWriteCommand(g_pucRIT128x96x4HorizontalInc,
+                    sizeof(g_pucRIT128x96x4HorizontalInc));
+
+    //
+    // Loop while there are more rows to display.
+    //
+    while(ulHeight--)
+    {
+        //
+        // Write this row of image data.
+        //
+        RITWriteData(pucImage, (ulWidth / 2));
+
+        //
+        // Advance to the next row of the image.
+        //
+        pucImage += (ulWidth / 2);
+    }
+}
+
+//*****************************************************************************
+//
+//! Enable the SSI component of the OLED display driver.
+//!
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.
+//!
+//! This function initializes the SSI interface to the OLED display.
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4Enable(unsigned long ulFrequency)
+{
+    unsigned long ulTemp;
+
+    //
+    // Disable the SSI port.
+    //
+    SSIDisable(SSI0_BASE);
+
+    //
+    // Configure the SSI0 port for master mode.
+    //
+    SSIConfig(SSI0_BASE, SSI_FRF_MOTO_MODE_2, SSI_MODE_MASTER, ulFrequency, 8);
+
+    //
+    // (Re)Enable SSI control of the FSS pin.
+    //
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+
+    //
+    // Enable the SSI port.
+    //
+    SSIEnable(SSI0_BASE);
+
+    //
+    // Drain the receive fifo.
+    //
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)
+    {
+    }
+
+    //
+    // Indicate that the RIT driver can use the SSI Port.
+    //
+    g_bSSIEnabled = true;
+}
+
+//*****************************************************************************
+//
+//! Enable the SSI component of the OLED display driver.
+//!
+//! This function initializes the SSI interface to the OLED display.
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4Disable(void)
+{
+    unsigned long ulTemp;
+
+    //
+    // Indicate that the RIT driver can no longer use the SSI Port.
+    //
+    g_bSSIEnabled = false;
+
+    //
+    // Drain the receive fifo.
+    //
+    while(SSIDataNonBlockingGet(SSI0_BASE, &ulTemp) != 0)
+    {
+    }
+
+    //
+    // Disable the SSI port.
+    //
+    SSIDisable(SSI0_BASE);
+
+    //
+    // Disable SSI control of the FSS pin.
+    //
+    GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
+                     GPIO_PIN_TYPE_STD_WPU);
+    GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);
+}
+
+//*****************************************************************************
+//
+//! Initialize the OLED display.
+//!
+//! \param ulFrequency specifies the SSI Clock Frequency to be used.
+//!
+//! This function initializes the SSI interface to the OLED display and
+//! configures the SSD1329 controller on the panel.
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4Init(unsigned long ulFrequency)
+{
+    unsigned long ulIdx;
+
+
+	/* Determine which board is being used. */
+	if( SysCtlPeripheralPresent( SYSCTL_PERIPH_ETH ) )
+	{
+		/* Ethernet is present, we must be using the LM3S8962 EK. */
+		ulGPIOId = LM3S8962_SYSCTL_PERIPH_GPIO_OLEDDC;
+		ulGPIOBase = LM3S8962_GPIO_OLEDDC_BASE;
+		ulOLEDDC_PIN = GPIO_PIN_6;
+		ulOLEDEN_PIN = GPIO_PIN_7;
+	}
+	else
+	{
+		/* Ethernet is not present, we must be using the LM3S1968 EK. */
+		ulGPIOId = LM3S1968_SYSCTL_PERIPH_GPIO_OLEDDC;
+		ulGPIOBase = LM3S1968_GPIO_OLEDDC_BASE;
+		ulOLEDDC_PIN = GPIO_PIN_2;
+		ulOLEDEN_PIN = GPIO_PIN_3;
+	}
+
+    //
+    // Enable the SSI0 and GPIO port blocks as they are needed by this driver.
+    //
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
+    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
+    SysCtlPeripheralEnable(ulGPIOId); 
+
+    //
+    // Configure the SSI0CLK and SSIOTX pins for SSI operation.
+    //
+    GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5);
+    GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_5,
+                     GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPU);
+
+    //
+    // Configure the GPIO port pin used as a D/Cn signal for OLED device,
+    // and the port pin used to enable power to the OLED panel.
+    //
+    GPIOPinTypeGPIOOutput(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN);
+    GPIOPadConfigSet(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,
+                     GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
+    GPIOPinWrite(ulGPIOBase, ulOLEDDC_PIN | ulOLEDEN_PIN,
+                 ulOLEDDC_PIN | ulOLEDEN_PIN);
+
+    //
+    // Configure and enable the SSI0 port for master mode.
+    //
+    RIT128x96x4Enable(ulFrequency);
+
+    //
+    // Clear the frame buffer.
+    //
+    RIT128x96x4Clear();
+
+    //
+    // Initialize the SSD1329 controller.  Loop through the initialization
+    // sequence array, sending each command "string" to the controller.
+    //
+    for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);
+        ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)
+    {
+        //
+        // Send this command.
+        //
+        RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,
+                        g_pucRIT128x96x4Init[ulIdx] - 1);
+    }
+}
+
+//*****************************************************************************
+//
+//! Turns on the OLED display.
+//!
+//! This function will turn on the OLED display, causing it to display the
+//! contents of its internal frame buffer.
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4DisplayOn(void)
+{
+    unsigned long ulIdx;
+
+    //
+    // Initialize the SSD1329 controller.  Loop through the initialization
+    // sequence array, sending each command "string" to the controller.
+    //
+    for(ulIdx = 0; ulIdx < sizeof(g_pucRIT128x96x4Init);
+        ulIdx += g_pucRIT128x96x4Init[ulIdx] + 1)
+    {
+        //
+        // Send this command.
+        //
+        RITWriteCommand(g_pucRIT128x96x4Init + ulIdx + 1,
+                        g_pucRIT128x96x4Init[ulIdx] - 1);
+    }
+}
+
+//*****************************************************************************
+//
+//! Turns off the OLED display.
+//!
+//! This function will turn off the OLED display.  This will stop the scanning
+//! of the panel and turn off the on-chip DC-DC converter, preventing damage to
+//! the panel due to burn-in (it has similar characters to a CRT in this
+//! respect).
+//!
+//! This function is contained in <tt>rit128x96x4.c</tt>, with
+//! <tt>rit128x96x4.h</tt> containing the API definition for use by
+//! applications.
+//!
+//! \return None.
+//
+//*****************************************************************************
+void
+RIT128x96x4DisplayOff(void)
+{
+    static const unsigned char pucCommand1[] =
+    {
+        0xAE, 0xe3
+    };
+
+    //
+    // Put the display to sleep.
+    //
+    RITWriteCommand(pucCommand1, sizeof(pucCommand1));
+}
+
+//*****************************************************************************
+//
+// Close the Doxygen group.
+//! @}
+//
+//*****************************************************************************
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/thumb_crt0.s b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/thumb_crt0.s
new file mode 100644
index 000000000..4c4b71dc1
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/thumb_crt0.s
@@ -0,0 +1,227 @@
+/*****************************************************************************
+ * Copyright (c) 2009 Rowley Associates Limited.                             *
+ *                                                                           *
+ * This file may be distributed under the terms of the License Agreement     *
+ * provided with this software.                                              *
+ *                                                                           *
+ * THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE   *
+ * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
+ *****************************************************************************/
+
+/*****************************************************************************
+ *                           Preprocessor Definitions
+ *                           ------------------------
+ * APP_ENTRY_POINT
+ *
+ *   Defines the application entry point function, if undefined this setting
+ *   defaults to "main".
+ *
+ * USE_PROCESS_STACK
+ *
+ *   If defined, thread mode will be configured to use the process stack if
+ *   the size of the process stack is greater than zero bytes in length.
+ *
+ * INITIALIZE_STACK
+ *
+ *   If defined, the contents of the stack will be initialized to a the
+ *   value 0xCC.
+ *
+ * FULL_LIBRARY
+ *
+ *  If defined then
+ *    - argc, argv are setup by the debug_getargs.
+ *    - the exit symbol is defined and executes on return from main.
+ *    - the exit symbol calls destructors, atexit functions and then debug_exit.
+ *
+ *  If not defined then
+ *    - argc and argv are zero.
+ *    - no exit symbol, code loops on return from main.
+ *****************************************************************************/
+
+#ifndef APP_ENTRY_POINT
+#define APP_ENTRY_POINT main
+#endif
+
+#ifndef ARGSSPACE
+#define ARGSSPACE 128
+#endif
+
+  .global _start
+  .syntax unified
+  .extern APP_ENTRY_POINT
+#ifdef FULL_LIBRARY
+  .global exit
+#endif
+
+  .section .init, "ax"
+  .code 16
+  .align 2
+  .thumb_func
+
+_start:
+#ifdef __RAM_BUILD
+  ldr r1, =__stack_end__
+  mov sp, r1
+#endif
+#ifdef INITIALIZE_STACK
+  mov r2, #0xCC
+  ldr r0, =__stack_start__
+#ifndef __RAM_BUILD
+  mov r1, sp
+#endif
+  bl memory_set
+#endif
+
+#ifdef USE_PROCESS_STACK
+  /* Set up process stack if size > 0 */
+  ldr r1, =__stack_process_end__
+  ldr r0, =__stack_process_start__
+  subs r2, r1, r0
+  beq 1f
+  msr psp, r1
+  mov r2, #2
+  msr control, r2
+#ifdef INITIALIZE_STACK
+  mov r2, #0xCC
+  bl memory_set
+#endif
+1:
+#endif
+  /* Copy initialised memory sections into RAM (if necessary). */
+  ldr r0, =__data_load_start__
+  ldr r1, =__data_start__
+  ldr r2, =__data_end__
+  bl memory_copy
+  ldr r0, =__text_load_start__
+  ldr r1, =__text_start__
+  ldr r2, =__text_end__
+  bl memory_copy
+  ldr r0, =__fast_load_start__
+  ldr r1, =__fast_start__
+  ldr r2, =__fast_end__
+  bl memory_copy
+  ldr r0, =__ctors_load_start__
+  ldr r1, =__ctors_start__
+  ldr r2, =__ctors_end__
+  bl memory_copy
+  ldr r0, =__dtors_load_start__
+  ldr r1, =__dtors_start__
+  ldr r2, =__dtors_end__
+  bl memory_copy
+  ldr r0, =__rodata_load_start__
+  ldr r1, =__rodata_start__
+  ldr r2, =__rodata_end__
+  bl memory_copy
+
+  /* Zero the bss. */
+  ldr r0, =__bss_start__
+  ldr r1, =__bss_end__
+  mov r2, #0
+  bl memory_set
+
+  /* Initialise the heap */
+  ldr r0, = __heap_start__
+  ldr r1, = __heap_end__
+  sub r1, r1, r0
+  mov r2, #0
+  str r2, [r0]
+  add r0, r0, #4
+  str r1, [r0]
+
+  /* Call constructors */
+  ldr r0, =__ctors_start__
+  ldr r1, =__ctors_end__
+ctor_loop:
+  cmp r0, r1
+  beq ctor_end
+  ldr r2, [r0]
+  add r0, #4
+  push {r0-r1}
+  blx r2
+  pop {r0-r1}
+  b ctor_loop
+ctor_end:
+
+  /* Setup initial call frame */
+  mov r0, #0
+  mov lr, r0
+  mov r12, sp
+
+start:
+  /* Jump to application entry point */
+#ifdef FULL_LIBRARY
+  mov r0, #ARGSSPACE
+  ldr r1, =args
+  ldr r2, =debug_getargs
+  blx r2
+  ldr r1, =args
+#else
+  mov r0, #0
+  mov r1, #0
+#endif
+  ldr r2, =APP_ENTRY_POINT
+  blx r2
+
+#ifdef FULL_LIBRARY
+  .thumb_func
+exit:
+  mov r5, r0 // save the exit parameter/return result
+
+  /* Call destructors */
+  ldr r0, =__dtors_start__
+  ldr r1, =__dtors_end__
+dtor_loop:
+  cmp r0, r1
+  beq dtor_end
+  ldr r2, [r0]
+  add r0, #4
+  push {r0-r1}
+  blx r2
+  pop {r0-r1}
+  b dtor_loop
+dtor_end:
+
+  /* Call atexit functions */
+  ldr r2, =_execute_at_exit_fns
+  blx r2
+
+  /* Call debug_exit with return result/exit parameter */
+  mov r0, r5
+  ldr r2, =debug_exit
+  blx r2
+#endif
+
+  /* Returned from application entry point, loop forever. */
+exit_loop:
+  b exit_loop
+
+memory_copy:
+  cmp r0, r1
+  beq 2f
+  subs r2, r2, r1
+  beq 2f
+1:
+  ldrb r3, [r0]
+  add r0, r0, #1
+  strb r3, [r1]
+  add r1, r1, #1
+  subs r2, r2, #1
+  bne 1b
+2:
+  bx lr
+
+memory_set:
+  cmp r0, r1
+  beq 1f
+  strb r2, [r0]
+  add r0, r0, #1
+  b memory_set
+1:
+  bx lr
+
+#ifdef FULL_LIBRARY
+  .bss
+args:
+  .space ARGSSPACE
+#endif
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/timertest.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/timertest.c
new file mode 100644
index 000000000..941a06fd7
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/timertest.c
@@ -0,0 +1,158 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under 
+	the terms of the GNU General Public License (version 2) as published by the 
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the 
+	source code for proprietary components outside of the FreeRTOS kernel.  
+	Alternative commercial license and support terms are also available upon 
+	request.  See the licensing section of http://www.FreeRTOS.org for full 
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+/* High speed timer test as described in main.c. */
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+
+/* Library includes. */
+#include "hw_ints.h"
+#include "hw_memmap.h"
+#include "hw_types.h"
+#include "interrupt.h"
+#include "sysctl.h"
+#include "lmi_timer.h"
+
+/* The set frequency of the interrupt.  Deviations from this are measured as
+the jitter. */
+#define timerINTERRUPT_FREQUENCY		( 20000UL )
+
+/* The expected time between each of the timer interrupts - if the jitter was
+zero. */
+#define timerEXPECTED_DIFFERENCE_VALUE	( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )
+
+/* The highest available interrupt priority. */
+#define timerHIGHEST_PRIORITY			( 0 )
+
+/* Misc defines. */
+#define timerMAX_32BIT_VALUE			( 0xffffffffUL )
+#define timerTIMER_1_COUNT_VALUE		( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )
+
+/*-----------------------------------------------------------*/
+
+/* Interrupt handler in which the jitter is measured. */
+void Timer0IntHandler( void );
+
+/* Stores the value of the maximum recorded jitter between interrupts. */
+volatile unsigned portLONG ulMaxJitter = 0UL;
+
+/* Counts the total number of times that the high frequency timer has 'ticked'.
+This value is used by the run time stats function to work out what percentage
+of CPU time each task is taking. */
+volatile unsigned portLONG ulHighFrequencyTimerTicks = 0UL;
+/*-----------------------------------------------------------*/
+
+void vSetupHighFrequencyTimer( void )
+{
+unsigned long ulFrequency;
+
+	/* Timer zero is used to generate the interrupts, and timer 1 is used
+	to measure the jitter. */
+	SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER0 );
+    SysCtlPeripheralEnable( SYSCTL_PERIPH_TIMER1 );
+    TimerConfigure( TIMER0_BASE, TIMER_CFG_32_BIT_PER );
+    TimerConfigure( TIMER1_BASE, TIMER_CFG_32_BIT_PER );
+
+	/* Set the timer interrupt to be above the kernel - highest. */
+	IntPrioritySet( INT_TIMER0A, timerHIGHEST_PRIORITY );
+
+	/* Just used to measure time. */
+    TimerLoadSet(TIMER1_BASE, TIMER_A, timerMAX_32BIT_VALUE );
+
+	/* Ensure interrupts do not start until the scheduler is running. */
+	portDISABLE_INTERRUPTS();
+
+	/* The rate at which the timer will interrupt. */
+	ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;
+    TimerLoadSet( TIMER0_BASE, TIMER_A, ulFrequency );
+    IntEnable( INT_TIMER0A );
+    TimerIntEnable( TIMER0_BASE, TIMER_TIMA_TIMEOUT );
+
+	/* Enable both timers. */
+    TimerEnable( TIMER0_BASE, TIMER_A );
+    TimerEnable( TIMER1_BASE, TIMER_A );
+}
+/*-----------------------------------------------------------*/
+
+void Timer0IntHandler( void )
+{
+unsigned portLONG ulDifference;
+volatile unsigned portLONG ulCurrentCount;
+static unsigned portLONG ulMaxDifference = 0, ulLastCount = 0;
+
+	/* We use the timer 1 counter value to measure the clock cycles between
+	the timer 0 interrupts. */
+	ulCurrentCount = timerTIMER_1_COUNT_VALUE;
+
+	TimerIntClear( TIMER0_BASE, TIMER_TIMA_TIMEOUT );
+
+	if( ulCurrentCount < ulLastCount )
+	{
+		/* How many times has timer 1 counted since the last interrupt? */
+		ulDifference = 	ulLastCount - ulCurrentCount;
+
+		/* Is this the largest difference we have measured yet? */
+		if( ulDifference > ulMaxDifference )
+		{
+			ulMaxDifference = ulDifference;
+			ulMaxJitter = ulMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;
+		}
+	}
+
+	ulLastCount = ulCurrentCount;
+
+	/* Keep a count of the total number of 20KHz ticks.  This is used by the
+	run time stats functionality to calculate how much CPU time is used by
+	each task. */
+	ulHighFrequencyTimerTicks++;
+}
+
+
+
+
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/Makefile.webserver b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/Makefile.webserver
new file mode 100644
index 000000000..f38c47a72
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/Makefile.webserver
@@ -0,0 +1 @@
+APP_SOURCES += httpd.c http-strings.c httpd-fs.c httpd-cgi.c
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/clock-arch.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/clock-arch.h
new file mode 100644
index 000000000..cde657b62
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/clock-arch.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: clock-arch.h,v 1.2 2006/06/12 08:00:31 adam Exp $
+ */
+
+#ifndef __CLOCK_ARCH_H__
+#define __CLOCK_ARCH_H__
+
+#include "FreeRTOS.h"
+
+typedef unsigned long clock_time_t;
+#define CLOCK_CONF_SECOND configTICK_RATE_HZ
+
+#endif /* __CLOCK_ARCH_H__ */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/emac.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/emac.c
new file mode 100644
index 000000000..33b9e688d
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/emac.c
@@ -0,0 +1,295 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under
+	the terms of the GNU General Public License (version 2) as published by the
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the
+	source code for proprietary components outside of the FreeRTOS kernel.
+	Alternative commercial license and support terms are also available upon
+	request.  See the licensing section of http://www.FreeRTOS.org for full
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+
+/* Kernel includes. */
+#include "FreeRTOS.h"
+#include "semphr.h"
+#include "task.h"
+
+/* Demo includes. */
+#include "emac.h"
+
+/* uIP includes. */
+#include "uip.h"
+
+/* Hardware library includes. */
+#include "hw_types.h"
+#include "hw_memmap.h"
+#include "hw_ints.h"
+#include "hw_ethernet.h"
+#include "ethernet.h"
+#include "interrupt.h"
+
+#define emacNUM_RX_BUFFERS		5
+#define emacFRAM_SIZE_BYTES 	2
+#define macNEGOTIATE_DELAY 		2000
+#define macWAIT_SEND_TIME		( 10 )
+
+/* The task that handles the MAC peripheral.  This is created at a high
+priority and is effectively a deferred interrupt handler.  The peripheral
+handling is deferred to a task to prevent the entire FIFO having to be read
+from within an ISR. */
+void vMACHandleTask( void *pvParameters );
+
+/*-----------------------------------------------------------*/
+
+/* The semaphore used to wake the uIP task when data arrives. */
+xSemaphoreHandle xEMACSemaphore = NULL;
+
+/* The semaphore used to wake the interrupt handler task.  The peripheral
+is processed at the task level to prevent the need to read the entire FIFO from
+within the ISR itself. */
+xSemaphoreHandle xMACInterruptSemaphore = NULL;
+
+/* The buffer used by the uIP stack.  In this case the pointer is used to
+point to one of the Rx buffers. */
+unsigned portCHAR *uip_buf;
+
+/* Buffers into which Rx data is placed. */
+static unsigned portCHAR ucRxBuffers[ emacNUM_RX_BUFFERS ][ UIP_BUFSIZE + ( 4 * emacFRAM_SIZE_BYTES ) ] __attribute__((aligned(4)));
+
+/* The length of the data within each of the Rx buffers. */
+static unsigned portLONG ulRxLength[ emacNUM_RX_BUFFERS ];
+
+/* Used to keep a track of the number of bytes to transmit. */
+static unsigned portLONG ulNextTxSpace;
+
+/*-----------------------------------------------------------*/
+
+portBASE_TYPE vInitEMAC( void )
+{
+unsigned long ulTemp;
+portBASE_TYPE xReturn;
+
+	/* Ensure all interrupts are disabled. */
+	EthernetIntDisable( ETH_BASE, ( ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER | ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER | ETH_INT_RX));
+
+	/* Clear any interrupts that were already pending. */
+    ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
+    EthernetIntClear( ETH_BASE, ulTemp );
+
+	/* Initialise the MAC and connect. */
+    EthernetInit( ETH_BASE );
+    EthernetConfigSet( ETH_BASE, ( ETH_CFG_TX_DPLXEN | ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN ) );
+    EthernetEnable( ETH_BASE );
+
+	/* Mark each Rx buffer as empty. */
+	for( ulTemp = 0; ulTemp < emacNUM_RX_BUFFERS; ulTemp++ )
+	{
+		ulRxLength[ ulTemp ] = 0;
+	}
+
+	/* Create the queue and task used to defer the MAC processing to the
+	task level. */
+	vSemaphoreCreateBinary( xMACInterruptSemaphore );
+	xSemaphoreTake( xMACInterruptSemaphore, 0 );
+	xReturn = xTaskCreate( vMACHandleTask, ( signed portCHAR * ) "MAC", configMINIMAL_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL );
+	vTaskDelay( macNEGOTIATE_DELAY );
+
+	/* We are only interested in Rx interrupts. */
+	IntPrioritySet( INT_ETH, configKERNEL_INTERRUPT_PRIORITY );
+    IntEnable( INT_ETH );
+    EthernetIntEnable(ETH_BASE, ETH_INT_RX);
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer )
+{
+static unsigned long ulNextRxBuffer = 0;
+unsigned int iLen;
+
+	iLen = ulRxLength[ ulNextRxBuffer ];
+
+	if( iLen != 0 )
+	{
+		/* Leave room for the size at the start of the buffer. */
+		uip_buf = &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
+
+		ulRxLength[ ulNextRxBuffer ] = 0;
+
+		ulNextRxBuffer++;
+		if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
+		{
+			ulNextRxBuffer = 0;
+		}
+	}
+
+    return iLen;
+}
+/*-----------------------------------------------------------*/
+
+void vInitialiseSend( void )
+{
+	/* Set the index to the first byte to send - skipping over the size
+	bytes. */
+	ulNextTxSpace = 2;
+}
+/*-----------------------------------------------------------*/
+
+void vIncrementTxLength( unsigned portLONG ulLength )
+{
+	ulNextTxSpace += ulLength;
+}
+/*-----------------------------------------------------------*/
+
+void vSendBufferToMAC( void )
+{
+unsigned long *pulSource;
+unsigned portSHORT * pus;
+unsigned portLONG ulNextWord;
+
+	/* Locate the data to be send. */
+	pus = ( unsigned portSHORT * ) uip_buf;
+
+	/* Add in the size of the data. */
+	pus--;
+	*pus = ulNextTxSpace;
+
+	/* Wait for data to be sent if there is no space immediately. */
+    while( !EthernetSpaceAvail( ETH_BASE ) )
+    {
+		vTaskDelay( macWAIT_SEND_TIME );
+    }
+
+	pulSource = ( unsigned portLONG * ) pus;
+
+	for( ulNextWord = 0; ulNextWord < ulNextTxSpace; ulNextWord += sizeof( unsigned portLONG ) )
+	{
+       	HWREG(ETH_BASE + MAC_O_DATA) = *pulSource;
+		pulSource++;
+	}
+
+	/* Go. */
+    HWREG( ETH_BASE + MAC_O_TR ) = MAC_TR_NEWTX;
+}
+/*-----------------------------------------------------------*/
+
+void vEMAC_ISR( void )
+{
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
+unsigned portLONG ulTemp;
+
+	/* Clear the interrupt. */
+	ulTemp = EthernetIntStatus( ETH_BASE, pdFALSE );
+	EthernetIntClear( ETH_BASE, ulTemp );
+
+	/* Was it an Rx interrupt? */
+	if( ulTemp & ETH_INT_RX )
+	{
+		xSemaphoreGiveFromISR( xMACInterruptSemaphore, &xHigherPriorityTaskWoken );
+		EthernetIntDisable( ETH_BASE, ETH_INT_RX );
+	}
+
+    /* Switch to the uIP task. */
+	portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
+}
+/*-----------------------------------------------------------*/
+
+void vMACHandleTask( void *pvParameters )
+{
+unsigned long ulLen = 0, i;
+unsigned portLONG ulLength, ulInt;
+unsigned long *pulBuffer;
+static unsigned portLONG ulNextRxBuffer = 0;
+portBASE_TYPE xSwitchRequired = pdFALSE;
+
+	for( ;; )
+	{
+		/* Wait for something to do. */
+		xSemaphoreTake( xMACInterruptSemaphore, portMAX_DELAY );
+
+		while( ( ulInt = ( EthernetIntStatus( ETH_BASE, pdFALSE ) & ETH_INT_RX ) ) != 0 )
+		{
+			ulLength = HWREG( ETH_BASE + MAC_O_DATA );
+
+			/* Leave room at the start of the buffer for the size. */
+			pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 2 ] );
+			*pulBuffer = ( ulLength >> 16 );
+
+			/* Get the size of the data. */
+			pulBuffer = ( unsigned long * ) &( ucRxBuffers[ ulNextRxBuffer ][ 4 ] );
+			ulLength &= 0xFFFF;
+
+			if( ulLength > 4 )
+			{
+				ulLength -= 4;
+
+				if( ulLength >= UIP_BUFSIZE )
+				{
+					/* The data won't fit in our buffer.  Ensure we don't
+					try to write into the buffer. */
+					ulLength = 0;
+				}
+
+				/* Read out the data into our buffer. */
+				for( i = 0; i < ulLength; i += sizeof( unsigned portLONG ) )
+				{
+					*pulBuffer = HWREG( ETH_BASE + MAC_O_DATA );
+					pulBuffer++;
+				}
+
+				/* Store the length of the data into the separate array. */
+				ulRxLength[ ulNextRxBuffer ] = ulLength;
+
+				/* Use the next buffer the next time through. */
+				ulNextRxBuffer++;
+				if( ulNextRxBuffer >= emacNUM_RX_BUFFERS )
+				{
+					ulNextRxBuffer = 0;
+				}
+
+				/* Ensure the uIP task is not blocked as data has arrived. */
+				xSemaphoreGive( xEMACSemaphore );
+			}
+		}
+
+		EthernetIntEnable( ETH_BASE, ETH_INT_RX );
+	}
+}
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/emac.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/emac.h
new file mode 100644
index 000000000..a49b59828
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/emac.h
@@ -0,0 +1,322 @@
+/*----------------------------------------------------------------------------
+ *      LPC2378 Ethernet Definitions
+ *----------------------------------------------------------------------------
+ *      Name:    EMAC.H
+ *      Purpose: Philips LPC2378 EMAC hardware definitions
+ *----------------------------------------------------------------------------
+ *      Copyright (c) 2006 KEIL - An ARM Company. All rights reserved.
+ *---------------------------------------------------------------------------*/
+#ifndef __EMAC_H
+#define __EMAC_H
+
+/* MAC address definition.  The MAC address must be unique on the network. */
+#define emacETHADDR0 0
+#define emacETHADDR1 0xbd
+#define emacETHADDR2 0x33
+#define emacETHADDR3 0x02
+#define emacETHADDR4 0x64
+#define emacETHADDR5 0x24
+
+
+/* EMAC Memory Buffer configuration for 16K Ethernet RAM. */
+#define NUM_RX_FRAG         4           /* Num.of RX Fragments 4*1536= 6.0kB */
+#define NUM_TX_FRAG         2           /* Num.of TX Fragments 2*1536= 3.0kB */
+#define ETH_FRAG_SIZE       1536        /* Packet Fragment size 1536 Bytes   */
+
+#define ETH_MAX_FLEN        1536        /* Max. Ethernet Frame Size          */
+
+/* EMAC variables located in 16K Ethernet SRAM */
+#define RX_DESC_BASE        0x7FE00000
+#define RX_STAT_BASE        (RX_DESC_BASE + NUM_RX_FRAG*8)
+#define TX_DESC_BASE        (RX_STAT_BASE + NUM_RX_FRAG*8)
+#define TX_STAT_BASE        (TX_DESC_BASE + NUM_TX_FRAG*8)
+#define RX_BUF_BASE         (TX_STAT_BASE + NUM_TX_FRAG*4)
+#define TX_BUF_BASE         (RX_BUF_BASE  + NUM_RX_FRAG*ETH_FRAG_SIZE)
+
+/* RX and TX descriptor and status definitions. */
+#define RX_DESC_PACKET(i)   (*(unsigned int *)(RX_DESC_BASE   + 8*i))
+#define RX_DESC_CTRL(i)     (*(unsigned int *)(RX_DESC_BASE+4 + 8*i))
+#define RX_STAT_INFO(i)     (*(unsigned int *)(RX_STAT_BASE   + 8*i))
+#define RX_STAT_HASHCRC(i)  (*(unsigned int *)(RX_STAT_BASE+4 + 8*i))
+#define TX_DESC_PACKET(i)   (*(unsigned int *)(TX_DESC_BASE   + 8*i))
+#define TX_DESC_CTRL(i)     (*(unsigned int *)(TX_DESC_BASE+4 + 8*i))
+#define TX_STAT_INFO(i)     (*(unsigned int *)(TX_STAT_BASE   + 4*i))
+#define RX_BUF(i)           (RX_BUF_BASE + ETH_FRAG_SIZE*i)
+#define TX_BUF(i)           (TX_BUF_BASE + ETH_FRAG_SIZE*i)
+
+/* MAC Configuration Register 1 */
+#define MAC1_REC_EN         0x00000001  /* Receive Enable                    */
+#define MAC1_PASS_ALL       0x00000002  /* Pass All Receive Frames           */
+#define MAC1_RX_FLOWC       0x00000004  /* RX Flow Control                   */
+#define MAC1_TX_FLOWC       0x00000008  /* TX Flow Control                   */
+#define MAC1_LOOPB          0x00000010  /* Loop Back Mode                    */
+#define MAC1_RES_TX         0x00000100  /* Reset TX Logic                    */
+#define MAC1_RES_MCS_TX     0x00000200  /* Reset MAC TX Control Sublayer     */
+#define MAC1_RES_RX         0x00000400  /* Reset RX Logic                    */
+#define MAC1_RES_MCS_RX     0x00000800  /* Reset MAC RX Control Sublayer     */
+#define MAC1_SIM_RES        0x00004000  /* Simulation Reset                  */
+#define MAC1_SOFT_RES       0x00008000  /* Soft Reset MAC                    */
+
+/* MAC Configuration Register 2 */
+#define MAC2_FULL_DUP       0x00000001  /* Full Duplex Mode                  */
+#define MAC2_FRM_LEN_CHK    0x00000002  /* Frame Length Checking             */
+#define MAC2_HUGE_FRM_EN    0x00000004  /* Huge Frame Enable                 */
+#define MAC2_DLY_CRC        0x00000008  /* Delayed CRC Mode                  */
+#define MAC2_CRC_EN         0x00000010  /* Append CRC to every Frame         */
+#define MAC2_PAD_EN         0x00000020  /* Pad all Short Frames              */
+#define MAC2_VLAN_PAD_EN    0x00000040  /* VLAN Pad Enable                   */
+#define MAC2_ADET_PAD_EN    0x00000080  /* Auto Detect Pad Enable            */
+#define MAC2_PPREAM_ENF     0x00000100  /* Pure Preamble Enforcement         */
+#define MAC2_LPREAM_ENF     0x00000200  /* Long Preamble Enforcement         */
+#undef  MAC2_NO_BACKOFF /* Remove compiler warning. */
+#define MAC2_NO_BACKOFF     0x00001000  /* No Backoff Algorithm              */
+#define MAC2_BACK_PRESSURE  0x00002000  /* Backoff Presurre / No Backoff     */
+#define MAC2_EXCESS_DEF     0x00004000  /* Excess Defer                      */
+
+/* Back-to-Back Inter-Packet-Gap Register */
+#define IPGT_FULL_DUP       0x00000015  /* Recommended value for Full Duplex */
+#define IPGT_HALF_DUP       0x00000012  /* Recommended value for Half Duplex */
+
+/* Non Back-to-Back Inter-Packet-Gap Register */
+#define IPGR_DEF            0x00000012  /* Recommended value                 */
+
+/* Collision Window/Retry Register */
+#define CLRT_DEF            0x0000370F  /* Default value                     */
+
+/* PHY Support Register */
+#undef SUPP_SPEED   /* Remove compiler warning. */
+#define SUPP_SPEED          0x00000100  /* Reduced MII Logic Current Speed   */
+#define SUPP_RES_RMII       0x00000800  /* Reset Reduced MII Logic           */
+
+/* Test Register */
+#define TEST_SHCUT_PQUANTA  0x00000001  /* Shortcut Pause Quanta             */
+#define TEST_TST_PAUSE      0x00000002  /* Test Pause                        */
+#define TEST_TST_BACKP      0x00000004  /* Test Back Pressure                */
+
+/* MII Management Configuration Register */
+#define MCFG_SCAN_INC       0x00000001  /* Scan Increment PHY Address        */
+#define MCFG_SUPP_PREAM     0x00000002  /* Suppress Preamble                 */
+#define MCFG_CLK_SEL        0x0000001C  /* Clock Select Mask                 */
+#define MCFG_RES_MII        0x00008000  /* Reset MII Management Hardware     */
+
+/* MII Management Command Register */
+#undef MCMD_READ   /* Remove compiler warning. */
+#define MCMD_READ           0x00000001  /* MII Read                          */
+#undef MCMD_SCAN /* Remove compiler warning. */
+#define MCMD_SCAN           0x00000002  /* MII Scan continuously             */
+
+#define MII_WR_TOUT         0x00050000  /* MII Write timeout count           */
+#define MII_RD_TOUT         0x00050000  /* MII Read timeout count            */
+
+/* MII Management Address Register */
+#define MADR_REG_ADR        0x0000001F  /* MII Register Address Mask         */
+#define MADR_PHY_ADR        0x00001F00  /* PHY Address Mask                  */
+
+/* MII Management Indicators Register */
+#undef MIND_BUSY   /* Remove compiler warning. */
+#define MIND_BUSY           0x00000001  /* MII is Busy                       */
+#define MIND_SCAN           0x00000002  /* MII Scanning in Progress          */
+#define MIND_NOT_VAL        0x00000004  /* MII Read Data not valid           */
+#define MIND_MII_LINK_FAIL  0x00000008  /* MII Link Failed                   */
+
+/* Command Register */
+#define CR_RX_EN            0x00000001  /* Enable Receive                    */
+#define CR_TX_EN            0x00000002  /* Enable Transmit                   */
+#define CR_REG_RES          0x00000008  /* Reset Host Registers              */
+#define CR_TX_RES           0x00000010  /* Reset Transmit Datapath           */
+#define CR_RX_RES           0x00000020  /* Reset Receive Datapath            */
+#define CR_PASS_RUNT_FRM    0x00000040  /* Pass Runt Frames                  */
+#define CR_PASS_RX_FILT     0x00000080  /* Pass RX Filter                    */
+#define CR_TX_FLOW_CTRL     0x00000100  /* TX Flow Control                   */
+#define CR_RMII             0x00000200  /* Reduced MII Interface             */
+#define CR_FULL_DUP         0x00000400  /* Full Duplex                       */
+
+/* Status Register */
+#define SR_RX_EN            0x00000001  /* Enable Receive                    */
+#define SR_TX_EN            0x00000002  /* Enable Transmit                   */
+
+/* Transmit Status Vector 0 Register */
+#define TSV0_CRC_ERR        0x00000001  /* CRC error                         */
+#define TSV0_LEN_CHKERR     0x00000002  /* Length Check Error                */
+#define TSV0_LEN_OUTRNG     0x00000004  /* Length Out of Range               */
+#define TSV0_DONE           0x00000008  /* Tramsmission Completed            */
+#define TSV0_MCAST          0x00000010  /* Multicast Destination             */
+#define TSV0_BCAST          0x00000020  /* Broadcast Destination             */
+#define TSV0_PKT_DEFER      0x00000040  /* Packet Deferred                   */
+#define TSV0_EXC_DEFER      0x00000080  /* Excessive Packet Deferral         */
+#define TSV0_EXC_COLL       0x00000100  /* Excessive Collision               */
+#define TSV0_LATE_COLL      0x00000200  /* Late Collision Occured            */
+#define TSV0_GIANT          0x00000400  /* Giant Frame                       */
+#define TSV0_UNDERRUN       0x00000800  /* Buffer Underrun                   */
+#define TSV0_BYTES          0x0FFFF000  /* Total Bytes Transferred           */
+#define TSV0_CTRL_FRAME     0x10000000  /* Control Frame                     */
+#define TSV0_PAUSE          0x20000000  /* Pause Frame                       */
+#define TSV0_BACK_PRESS     0x40000000  /* Backpressure Method Applied       */
+#define TSV0_VLAN           0x80000000  /* VLAN Frame                        */
+
+/* Transmit Status Vector 1 Register */
+#define TSV1_BYTE_CNT       0x0000FFFF  /* Transmit Byte Count               */
+#define TSV1_COLL_CNT       0x000F0000  /* Transmit Collision Count          */
+
+/* Receive Status Vector Register */
+#define RSV_BYTE_CNT        0x0000FFFF  /* Receive Byte Count                */
+#define RSV_PKT_IGNORED     0x00010000  /* Packet Previously Ignored         */
+#define RSV_RXDV_SEEN       0x00020000  /* RXDV Event Previously Seen        */
+#define RSV_CARR_SEEN       0x00040000  /* Carrier Event Previously Seen     */
+#define RSV_REC_CODEV       0x00080000  /* Receive Code Violation            */
+#define RSV_CRC_ERR         0x00100000  /* CRC Error                         */
+#define RSV_LEN_CHKERR      0x00200000  /* Length Check Error                */
+#define RSV_LEN_OUTRNG      0x00400000  /* Length Out of Range               */
+#define RSV_REC_OK          0x00800000  /* Frame Received OK                 */
+#define RSV_MCAST           0x01000000  /* Multicast Frame                   */
+#define RSV_BCAST           0x02000000  /* Broadcast Frame                   */
+#define RSV_DRIB_NIBB       0x04000000  /* Dribble Nibble                    */
+#define RSV_CTRL_FRAME      0x08000000  /* Control Frame                     */
+#define RSV_PAUSE           0x10000000  /* Pause Frame                       */
+#define RSV_UNSUPP_OPC      0x20000000  /* Unsupported Opcode                */
+#define RSV_VLAN            0x40000000  /* VLAN Frame                        */
+
+/* Flow Control Counter Register */
+#define FCC_MIRR_CNT        0x0000FFFF  /* Mirror Counter                    */
+#define FCC_PAUSE_TIM       0xFFFF0000  /* Pause Timer                       */
+
+/* Flow Control Status Register */
+#define FCS_MIRR_CNT        0x0000FFFF  /* Mirror Counter Current            */
+
+/* Receive Filter Control Register */
+#define RFC_UCAST_EN        0x00000001  /* Accept Unicast Frames Enable      */
+#define RFC_BCAST_EN        0x00000002  /* Accept Broadcast Frames Enable    */
+#define RFC_MCAST_EN        0x00000004  /* Accept Multicast Frames Enable    */
+#define RFC_UCAST_HASH_EN   0x00000008  /* Accept Unicast Hash Filter Frames */
+#define RFC_MCAST_HASH_EN   0x00000010  /* Accept Multicast Hash Filter Fram.*/
+#define RFC_PERFECT_EN      0x00000020  /* Accept Perfect Match Enable       */
+#define RFC_MAGP_WOL_EN     0x00001000  /* Magic Packet Filter WoL Enable    */
+#define RFC_PFILT_WOL_EN    0x00002000  /* Perfect Filter WoL Enable         */
+
+/* Receive Filter WoL Status/Clear Registers */
+#define WOL_UCAST           0x00000001  /* Unicast Frame caused WoL          */
+#define WOL_BCAST           0x00000002  /* Broadcast Frame caused WoL        */
+#define WOL_MCAST           0x00000004  /* Multicast Frame caused WoL        */
+#define WOL_UCAST_HASH      0x00000008  /* Unicast Hash Filter Frame WoL     */
+#define WOL_MCAST_HASH      0x00000010  /* Multicast Hash Filter Frame WoL   */
+#define WOL_PERFECT         0x00000020  /* Perfect Filter WoL                */
+#define WOL_RX_FILTER       0x00000080  /* RX Filter caused WoL              */
+#define WOL_MAG_PACKET      0x00000100  /* Magic Packet Filter caused WoL    */
+
+/* Interrupt Status/Enable/Clear/Set Registers */
+#define INT_RX_OVERRUN      0x00000001  /* Overrun Error in RX Queue         */
+#define INT_RX_ERR          0x00000002  /* Receive Error                     */
+#define INT_RX_FIN          0x00000004  /* RX Finished Process Descriptors   */
+#define INT_RX_DONE         0x00000008  /* Receive Done                      */
+#define INT_TX_UNDERRUN     0x00000010  /* Transmit Underrun                 */
+#define INT_TX_ERR          0x00000020  /* Transmit Error                    */
+#define INT_TX_FIN          0x00000040  /* TX Finished Process Descriptors   */
+#define INT_TX_DONE         0x00000080  /* Transmit Done                     */
+#define INT_SOFT_INT        0x00001000  /* Software Triggered Interrupt      */
+#define INT_WAKEUP          0x00002000  /* Wakeup Event Interrupt            */
+
+/* Power Down Register */
+#define PD_POWER_DOWN       0x80000000  /* Power Down MAC                    */
+
+/* RX Descriptor Control Word */
+#define RCTRL_SIZE          0x000007FF  /* Buffer size mask                  */
+#define RCTRL_INT           0x80000000  /* Generate RxDone Interrupt         */
+
+/* RX Status Hash CRC Word */
+#define RHASH_SA            0x000001FF  /* Hash CRC for Source Address       */
+#define RHASH_DA            0x001FF000  /* Hash CRC for Destination Address  */
+
+/* RX Status Information Word */
+#define RINFO_SIZE          0x000007FF  /* Data size in bytes                */
+#define RINFO_CTRL_FRAME    0x00040000  /* Control Frame                     */
+#define RINFO_VLAN          0x00080000  /* VLAN Frame                        */
+#define RINFO_FAIL_FILT     0x00100000  /* RX Filter Failed                  */
+#define RINFO_MCAST         0x00200000  /* Multicast Frame                   */
+#define RINFO_BCAST         0x00400000  /* Broadcast Frame                   */
+#define RINFO_CRC_ERR       0x00800000  /* CRC Error in Frame                */
+#define RINFO_SYM_ERR       0x01000000  /* Symbol Error from PHY             */
+#define RINFO_LEN_ERR       0x02000000  /* Length Error                      */
+#define RINFO_RANGE_ERR     0x04000000  /* Range Error (exceeded max. size)  */
+#define RINFO_ALIGN_ERR     0x08000000  /* Alignment Error                   */
+#define RINFO_OVERRUN       0x10000000  /* Receive overrun                   */
+#define RINFO_NO_DESCR      0x20000000  /* No new Descriptor available       */
+#define RINFO_LAST_FLAG     0x40000000  /* Last Fragment in Frame            */
+#define RINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */
+
+#define RINFO_ERR_MASK     (RINFO_FAIL_FILT | RINFO_CRC_ERR   | RINFO_SYM_ERR | \
+                            RINFO_LEN_ERR   | RINFO_ALIGN_ERR | RINFO_OVERRUN)
+
+/* TX Descriptor Control Word */
+#define TCTRL_SIZE          0x000007FF  /* Size of data buffer in bytes      */
+#define TCTRL_OVERRIDE      0x04000000  /* Override Default MAC Registers    */
+#define TCTRL_HUGE          0x08000000  /* Enable Huge Frame                 */
+#define TCTRL_PAD           0x10000000  /* Pad short Frames to 64 bytes      */
+#define TCTRL_CRC           0x20000000  /* Append a hardware CRC to Frame    */
+#define TCTRL_LAST          0x40000000  /* Last Descriptor for TX Frame      */
+#define TCTRL_INT           0x80000000  /* Generate TxDone Interrupt         */
+
+/* TX Status Information Word */
+#define TINFO_COL_CNT       0x01E00000  /* Collision Count                   */
+#define TINFO_DEFER         0x02000000  /* Packet Deferred (not an error)    */
+#define TINFO_EXCESS_DEF    0x04000000  /* Excessive Deferral                */
+#define TINFO_EXCESS_COL    0x08000000  /* Excessive Collision               */
+#define TINFO_LATE_COL      0x10000000  /* Late Collision Occured            */
+#define TINFO_UNDERRUN      0x20000000  /* Transmit Underrun                 */
+#define TINFO_NO_DESCR      0x40000000  /* No new Descriptor available       */
+#define TINFO_ERR           0x80000000  /* Error Occured (OR of all errors)  */
+
+/* DP83848C PHY Registers */
+#define PHY_REG_BMCR        0x00        /* Basic Mode Control Register       */
+#define PHY_REG_BMSR        0x01        /* Basic Mode Status Register        */
+#define PHY_REG_IDR1        0x02        /* PHY Identifier 1                  */
+#define PHY_REG_IDR2        0x03        /* PHY Identifier 2                  */
+#define PHY_REG_ANAR        0x04        /* Auto-Negotiation Advertisement    */
+#define PHY_REG_ANLPAR      0x05        /* Auto-Neg. Link Partner Abitily    */
+#define PHY_REG_ANER        0x06        /* Auto-Neg. Expansion Register      */
+#define PHY_REG_ANNPTR      0x07        /* Auto-Neg. Next Page TX            */
+
+/* PHY Extended Registers */
+#define PHY_REG_STS         0x10        /* Status Register                   */
+#define PHY_REG_MICR        0x11        /* MII Interrupt Control Register    */
+#define PHY_REG_MISR        0x12        /* MII Interrupt Status Register     */
+#define PHY_REG_FCSCR       0x14        /* False Carrier Sense Counter       */
+#define PHY_REG_RECR        0x15        /* Receive Error Counter             */
+#define PHY_REG_PCSR        0x16        /* PCS Sublayer Config. and Status   */
+#define PHY_REG_RBR         0x17        /* RMII and Bypass Register          */
+#define PHY_REG_LEDCR       0x18        /* LED Direct Control Register       */
+#define PHY_REG_PHYCR       0x19        /* PHY Control Register              */
+#define PHY_REG_10BTSCR     0x1A        /* 10Base-T Status/Control Register  */
+#define PHY_REG_CDCTRL1     0x1B        /* CD Test Control and BIST Extens.  */
+#define PHY_REG_EDCR        0x1D        /* Energy Detect Control Register    */
+
+#define PHY_FULLD_100M      0x2100      /* Full Duplex 100Mbit               */
+#define PHY_HALFD_100M      0x2000      /* Half Duplex 100Mbit               */
+#define PHY_FULLD_10M       0x0100      /* Full Duplex 10Mbit                */
+#define PHY_HALFD_10M       0x0000      /* Half Duplex 10MBit                */
+#define PHY_AUTO_NEG        0x3000      /* Select Auto Negotiation           */
+
+#define DP83848C_DEF_ADR    0x0100      /* Default PHY device address        */
+#define DP83848C_ID         0x20005C90  /* PHY Identifier                    */
+
+// prototypes
+portBASE_TYPE  vInitEMAC(void);
+unsigned short ReadFrameBE_EMAC(void);
+void           vIncrementTxLength(unsigned long ulLength);
+void           CopyFromFrame_EMAC(void *Dest, unsigned short Size);
+void           DummyReadFrame_EMAC(unsigned short Size);
+unsigned short StartReadFrame(void);
+void           EndReadFrame(void);
+unsigned int   CheckFrameReceived(void);
+void           vInitialiseSend(void);
+unsigned int   Rdy4Tx(void);
+void           vSendBufferToMAC(void);
+void vEMACWaitForInput( void );
+unsigned int uiGetEMACRxData( unsigned char *ucBuffer );
+
+
+#endif
+
+/*----------------------------------------------------------------------------
+ * end of file
+ *---------------------------------------------------------------------------*/
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings
new file mode 100644
index 000000000..0d3c30cdd
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings
@@ -0,0 +1,35 @@
+http_http "http://"
+http_200 "200 "
+http_301 "301 "
+http_302 "302 "
+http_get "GET "
+http_10 "HTTP/1.0"
+http_11 "HTTP/1.1"
+http_content_type "content-type: "
+http_texthtml "text/html"
+http_location "location: "
+http_host "host: "
+http_crnl "\r\n"
+http_index_html "/index.html"
+http_404_html "/404.html"
+http_referer "Referer:"
+http_header_200 "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"
+http_header_404 "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n"
+http_content_type_plain "Content-type: text/plain\r\n\r\n"
+http_content_type_html "Content-type: text/html\r\n\r\n"
+http_content_type_css  "Content-type: text/css\r\n\r\n"
+http_content_type_text "Content-type: text/text\r\n\r\n"
+http_content_type_png  "Content-type: image/png\r\n\r\n"
+http_content_type_gif  "Content-type: image/gif\r\n\r\n"
+http_content_type_jpg  "Content-type: image/jpeg\r\n\r\n"
+http_content_type_binary "Content-type: application/octet-stream\r\n\r\n"
+http_html ".html"
+http_shtml ".shtml"
+http_htm ".htm"
+http_css ".css"
+http_png ".png"
+http_gif ".gif"
+http_jpg ".jpg"
+http_text ".txt"
+http_txt ".txt"
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings.c
new file mode 100644
index 000000000..ef7a41c7d
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings.c
@@ -0,0 +1,102 @@
+const char http_http[8] = 
+/* "http://" */
+{0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, };
+const char http_200[5] = 
+/* "200 " */
+{0x32, 0x30, 0x30, 0x20, };
+const char http_301[5] = 
+/* "301 " */
+{0x33, 0x30, 0x31, 0x20, };
+const char http_302[5] = 
+/* "302 " */
+{0x33, 0x30, 0x32, 0x20, };
+const char http_get[5] = 
+/* "GET " */
+{0x47, 0x45, 0x54, 0x20, };
+const char http_10[9] = 
+/* "HTTP/1.0" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, };
+const char http_11[9] = 
+/* "HTTP/1.1" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x31, };
+const char http_content_type[15] = 
+/* "content-type: " */
+{0x63, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, };
+const char http_texthtml[10] = 
+/* "text/html" */
+{0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_location[11] = 
+/* "location: " */
+{0x6c, 0x6f, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, };
+const char http_host[7] = 
+/* "host: " */
+{0x68, 0x6f, 0x73, 0x74, 0x3a, 0x20, };
+const char http_crnl[3] = 
+/* "\r\n" */
+{0xd, 0xa, };
+const char http_index_html[12] = 
+/* "/index.html" */
+{0x2f, 0x69, 0x6e, 0x64, 0x65, 0x78, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_404_html[10] = 
+/* "/404.html" */
+{0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_referer[9] = 
+/* "Referer:" */
+{0x52, 0x65, 0x66, 0x65, 0x72, 0x65, 0x72, 0x3a, };
+const char http_header_200[84] = 
+/* "HTTP/1.0 200 OK\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x32, 0x30, 0x30, 0x20, 0x4f, 0x4b, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
+const char http_header_404[91] = 
+/* "HTTP/1.0 404 Not found\r\nServer: uIP/1.0 http://www.sics.se/~adam/uip/\r\nConnection: close\r\n" */
+{0x48, 0x54, 0x54, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x34, 0x30, 0x34, 0x20, 0x4e, 0x6f, 0x74, 0x20, 0x66, 0x6f, 0x75, 0x6e, 0x64, 0xd, 0xa, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x3a, 0x20, 0x75, 0x49, 0x50, 0x2f, 0x31, 0x2e, 0x30, 0x20, 0x68, 0x74, 0x74, 0x70, 0x3a, 0x2f, 0x2f, 0x77, 0x77, 0x77, 0x2e, 0x73, 0x69, 0x63, 0x73, 0x2e, 0x73, 0x65, 0x2f, 0x7e, 0x61, 0x64, 0x61, 0x6d, 0x2f, 0x75, 0x69, 0x70, 0x2f, 0xd, 0xa, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x63, 0x6c, 0x6f, 0x73, 0x65, 0xd, 0xa, };
+const char http_content_type_plain[29] = 
+/* "Content-type: text/plain\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x70, 0x6c, 0x61, 0x69, 0x6e, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_html[28] = 
+/* "Content-type: text/html\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x68, 0x74, 0x6d, 0x6c, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_css [27] = 
+/* "Content-type: text/css\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x63, 0x73, 0x73, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_text[28] = 
+/* "Content-type: text/text\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x74, 0x65, 0x78, 0x74, 0x2f, 0x74, 0x65, 0x78, 0x74, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_png [28] = 
+/* "Content-type: image/png\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x70, 0x6e, 0x67, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_gif [28] = 
+/* "Content-type: image/gif\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x67, 0x69, 0x66, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_jpg [29] = 
+/* "Content-type: image/jpeg\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x69, 0x6d, 0x61, 0x67, 0x65, 0x2f, 0x6a, 0x70, 0x65, 0x67, 0xd, 0xa, 0xd, 0xa, };
+const char http_content_type_binary[43] = 
+/* "Content-type: application/octet-stream\r\n\r\n" */
+{0x43, 0x6f, 0x6e, 0x74, 0x65, 0x6e, 0x74, 0x2d, 0x74, 0x79, 0x70, 0x65, 0x3a, 0x20, 0x61, 0x70, 0x70, 0x6c, 0x69, 0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x2f, 0x6f, 0x63, 0x74, 0x65, 0x74, 0x2d, 0x73, 0x74, 0x72, 0x65, 0x61, 0x6d, 0xd, 0xa, 0xd, 0xa, };
+const char http_html[6] = 
+/* ".html" */
+{0x2e, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_shtml[7] = 
+/* ".shtml" */
+{0x2e, 0x73, 0x68, 0x74, 0x6d, 0x6c, };
+const char http_htm[5] = 
+/* ".htm" */
+{0x2e, 0x68, 0x74, 0x6d, };
+const char http_css[5] = 
+/* ".css" */
+{0x2e, 0x63, 0x73, 0x73, };
+const char http_png[5] = 
+/* ".png" */
+{0x2e, 0x70, 0x6e, 0x67, };
+const char http_gif[5] = 
+/* ".gif" */
+{0x2e, 0x67, 0x69, 0x66, };
+const char http_jpg[5] = 
+/* ".jpg" */
+{0x2e, 0x6a, 0x70, 0x67, };
+const char http_text[5] = 
+/* ".txt" */
+{0x2e, 0x74, 0x78, 0x74, };
+const char http_txt[5] = 
+/* ".txt" */
+{0x2e, 0x74, 0x78, 0x74, };
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings.h
new file mode 100644
index 000000000..acbe7e17f
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/http-strings.h
@@ -0,0 +1,34 @@
+extern const char http_http[8];
+extern const char http_200[5];
+extern const char http_301[5];
+extern const char http_302[5];
+extern const char http_get[5];
+extern const char http_10[9];
+extern const char http_11[9];
+extern const char http_content_type[15];
+extern const char http_texthtml[10];
+extern const char http_location[11];
+extern const char http_host[7];
+extern const char http_crnl[3];
+extern const char http_index_html[12];
+extern const char http_404_html[10];
+extern const char http_referer[9];
+extern const char http_header_200[84];
+extern const char http_header_404[91];
+extern const char http_content_type_plain[29];
+extern const char http_content_type_html[28];
+extern const char http_content_type_css [27];
+extern const char http_content_type_text[28];
+extern const char http_content_type_png [28];
+extern const char http_content_type_gif [28];
+extern const char http_content_type_jpg [29];
+extern const char http_content_type_binary[43];
+extern const char http_html[6];
+extern const char http_shtml[7];
+extern const char http_htm[5];
+extern const char http_css[5];
+extern const char http_png[5];
+extern const char http_gif[5];
+extern const char http_jpg[5];
+extern const char http_text[5];
+extern const char http_txt[5];
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-cgi.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-cgi.c
new file mode 100644
index 000000000..1bf08e283
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-cgi.c
@@ -0,0 +1,293 @@
+/**
+ * \addtogroup httpd
+ * @{
+ */
+
+/**
+ * \file
+ *         Web server script interface
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ *
+ */
+
+/*
+ * Copyright (c) 2001-2006, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $
+ *
+ */
+
+#include "uip.h"
+#include "psock.h"
+#include "httpd.h"
+#include "httpd-cgi.h"
+#include "httpd-fs.h"
+
+#include <stdio.h>
+#include <string.h>
+
+HTTPD_CGI_CALL(file, "file-stats", file_stats);
+HTTPD_CGI_CALL(tcp, "tcp-connections", tcp_stats);
+HTTPD_CGI_CALL(net, "net-stats", net_stats);
+HTTPD_CGI_CALL(rtos, "rtos-stats", rtos_stats );
+HTTPD_CGI_CALL(run, "run-time", run_time );
+HTTPD_CGI_CALL(io, "led-io", led_io );
+
+
+static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &run, &io, NULL };
+
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(nullfunction(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+httpd_cgifunction
+httpd_cgi(char *name)
+{
+  const struct httpd_cgi_call **f;
+
+  /* Find the matching name in the table, return the function. */
+  for(f = calls; *f != NULL; ++f) {
+    if(strncmp((*f)->name, name, strlen((*f)->name)) == 0) {
+      return (*f)->function;
+    }
+  }
+  return nullfunction;
+}
+/*---------------------------------------------------------------------------*/
+static unsigned short
+generate_file_stats(void *arg)
+{
+  char *f = (char *)arg;
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE, "%5u", httpd_fs_count(f));
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(file_stats(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+
+  PSOCK_GENERATOR_SEND(&s->sout, generate_file_stats, strchr(ptr, ' ') + 1);
+
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static const char closed[] =   /*  "CLOSED",*/
+{0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0};
+static const char syn_rcvd[] = /*  "SYN-RCVD",*/
+{0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56,
+ 0x44,  0};
+static const char syn_sent[] = /*  "SYN-SENT",*/
+{0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e,
+ 0x54,  0};
+static const char established[] = /*  "ESTABLISHED",*/
+{0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48,
+ 0x45, 0x44, 0};
+static const char fin_wait_1[] = /*  "FIN-WAIT-1",*/
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
+ 0x54, 0x2d, 0x31, 0};
+static const char fin_wait_2[] = /*  "FIN-WAIT-2",*/
+{0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49,
+ 0x54, 0x2d, 0x32, 0};
+static const char closing[] = /*  "CLOSING",*/
+{0x43, 0x4c, 0x4f, 0x53, 0x49,
+ 0x4e, 0x47, 0};
+static const char time_wait[] = /*  "TIME-WAIT,"*/
+{0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41,
+ 0x49, 0x54, 0};
+static const char last_ack[] = /*  "LAST-ACK"*/
+{0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43,
+ 0x4b, 0};
+
+static const char *states[] = {
+  closed,
+  syn_rcvd,
+  syn_sent,
+  established,
+  fin_wait_1,
+  fin_wait_2,
+  closing,
+  time_wait,
+  last_ack};
+
+
+static unsigned short
+generate_tcp_stats(void *arg)
+{
+  struct uip_conn *conn;
+  struct httpd_state *s = (struct httpd_state *)arg;
+
+  conn = &uip_conns[s->count];
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
+		 "<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n",
+		 htons(conn->lport),
+		 htons(conn->ripaddr[0]) >> 8,
+		 htons(conn->ripaddr[0]) & 0xff,
+		 htons(conn->ripaddr[1]) >> 8,
+		 htons(conn->ripaddr[1]) & 0xff,
+		 htons(conn->rport),
+		 states[conn->tcpstateflags & UIP_TS_MASK],
+		 conn->nrtx,
+		 conn->timer,
+		 (uip_outstanding(conn))? '*':' ',
+		 (uip_stopped(conn))? '!':' ');
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(tcp_stats(struct httpd_state *s, char *ptr))
+{
+
+  PSOCK_BEGIN(&s->sout);
+
+  for(s->count = 0; s->count < UIP_CONNS; ++s->count) {
+    if((uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED) {
+      PSOCK_GENERATOR_SEND(&s->sout, generate_tcp_stats, s);
+    }
+  }
+
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static unsigned short
+generate_net_stats(void *arg)
+{
+  struct httpd_state *s = (struct httpd_state *)arg;
+  return snprintf((char *)uip_appdata, UIP_APPDATA_SIZE,
+		  "%5u\n", ((uip_stats_t *)&uip_stat)[s->count]);
+}
+
+static
+PT_THREAD(net_stats(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+
+#if UIP_STATISTICS
+
+  for(s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t);
+      ++s->count) {
+    PSOCK_GENERATOR_SEND(&s->sout, generate_net_stats, s);
+  }
+
+#endif /* UIP_STATISTICS */
+
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+
+extern void vTaskList( signed char *pcWriteBuffer );
+static char cCountBuf[ 32 ];
+long lRefreshCount = 0;
+static unsigned short
+generate_rtos_stats(void *arg)
+{
+	lRefreshCount++;
+	sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );
+    vTaskList( uip_appdata );
+	strcat( uip_appdata, cCountBuf );
+
+	return strlen( uip_appdata );
+}
+/*---------------------------------------------------------------------------*/
+
+
+static
+PT_THREAD(rtos_stats(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_GENERATOR_SEND(&s->sout, generate_rtos_stats, NULL);
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+
+char *pcStatus;
+extern unsigned long uxParTestGetLED( unsigned long uxLED );
+
+static unsigned short generate_io_state( void *arg )
+{
+	if( uxParTestGetLED( 0 ) )
+	{
+		pcStatus = "checked";
+	}
+	else
+	{
+		pcStatus = "";
+	}
+
+	sprintf( uip_appdata,
+		"<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED"\
+		"<p>"\
+		"<input type=\"text\" name=\"LCD\" value=\"Enter LCD text\" size=\"16\">",
+		pcStatus );
+
+	return strlen( uip_appdata );
+}
+/*---------------------------------------------------------------------------*/
+
+extern void vTaskGetRunTimeStats( signed char *pcWriteBuffer );
+static unsigned short
+generate_runtime_stats(void *arg)
+{
+	lRefreshCount++;
+	sprintf( cCountBuf, "<p><br>Refresh count = %d", lRefreshCount );
+	vTaskGetRunTimeStats( uip_appdata );
+	strcat( uip_appdata, cCountBuf );
+
+	return strlen( uip_appdata );
+}
+/*---------------------------------------------------------------------------*/
+
+
+static
+PT_THREAD(run_time(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_GENERATOR_SEND(&s->sout, generate_runtime_stats, NULL);
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+
+static PT_THREAD(led_io(struct httpd_state *s, char *ptr))
+{
+  PSOCK_BEGIN(&s->sout);
+  PSOCK_GENERATOR_SEND(&s->sout, generate_io_state, NULL);
+  PSOCK_END(&s->sout);
+}
+
+/** @} */
+
+
+
+
+
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-cgi.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-cgi.h
new file mode 100644
index 000000000..7ae928321
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-cgi.h
@@ -0,0 +1,84 @@
+/**
+ * \addtogroup httpd
+ * @{
+ */
+
+/**
+ * \file
+ *         Web server script interface header file
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ *
+ */
+
+
+
+/*
+ * Copyright (c) 2001, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * $Id: httpd-cgi.h,v 1.2 2006/06/11 21:46:38 adam Exp $
+ *
+ */
+
+#ifndef __HTTPD_CGI_H__
+#define __HTTPD_CGI_H__
+
+#include "psock.h"
+#include "httpd.h"
+
+typedef PT_THREAD((* httpd_cgifunction)(struct httpd_state *, char *));
+
+httpd_cgifunction httpd_cgi(char *name);
+
+struct httpd_cgi_call {
+  const char *name;
+  const httpd_cgifunction function;
+};
+
+/**
+ * \brief      HTTPD CGI function declaration
+ * \param name The C variable name of the function
+ * \param str  The string name of the function, used in the script file
+ * \param function A pointer to the function that implements it
+ *
+ *             This macro is used for declaring a HTTPD CGI
+ *             function. This function is then added to the list of
+ *             HTTPD CGI functions with the httpd_cgi_add() function.
+ *
+ * \hideinitializer
+ */
+#define HTTPD_CGI_CALL(name, str, function) \
+static PT_THREAD(function(struct httpd_state *, char *)); \
+static const struct httpd_cgi_call name = {str, function}
+
+void httpd_cgi_init(void);
+#endif /* __HTTPD_CGI_H__ */
+
+/** @} */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs.c
new file mode 100644
index 000000000..dc4aef011
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs.c
@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd-fs.c,v 1.1 2006/06/07 09:13:08 adam Exp $
+ */
+
+#include "httpd.h"
+#include "httpd-fs.h"
+#include "httpd-fsdata.h"
+
+#ifndef NULL
+#define NULL 0
+#endif /* NULL */
+
+#include "httpd-fsdata.c"
+
+#if HTTPD_FS_STATISTICS
+static u16_t count[HTTPD_FS_NUMFILES];
+#endif /* HTTPD_FS_STATISTICS */
+
+/*-----------------------------------------------------------------------------------*/
+static u8_t
+httpd_fs_strcmp(const char *str1, const char *str2)
+{
+  u8_t i;
+  i = 0;
+ loop:
+
+  if(str2[i] == 0 ||
+     str1[i] == '\r' ||
+     str1[i] == '\n') {
+    return 0;
+  }
+
+  if(str1[i] != str2[i]) {
+    return 1;
+  }
+
+
+  ++i;
+  goto loop;
+}
+/*-----------------------------------------------------------------------------------*/
+int
+httpd_fs_open(const char *name, struct httpd_fs_file *file)
+{
+#if HTTPD_FS_STATISTICS
+  u16_t i = 0;
+#endif /* HTTPD_FS_STATISTICS */
+  struct httpd_fsdata_file_noconst *f;
+
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
+      f != NULL;
+      f = (struct httpd_fsdata_file_noconst *)f->next) {
+
+    if(httpd_fs_strcmp(name, f->name) == 0) {
+      file->data = f->data;
+      file->len = f->len;
+#if HTTPD_FS_STATISTICS
+      ++count[i];
+#endif /* HTTPD_FS_STATISTICS */
+      return 1;
+    }
+#if HTTPD_FS_STATISTICS
+    ++i;
+#endif /* HTTPD_FS_STATISTICS */
+
+  }
+  return 0;
+}
+/*-----------------------------------------------------------------------------------*/
+void
+httpd_fs_init(void)
+{
+#if HTTPD_FS_STATISTICS
+  u16_t i;
+  for(i = 0; i < HTTPD_FS_NUMFILES; i++) {
+    count[i] = 0;
+  }
+#endif /* HTTPD_FS_STATISTICS */
+}
+/*-----------------------------------------------------------------------------------*/
+#if HTTPD_FS_STATISTICS
+u16_t httpd_fs_count
+(char *name)
+{
+  struct httpd_fsdata_file_noconst *f;
+  u16_t i;
+
+  i = 0;
+  for(f = (struct httpd_fsdata_file_noconst *)HTTPD_FS_ROOT;
+      f != NULL;
+      f = (struct httpd_fsdata_file_noconst *)f->next) {
+
+    if(httpd_fs_strcmp(name, f->name) == 0) {
+      return count[i];
+    }
+    ++i;
+  }
+  return 0;
+}
+#endif /* HTTPD_FS_STATISTICS */
+/*-----------------------------------------------------------------------------------*/
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs.h
new file mode 100644
index 000000000..b594eea56
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd-fs.h,v 1.1 2006/06/07 09:13:08 adam Exp $
+ */
+#ifndef __HTTPD_FS_H__
+#define __HTTPD_FS_H__
+
+#define HTTPD_FS_STATISTICS 1
+
+struct httpd_fs_file {
+  char *data;
+  int len;
+};
+
+/* file must be allocated by caller and will be filled in
+   by the function. */
+int httpd_fs_open(const char *name, struct httpd_fs_file *file);
+
+#ifdef HTTPD_FS_STATISTICS
+#if HTTPD_FS_STATISTICS == 1
+u16_t httpd_fs_count(char *name);
+#endif /* HTTPD_FS_STATISTICS */
+#endif /* HTTPD_FS_STATISTICS */
+
+void httpd_fs_init(void);
+
+#endif /* __HTTPD_FS_H__ */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/404.html b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/404.html
new file mode 100644
index 000000000..43e7f4cad
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/404.html
@@ -0,0 +1,8 @@
+<html>
+  <body bgcolor="white">
+    <center>
+      <h1>404 - file not found</h1>
+      <h3>Go <a href="/">here</a> instead.</h3>
+    </center>
+  </body>
+</html>
\ No newline at end of file
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/index.html b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/index.html
new file mode 100644
index 000000000..4937dc69a
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/index.html
@@ -0,0 +1,13 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)">
+<font face="arial">
+Loading index.shtml.  Click <a href="index.shtml">here</a> if not automatically redirected.
+</font>
+</font>
+</body>
+</html>
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/index.shtml b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/index.shtml
new file mode 100644
index 000000000..29d242c05
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/index.shtml
@@ -0,0 +1,20 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)">
+<font face="arial">
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br><p>
+<h2>Task statistics</h2>
+Page will refresh every 2 seconds.<p>
+<font face="courier"><pre>Task          State  Priority  Stack	#<br>************************************************<br>
+%! rtos-stats
+</pre></font>
+</font>
+</body>
+</html>
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/io.shtml b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/io.shtml
new file mode 100644
index 000000000..fd0697d2a
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/io.shtml
@@ -0,0 +1,28 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY>
+<font face="arial">
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<b>LED and LCD IO</b><br>
+
+<p>
+
+Use the check box to turn on or off the LED, enter text to display on the OLED display, then click "Update IO".
+
+
+<p>
+<form name="aForm" action="/io.shtml" method="get">
+%! led-io
+<p>
+<input type="submit" value="Update IO">
+</form>
+<br><p>
+</font>
+</body>
+</html>
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/runtime.shtml b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/runtime.shtml
new file mode 100644
index 000000000..67cae4657
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/runtime.shtml
@@ -0,0 +1,20 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY onLoad="window.setTimeout(&quot;location.href='runtime.shtml'&quot;,2000)">
+<font face="arial">
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br><p>
+<h2>Run-time statistics</h2>
+Page will refresh every 2 seconds.<p>
+<font face="courier"><pre>Task            Abs Time      % Time<br>****************************************<br>
+%! run-time
+</pre></font>
+</font>
+</body>
+</html>
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/stats.shtml b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/stats.shtml
new file mode 100644
index 000000000..d95a69340
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/stats.shtml
@@ -0,0 +1,41 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY>
+<font face="arial">
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br><p>
+<h2>Network statistics</h2>
+<table width="300" border="0">
+<tr><td align="left"><font face="courier"><pre>
+IP           Packets dropped
+             Packets received
+             Packets sent
+IP errors    IP version/header length
+             IP length, high byte
+             IP length, low byte
+             IP fragments
+             Header checksum
+             Wrong protocol
+ICMP	     Packets dropped
+             Packets received
+             Packets sent
+             Type errors
+TCP          Packets dropped
+             Packets received
+             Packets sent
+             Checksum errors
+             Data packets without ACKs
+             Resets
+             Retransmissions
+	     No connection avaliable
+	     Connection attempts to closed ports
+</pre></font></td><td><pre>%! net-stats
+</pre></table>
+</font>
+</body>
+</html>
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/tcp.shtml b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/tcp.shtml
new file mode 100644
index 000000000..41053679d
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fs/tcp.shtml
@@ -0,0 +1,21 @@
+<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
+<html>
+  <head>
+    <title>FreeRTOS.org uIP WEB server demo</title>
+  </head>
+  <BODY>
+<font face="arial">
+<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS.org Homepage</a> <b>|</b> <a href="io.shtml">IO</a>
+<br><p>
+<hr>
+<br>
+<h2>Network connections</h2>
+<p>
+<table>
+<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>
+%! tcp-connections
+</pre></font>
+</font>
+</body>
+</html>
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fsdata.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fsdata.c
new file mode 100644
index 000000000..7348902e7
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fsdata.c
@@ -0,0 +1,557 @@
+static const unsigned char data_404_html[] = {
+	/* /404.html */
+	0x2f, 0x34, 0x30, 0x34, 0x2e, 0x68, 0x74, 0x6d, 0x6c, 0,
+	0x3c, 0x68, 0x74, 0x6d, 0x6c, 0x3e, 0xa, 0x20, 0x20, 0x3c, 
+	0x62, 0x6f, 0x64, 0x79, 0x20, 0x62, 0x67, 0x63, 0x6f, 0x6c, 
+	0x6f, 0x72, 0x3d, 0x22, 0x77, 0x68, 0x69, 0x74, 0x65, 0x22, 
+	0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x63, 0x65, 0x6e, 
+	0x74, 0x65, 0x72, 0x3e, 0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 
+	0x20, 0x3c, 0x68, 0x31, 0x3e, 0x34, 0x30, 0x34, 0x20, 0x2d, 
+	0x20, 0x66, 0x69, 0x6c, 0x65, 0x20, 0x6e, 0x6f, 0x74, 0x20, 
+	0x66, 0x6f, 0x75, 0x6e, 0x64, 0x3c, 0x2f, 0x68, 0x31, 0x3e, 
+	0xa, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x3c, 0x68, 0x33, 
+	0x3e, 0x47, 0x6f, 0x20, 0x3c, 0x61, 0x20, 0x68, 0x72, 0x65, 
+	0x66, 0x3d, 0x22, 0x2f, 0x22, 0x3e, 0x68, 0x65, 0x72, 0x65, 
+	0x3c, 0x2f, 0x61, 0x3e, 0x20, 0x69, 0x6e, 0x73, 0x74, 0x65, 
+	0x61, 0x64, 0x2e, 0x3c, 0x2f, 0x68, 0x33, 0x3e, 0xa, 0x20, 
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+	0x72, 0x3e, 0xa, 0x20, 0x20, 0x3c, 0x2f, 0x62, 0x6f, 0x64, 
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+static const unsigned char data_io_shtml[] = {
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+
+static const unsigned char data_tcp_shtml[] = {
+	/* /tcp.shtml */
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+	0x74, 0x6d, 0x6c, 0x3e, 0xa, 0xa, 0};
+
+const struct httpd_fsdata_file file_404_html[] = {{NULL, data_404_html, data_404_html + 10, sizeof(data_404_html) - 10}};
+
+const struct httpd_fsdata_file file_index_html[] = {{file_404_html, data_index_html, data_index_html + 12, sizeof(data_index_html) - 12}};
+
+const struct httpd_fsdata_file file_index_shtml[] = {{file_index_html, data_index_shtml, data_index_shtml + 13, sizeof(data_index_shtml) - 13}};
+
+const struct httpd_fsdata_file file_io_shtml[] = {{file_index_shtml, data_io_shtml, data_io_shtml + 10, sizeof(data_io_shtml) - 10}};
+
+const struct httpd_fsdata_file file_runtime_shtml[] = {{file_io_shtml, data_runtime_shtml, data_runtime_shtml + 15, sizeof(data_runtime_shtml) - 15}};
+
+const struct httpd_fsdata_file file_stats_shtml[] = {{file_runtime_shtml, data_stats_shtml, data_stats_shtml + 13, sizeof(data_stats_shtml) - 13}};
+
+const struct httpd_fsdata_file file_tcp_shtml[] = {{file_stats_shtml, data_tcp_shtml, data_tcp_shtml + 11, sizeof(data_tcp_shtml) - 11}};
+
+#define HTTPD_FS_ROOT file_tcp_shtml
+
+#define HTTPD_FS_NUMFILES 7
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fsdata.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fsdata.h
new file mode 100644
index 000000000..52d35c265
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd-fsdata.h
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2001, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd-fsdata.h,v 1.1 2006/06/07 09:13:08 adam Exp $
+ */
+#ifndef __HTTPD_FSDATA_H__
+#define __HTTPD_FSDATA_H__
+
+#include "uip.h"
+
+struct httpd_fsdata_file {
+  const struct httpd_fsdata_file *next;
+  const char *name;
+  const char *data;
+  const int len;
+#ifdef HTTPD_FS_STATISTICS
+#if HTTPD_FS_STATISTICS == 1
+  u16_t count;
+#endif /* HTTPD_FS_STATISTICS */
+#endif /* HTTPD_FS_STATISTICS */
+};
+
+struct httpd_fsdata_file_noconst {
+  struct httpd_fsdata_file *next;
+  char *name;
+  char *data;
+  int len;
+#ifdef HTTPD_FS_STATISTICS
+#if HTTPD_FS_STATISTICS == 1
+  u16_t count;
+#endif /* HTTPD_FS_STATISTICS */
+#endif /* HTTPD_FS_STATISTICS */
+};
+
+#endif /* __HTTPD_FSDATA_H__ */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd.c
new file mode 100644
index 000000000..644cf16b7
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd.c
@@ -0,0 +1,346 @@
+/**
+ * \addtogroup apps
+ * @{
+ */
+
+/**
+ * \defgroup httpd Web server
+ * @{
+ * The uIP web server is a very simplistic implementation of an HTTP
+ * server. It can serve web pages and files from a read-only ROM
+ * filesystem, and provides a very small scripting language.
+
+ */
+
+/**
+ * \file
+ *         Web server
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ */
+
+
+/*
+ * Copyright (c) 2004, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * $Id: httpd.c,v 1.2 2006/06/11 21:46:38 adam Exp $
+ */
+
+#include "uip.h"
+#include "httpd.h"
+#include "httpd-fs.h"
+#include "httpd-cgi.h"
+#include "http-strings.h"
+
+#include <string.h>
+
+#define STATE_WAITING 0
+#define STATE_OUTPUT  1
+
+#define ISO_nl      0x0a
+#define ISO_space   0x20
+#define ISO_bang    0x21
+#define ISO_percent 0x25
+#define ISO_period  0x2e
+#define ISO_slash   0x2f
+#define ISO_colon   0x3a
+
+
+/*---------------------------------------------------------------------------*/
+static unsigned short
+generate_part_of_file(void *state)
+{
+  struct httpd_state *s = (struct httpd_state *)state;
+
+  if(s->file.len > uip_mss()) {
+    s->len = uip_mss();
+  } else {
+    s->len = s->file.len;
+  }
+  memcpy(uip_appdata, s->file.data, s->len);
+  
+  return s->len;
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(send_file(struct httpd_state *s))
+{
+  PSOCK_BEGIN(&s->sout);
+  
+  do {
+    PSOCK_GENERATOR_SEND(&s->sout, generate_part_of_file, s);
+    s->file.len -= s->len;
+    s->file.data += s->len;
+  } while(s->file.len > 0);
+      
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(send_part_of_file(struct httpd_state *s))
+{
+  PSOCK_BEGIN(&s->sout);
+
+  PSOCK_SEND(&s->sout, s->file.data, s->len);
+  
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static void
+next_scriptstate(struct httpd_state *s)
+{
+  char *p;
+  p = strchr(s->scriptptr, ISO_nl) + 1;
+  s->scriptlen -= (unsigned short)(p - s->scriptptr);
+  s->scriptptr = p;
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(handle_script(struct httpd_state *s))
+{
+  char *ptr;
+  
+  PT_BEGIN(&s->scriptpt);
+
+
+  while(s->file.len > 0) {
+
+    /* Check if we should start executing a script. */
+    if(*s->file.data == ISO_percent &&
+       *(s->file.data + 1) == ISO_bang) {
+      s->scriptptr = s->file.data + 3;
+      s->scriptlen = s->file.len - 3;
+      if(*(s->scriptptr - 1) == ISO_colon) {
+	httpd_fs_open(s->scriptptr + 1, &s->file);
+	PT_WAIT_THREAD(&s->scriptpt, send_file(s));
+      } else {
+	PT_WAIT_THREAD(&s->scriptpt,
+		       httpd_cgi(s->scriptptr)(s, s->scriptptr));
+      }
+      next_scriptstate(s);
+      
+      /* The script is over, so we reset the pointers and continue
+	 sending the rest of the file. */
+      s->file.data = s->scriptptr;
+      s->file.len = s->scriptlen;
+    } else {
+      /* See if we find the start of script marker in the block of HTML
+	 to be sent. */
+
+      if(s->file.len > uip_mss()) {
+	s->len = uip_mss();
+      } else {
+	s->len = s->file.len;
+      }
+
+      if(*s->file.data == ISO_percent) {
+	ptr = strchr(s->file.data + 1, ISO_percent);
+      } else {
+	ptr = strchr(s->file.data, ISO_percent);
+      }
+      if(ptr != NULL &&
+	 ptr != s->file.data) {
+	s->len = (int)(ptr - s->file.data);
+	if(s->len >= uip_mss()) {
+	  s->len = uip_mss();
+	}
+      }
+      PT_WAIT_THREAD(&s->scriptpt, send_part_of_file(s));
+      s->file.data += s->len;
+      s->file.len -= s->len;
+      
+    }
+  }
+  
+  PT_END(&s->scriptpt);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(send_headers(struct httpd_state *s, const char *statushdr))
+{
+  char *ptr;
+
+  PSOCK_BEGIN(&s->sout);
+
+  PSOCK_SEND_STR(&s->sout, statushdr);
+
+  ptr = strrchr(s->filename, ISO_period);
+  if(ptr == NULL) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_binary);
+  } else if(strncmp(http_html, ptr, 5) == 0 ||
+	    strncmp(http_shtml, ptr, 6) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_html);
+  } else if(strncmp(http_css, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_css);
+  } else if(strncmp(http_png, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_png);
+  } else if(strncmp(http_gif, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_gif);
+  } else if(strncmp(http_jpg, ptr, 4) == 0) {
+    PSOCK_SEND_STR(&s->sout, http_content_type_jpg);
+  } else {
+    PSOCK_SEND_STR(&s->sout, http_content_type_plain);
+  }
+  PSOCK_END(&s->sout);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(handle_output(struct httpd_state *s))
+{
+  char *ptr;
+  
+  PT_BEGIN(&s->outputpt);
+ 
+  if(!httpd_fs_open(s->filename, &s->file)) {
+    httpd_fs_open(http_404_html, &s->file);
+    strcpy(s->filename, http_404_html);
+    PT_WAIT_THREAD(&s->outputpt,
+		   send_headers(s,
+		   http_header_404));
+    PT_WAIT_THREAD(&s->outputpt,
+		   send_file(s));
+  } else {
+    PT_WAIT_THREAD(&s->outputpt,
+		   send_headers(s,
+		   http_header_200));
+    ptr = strchr(s->filename, ISO_period);
+    if(ptr != NULL && strncmp(ptr, http_shtml, 6) == 0) {
+      PT_INIT(&s->scriptpt);
+      PT_WAIT_THREAD(&s->outputpt, handle_script(s));
+    } else {
+      PT_WAIT_THREAD(&s->outputpt,
+		     send_file(s));
+    }
+  }
+  PSOCK_CLOSE(&s->sout);
+  PT_END(&s->outputpt);
+}
+/*---------------------------------------------------------------------------*/
+static
+PT_THREAD(handle_input(struct httpd_state *s))
+{
+  PSOCK_BEGIN(&s->sin);
+
+  PSOCK_READTO(&s->sin, ISO_space);
+
+  
+  if(strncmp(s->inputbuf, http_get, 4) != 0) {
+    PSOCK_CLOSE_EXIT(&s->sin);
+  }
+  PSOCK_READTO(&s->sin, ISO_space);
+
+  if(s->inputbuf[0] != ISO_slash) {
+    PSOCK_CLOSE_EXIT(&s->sin);
+  }
+
+  if(s->inputbuf[1] == ISO_space) {
+    strncpy(s->filename, http_index_html, sizeof(s->filename));
+  } else {
+
+    s->inputbuf[PSOCK_DATALEN(&s->sin) - 1] = 0;
+
+    /* Process any form input being sent to the server. */
+    {
+        extern void vApplicationProcessFormInput( char *pcInputString, long xInputLength );
+        vApplicationProcessFormInput( s->inputbuf, PSOCK_DATALEN(&s->sin) );
+    }
+
+    strncpy(s->filename, &s->inputbuf[0], sizeof(s->filename));
+  }
+
+  /*  httpd_log_file(uip_conn->ripaddr, s->filename);*/
+  
+  s->state = STATE_OUTPUT;
+
+  while(1) {
+    PSOCK_READTO(&s->sin, ISO_nl);
+
+    if(strncmp(s->inputbuf, http_referer, 8) == 0) {
+      s->inputbuf[PSOCK_DATALEN(&s->sin) - 2] = 0;
+      /*      httpd_log(&s->inputbuf[9]);*/
+    }
+  }
+  
+  PSOCK_END(&s->sin);
+}
+/*---------------------------------------------------------------------------*/
+static void
+handle_connection(struct httpd_state *s)
+{
+  handle_input(s);
+  if(s->state == STATE_OUTPUT) {
+    handle_output(s);
+  }
+}
+/*---------------------------------------------------------------------------*/
+void
+httpd_appcall(void)
+{
+  struct httpd_state *s = (struct httpd_state *)&(uip_conn->appstate);
+
+  if(uip_closed() || uip_aborted() || uip_timedout()) {
+  } else if(uip_connected()) {
+    PSOCK_INIT(&s->sin, s->inputbuf, sizeof(s->inputbuf) - 1);
+    PSOCK_INIT(&s->sout, s->inputbuf, sizeof(s->inputbuf) - 1);
+    PT_INIT(&s->outputpt);
+    s->state = STATE_WAITING;
+    /*    timer_set(&s->timer, CLOCK_SECOND * 100);*/
+    s->timer = 0;
+    handle_connection(s);
+  } else if(s != NULL) {
+    if(uip_poll()) {
+      ++s->timer;
+      if(s->timer >= 20) {
+	uip_abort();
+      }
+    } else {
+      s->timer = 0;
+    }
+    handle_connection(s);
+  } else {
+    uip_abort();
+  }
+}
+/*---------------------------------------------------------------------------*/
+/**
+ * \brief      Initialize the web server
+ *
+ *             This function initializes the web server and should be
+ *             called at system boot-up.
+ */
+void
+httpd_init(void)
+{
+  uip_listen(HTONS(80));
+}
+/*---------------------------------------------------------------------------*/
+/** @} */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd.h
new file mode 100644
index 000000000..7f7a6666e
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/httpd.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2001-2005, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack.
+ *
+ * $Id: httpd.h,v 1.2 2006/06/11 21:46:38 adam Exp $
+ *
+ */
+
+#ifndef __HTTPD_H__
+#define __HTTPD_H__
+
+#include "psock.h"
+#include "httpd-fs.h"
+
+struct httpd_state {
+  unsigned char timer;
+  struct psock sin, sout;
+  struct pt outputpt, scriptpt;
+  char inputbuf[50];
+  char filename[20];
+  char state;
+  struct httpd_fs_file file;
+  int len;
+  char *scriptptr;
+  int scriptlen;
+  
+  unsigned short count;
+};
+
+void httpd_init(void);
+void httpd_appcall(void);
+
+void httpd_log(char *msg);
+void httpd_log_file(u16_t *requester, char *file);
+
+#endif /* __HTTPD_H__ */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/makefsdata b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/makefsdata
new file mode 100644
index 000000000..8d2715a8a
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/makefsdata
@@ -0,0 +1,78 @@
+#!/usr/bin/perl
+
+open(OUTPUT, "> httpd-fsdata.c");
+
+chdir("httpd-fs");
+
+opendir(DIR, ".");
+@files =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
+closedir(DIR);
+
+foreach $file (@files) {  
+   
+    if(-d $file && $file !~ /^\./) {
+	print "Processing directory $file\n";
+	opendir(DIR, $file);
+	@newfiles =  grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
+	closedir(DIR);
+	printf "Adding files @newfiles\n";
+	@files = (@files, map { $_ = "$file/$_" } @newfiles);
+	next;
+    }
+}
+
+foreach $file (@files) {
+    if(-f $file) {
+	
+	print "Adding file $file\n";
+	
+	open(FILE, $file) || die "Could not open file $file\n";
+
+	$file =~ s-^-/-;
+	$fvar = $file;
+	$fvar =~ s-/-_-g;
+	$fvar =~ s-\.-_-g;
+	# for AVR, add PROGMEM here
+	print(OUTPUT "static const unsigned char data".$fvar."[] = {\n");
+	print(OUTPUT "\t/* $file */\n\t");
+	for($j = 0; $j < length($file); $j++) {
+	    printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));
+	}
+	printf(OUTPUT "0,\n");
+	
+	
+	$i = 0;        
+	while(read(FILE, $data, 1)) {
+	    if($i == 0) {
+		print(OUTPUT "\t");
+	    }
+	    printf(OUTPUT "%#02x, ", unpack("C", $data));
+	    $i++;
+	    if($i == 10) {
+		print(OUTPUT "\n");
+		$i = 0;
+	    }
+	}
+	print(OUTPUT "0};\n\n");
+	close(FILE);
+	push(@fvars, $fvar);
+	push(@pfiles, $file);
+    }
+}
+
+for($i = 0; $i < @fvars; $i++) {
+    $file = $pfiles[$i];
+    $fvar = $fvars[$i];
+
+    if($i == 0) {
+        $prevfile = "NULL";
+    } else {
+        $prevfile = "file" . $fvars[$i - 1];
+    }
+    print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");
+    print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");
+    print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");
+}
+
+print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");
+print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/makestrings b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/makestrings
new file mode 100644
index 000000000..8a13c6d29
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/makestrings
@@ -0,0 +1,40 @@
+#!/usr/bin/perl
+
+
+sub stringify {
+  my $name = shift(@_);
+  open(OUTPUTC, "> $name.c");
+  open(OUTPUTH, "> $name.h");
+  
+  open(FILE, "$name");
+  
+  while(<FILE>) {
+    if(/(.+) "(.+)"/) {
+      $var = $1;
+      $data = $2;
+      
+      $datan = $data;
+      $datan =~ s/\\r/\r/g;
+      $datan =~ s/\\n/\n/g;
+      $datan =~ s/\\01/\01/g;      
+      $datan =~ s/\\0/\0/g;
+      
+      printf(OUTPUTC "const char $var\[%d] = \n", length($datan) + 1);
+      printf(OUTPUTC "/* \"$data\" */\n");
+      printf(OUTPUTC "{");
+      for($j = 0; $j < length($datan); $j++) {
+	printf(OUTPUTC "%#02x, ", unpack("C", substr($datan, $j, 1)));
+      }
+      printf(OUTPUTC "};\n");
+      
+      printf(OUTPUTH "extern const char $var\[%d];\n", length($datan) + 1);
+      
+    }
+  }
+  close(OUTPUTC);
+  close(OUTPUTH);
+}
+stringify("http-strings");
+
+exit 0;
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/uIP_Task.c b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/uIP_Task.c
new file mode 100644
index 000000000..02e48058f
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/uIP_Task.c
@@ -0,0 +1,331 @@
+/*
+	FreeRTOS V5.4.2 - Copyright (C) 2009 Real Time Engineers Ltd.
+
+	This file is part of the FreeRTOS distribution.
+
+	FreeRTOS is free software; you can redistribute it and/or modify it	under
+	the terms of the GNU General Public License (version 2) as published by the
+	Free Software Foundation and modified by the FreeRTOS exception.
+	**NOTE** The exception to the GPL is included to allow you to distribute a
+	combined work that includes FreeRTOS without being obliged to provide the
+	source code for proprietary components outside of the FreeRTOS kernel.
+	Alternative commercial license and support terms are also available upon
+	request.  See the licensing section of http://www.FreeRTOS.org for full
+	license details.
+
+	FreeRTOS is distributed in the hope that it will be useful,	but WITHOUT
+	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+	FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+	more details.
+
+	You should have received a copy of the GNU General Public License along
+	with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59
+	Temple Place, Suite 330, Boston, MA  02111-1307  USA.
+
+
+	***************************************************************************
+	*                                                                         *
+	* Looking for a quick start?  Then check out the FreeRTOS eBook!          *
+	* See http://www.FreeRTOS.org/Documentation for details                   *
+	*                                                                         *
+	***************************************************************************
+
+	1 tab == 4 spaces!
+
+	Please ensure to read the configuration and relevant port sections of the
+	online documentation.
+
+	http://www.FreeRTOS.org - Documentation, latest information, license and
+	contact details.
+
+	http://www.SafeRTOS.com - A version that is certified for use in safety
+	critical systems.
+
+	http://www.OpenRTOS.com - Commercial support, development, porting,
+	licensing and training services.
+*/
+/* Standard includes. */
+#include <string.h>
+
+/* Scheduler includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+#include "lcd_message.h"
+
+/* uip includes. */
+#include "hw_types.h"
+
+#include "uip.h"
+#include "uip_arp.h"
+#include "httpd.h"
+#include "timer.h"
+#include "clock-arch.h"
+#include "hw_ethernet.h"
+#include "ethernet.h"
+#include "hw_memmap.h"
+#include "lmi_flash.h"
+#include "sysctl.h"
+
+/* Demo includes. */
+#include "emac.h"
+#include "partest.h"
+
+/*-----------------------------------------------------------*/
+
+/* IP address configuration. */
+#define uipIP_ADDR0		192
+#define uipIP_ADDR1		168
+#define uipIP_ADDR2		0
+#define uipIP_ADDR3		201
+
+/* Netmask configuration. */
+#define uipNETMASK_0	255
+#define uipNETMASK_1	255
+#define uipNETMASK_2	255
+#define uipNETMASK_3	0
+
+/* How long to wait before attempting to connect the MAC again. */
+#define uipINIT_WAIT    100
+
+/* Shortcut to the header within the Rx buffer. */
+#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])
+
+/* Standard constant. */
+#define uipTOTAL_FRAME_HEADER_SIZE	54
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Send the uIP buffer to the MAC.
+ */
+static void prvENET_Send(void);
+
+/*
+ * Setup the MAC address in the MAC itself, and in the uIP stack.
+ */
+static void prvSetMACAddress( void );
+
+/*
+ * Port functions required by the uIP stack.
+ */
+void clock_init( void );
+clock_time_t clock_time( void );
+
+/*-----------------------------------------------------------*/
+
+/* The semaphore used by the ISR to wake the uIP task. */
+extern xSemaphoreHandle xEMACSemaphore;
+
+/*-----------------------------------------------------------*/
+
+void clock_init(void)
+{
+	/* This is done when the scheduler starts. */
+}
+/*-----------------------------------------------------------*/
+
+clock_time_t clock_time( void )
+{
+	return xTaskGetTickCount();
+}
+
+
+void vuIP_Task( void *pvParameters )
+{
+portBASE_TYPE i;
+uip_ipaddr_t xIPAddr;
+struct timer periodic_timer, arp_timer;
+extern void ( vEMAC_ISR )( void );
+
+	/* Enable/Reset the Ethernet Controller */
+	SysCtlPeripheralEnable( SYSCTL_PERIPH_ETH );
+	SysCtlPeripheralReset( SYSCTL_PERIPH_ETH );
+
+	/* Create the semaphore used by the ISR to wake this task. */
+	vSemaphoreCreateBinary( xEMACSemaphore );
+
+	/* Initialise the uIP stack. */
+	timer_set( &periodic_timer, configTICK_RATE_HZ / 2 );
+	timer_set( &arp_timer, configTICK_RATE_HZ * 10 );
+	uip_init();
+	uip_ipaddr( xIPAddr, uipIP_ADDR0, uipIP_ADDR1, uipIP_ADDR2, uipIP_ADDR3 );
+	uip_sethostaddr( xIPAddr );
+	uip_ipaddr( xIPAddr, uipNETMASK_0, uipNETMASK_1, uipNETMASK_2, uipNETMASK_3 );
+    uip_setnetmask( xIPAddr );
+	httpd_init();
+
+	while( vInitEMAC() != pdPASS )
+    {
+        vTaskDelay( uipINIT_WAIT );
+    }
+	prvSetMACAddress();
+
+
+	for( ;; )
+	{
+		/* Is there received data ready to be processed? */
+		uip_len = uiGetEMACRxData( uip_buf );
+
+		if( uip_len > 0 )
+		{
+			/* Standard uIP loop taken from the uIP manual. */
+
+			if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
+			{
+				uip_arp_ipin();
+				uip_input();
+
+				/* If the above function invocation resulted in data that
+				should be sent out on the network, the global variable
+				uip_len is set to a value > 0. */
+				if( uip_len > 0 )
+				{
+					uip_arp_out();
+					prvENET_Send();
+				}
+			}
+			else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
+			{
+				uip_arp_arpin();
+
+				/* If the above function invocation resulted in data that
+				should be sent out on the network, the global variable
+				uip_len is set to a value > 0. */
+				if( uip_len > 0 )
+				{
+					prvENET_Send();
+				}
+			}
+		}
+		else
+		{
+			if( timer_expired( &periodic_timer ) )
+			{
+				timer_reset( &periodic_timer );
+				for( i = 0; i < UIP_CONNS; i++ )
+				{
+					uip_periodic( i );
+
+					/* If the above function invocation resulted in data that
+					should be sent out on the network, the global variable
+					uip_len is set to a value > 0. */
+					if( uip_len > 0 )
+					{
+						uip_arp_out();
+						prvENET_Send();
+					}
+				}
+
+				/* Call the ARP timer function every 10 seconds. */
+				if( timer_expired( &arp_timer ) )
+				{
+					timer_reset( &arp_timer );
+					uip_arp_timer();
+				}
+			}
+			else
+			{
+				/* We did not receive a packet, and there was no periodic
+				processing to perform.  Block for a fixed period.  If a packet
+				is received during this period we will be woken by the ISR
+				giving us the Semaphore. */
+				xSemaphoreTake( xEMACSemaphore, configTICK_RATE_HZ / 2 );
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvENET_Send(void)
+{
+    vInitialiseSend();
+    vIncrementTxLength( uip_len );
+    vSendBufferToMAC();
+    vInitialiseSend();
+    vIncrementTxLength( uip_len );
+    vSendBufferToMAC();
+}
+/*-----------------------------------------------------------*/
+
+static void prvSetMACAddress( void )
+{
+unsigned portLONG ulUser0, ulUser1;
+unsigned char pucMACArray[8];
+struct uip_eth_addr xAddr;
+
+	/* Get the device MAC address from flash */
+    FlashUserGet(&ulUser0, &ulUser1);
+
+	/* Convert the MAC address from flash into sequence of bytes. */
+    pucMACArray[0] = ((ulUser0 >>  0) & 0xff);
+    pucMACArray[1] = ((ulUser0 >>  8) & 0xff);
+    pucMACArray[2] = ((ulUser0 >> 16) & 0xff);
+    pucMACArray[3] = ((ulUser1 >>  0) & 0xff);
+    pucMACArray[4] = ((ulUser1 >>  8) & 0xff);
+    pucMACArray[5] = ((ulUser1 >> 16) & 0xff);
+
+	/* Program the MAC address. */
+    EthernetMACAddrSet(ETH_BASE, pucMACArray);
+
+	xAddr.addr[ 0 ] = pucMACArray[0];
+	xAddr.addr[ 1 ] = pucMACArray[1];
+	xAddr.addr[ 2 ] = pucMACArray[2];
+	xAddr.addr[ 3 ] = pucMACArray[3];
+	xAddr.addr[ 4 ] = pucMACArray[4];
+	xAddr.addr[ 5 ] = pucMACArray[5];
+	uip_setethaddr( xAddr );
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationProcessFormInput( portCHAR *pcInputString, portBASE_TYPE xInputLength )
+{
+char *c, *pcText;
+static portCHAR cMessageForDisplay[ 32 ];
+extern xQueueHandle xOLEDQueue;
+xOLEDMessage xOLEDMessage;
+
+	/* Process the form input sent by the IO page of the served HTML. */
+
+	c = strstr( pcInputString, "?" );
+
+    if( c )
+    {
+		/* Turn LED's on or off in accordance with the check box status. */
+		if( strstr( c, "LED0=1" ) != NULL )
+		{
+			vParTestSetLED( 0, 1 );
+		}
+		else
+		{
+			vParTestSetLED( 0, 0 );
+		}
+
+		/* Find the start of the text to be displayed on the LCD. */
+        pcText = strstr( c, "LCD=" );
+        pcText += strlen( "LCD=" );
+
+        /* Terminate the file name for further processing within uIP. */
+        *c = 0x00;
+
+        /* Terminate the LCD string. */
+        c = strstr( pcText, " " );
+        if( c != NULL )
+        {
+            *c = 0x00;
+        }
+
+        /* Add required spaces. */
+        while( ( c = strstr( pcText, "+" ) ) != NULL )
+        {
+            *c = ' ';
+        }
+
+        /* Write the message to the LCD. */
+		strcpy( cMessageForDisplay, pcText );
+		xOLEDMessage.pcMessage = cMessageForDisplay;
+        xQueueSend( xOLEDQueue, &xOLEDMessage, portMAX_DELAY );
+    }
+}
+
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/uip-conf.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/uip-conf.h
new file mode 100644
index 000000000..664077d89
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/uip-conf.h
@@ -0,0 +1,159 @@
+/**
+ * \addtogroup uipopt
+ * @{
+ */
+
+/**
+ * \name Project-specific configuration options
+ * @{
+ *
+ * uIP has a number of configuration options that can be overridden
+ * for each project. These are kept in a project-specific uip-conf.h
+ * file and all configuration names have the prefix UIP_CONF.
+ */
+
+/*
+ * Copyright (c) 2006, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $
+ */
+
+/**
+ * \file
+ *         An example uIP configuration file
+ * \author
+ *         Adam Dunkels <adam@sics.se>
+ */
+
+#ifndef __UIP_CONF_H__
+#define __UIP_CONF_H__
+
+#include <stdint.h>
+
+/**
+ * 8 bit datatype
+ *
+ * This typedef defines the 8-bit type used throughout uIP.
+ *
+ * \hideinitializer
+ */
+typedef uint8_t u8_t;
+
+/**
+ * 16 bit datatype
+ *
+ * This typedef defines the 16-bit type used throughout uIP.
+ *
+ * \hideinitializer
+ */
+typedef uint16_t u16_t;
+
+/**
+ * Statistics datatype
+ *
+ * This typedef defines the dataype used for keeping statistics in
+ * uIP.
+ *
+ * \hideinitializer
+ */
+typedef unsigned short uip_stats_t;
+
+/**
+ * Maximum number of TCP connections.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_MAX_CONNECTIONS 40
+
+/**
+ * Maximum number of listening TCP ports.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_MAX_LISTENPORTS 40
+
+/**
+ * uIP buffer size.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_BUFFER_SIZE     1500
+
+/**
+ * CPU byte order.
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_BYTE_ORDER      LITTLE_ENDIAN
+
+/**
+ * Logging on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_LOGGING         0
+
+/**
+ * UDP support on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_UDP             0
+
+/**
+ * UDP checksums on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_UDP_CHECKSUMS   1
+
+/**
+ * uIP statistics on or off
+ *
+ * \hideinitializer
+ */
+#define UIP_CONF_STATISTICS      1
+
+/* Here we include the header file for the application(s) we use in
+   our project. */
+/*#include "smtp.h"*/
+/*#include "hello-world.h"*/
+/*#include "telnetd.h"*/
+#include "webserver.h"
+/*#include "dhcpc.h"*/
+/*#include "resolv.h"*/
+/*#include "webclient.h"*/
+
+#define UIP_CONF_EXTERNAL_BUFFER
+
+#endif /* __UIP_CONF_H__ */
+
+/** @} */
+/** @} */
diff --git a/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/webserver.h b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/webserver.h
new file mode 100644
index 000000000..1acb290b8
--- /dev/null
+++ b/Demo/CORTEX_MPU_LM3Sxxxx_Rowley/webserver/webserver.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2002, Adam Dunkels.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ *    copyright notice, this list of conditions and the following
+ *    disclaimer in the documentation and/or other materials provided
+ *    with the distribution.
+ * 3. The name of the author may not be used to endorse or promote
+ *    products derived from this software without specific prior
+ *    written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * This file is part of the uIP TCP/IP stack
+ *
+ * $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $
+ *
+ */
+#ifndef __WEBSERVER_H__
+#define __WEBSERVER_H__
+
+#include "httpd.h"
+
+typedef struct httpd_state uip_tcp_appstate_t;
+/* UIP_APPCALL: the name of the application function. This function
+   must return void and take no arguments (i.e., C type "void
+   appfunc(void)"). */
+#ifndef UIP_APPCALL
+#define UIP_APPCALL     httpd_appcall
+#endif
+
+
+#endif /* __WEBSERVER_H__ */