From: Paul Fertser Date: Fri, 15 Aug 2014 16:34:35 +0000 (+0400) Subject: tcl/target/imx6: add yet another SJC tapid X-Git-Tag: v0.9.0-rc1~292 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b171c7ab16e1cbad3ca2a6a2cb0a26a3da735424;p=openocd tcl/target/imx6: add yet another SJC tapid This is for mx6q TO1.1. Change-Id: Id6af2ed232fc19be9bf49eb6d2df0004c6668698 Reported-by: Fabio Estevam Signed-off-by: Paul Fertser Reviewed-on: http://openocd.zylin.com/2253 Tested-by: jenkins Reviewed-by: Andreas Fritiofson --- diff --git a/tcl/target/imx6.cfg b/tcl/target/imx6.cfg index afdf9614..11c2134c 100644 --- a/tcl/target/imx6.cfg +++ b/tcl/target/imx6.cfg @@ -27,10 +27,11 @@ if { [info exists SJC_TAPID] } { } set _SJC_TAPID2 0x2191c01d set _SJC_TAPID3 0x2191e01d +set _SJC_TAPID4 0x1191c01d jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \ -expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2 \ - -expected-id $_SJC_TAPID3 + -expected-id $_SJC_TAPID3 -expected-id $_SJC_TAPID4 # GDB target: Cortex-A9, using DAP, configuring only one core # Base addresses of cores: