From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Wed, 20 May 2009 16:30:33 +0000 (-0400)
Subject: 85xx: Add UART1 support for MPC8569MDS
X-Git-Tag: v2009.06~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b2aab386e957ba684d4f2a466bfaa91770e5058a;p=u-boot

85xx: Add UART1 support for MPC8569MDS

MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 129c58c5f7..7e6cfb7373 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -77,6 +77,12 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
 	{2,  3, 2, 0, 1}, /* ENET2_GRXCLK              */
 	{2,  2, 1, 0, 2}, /* ENET2_GTXCLK              */
 
+	/* UART1 is muxed with QE PortF bit [9-12].*/
+	{5, 12, 2, 0, 3}, /* UART1_SIN */
+	{5, 9,  1, 0, 3}, /* UART1_SOUT */
+	{5, 10, 2, 0, 3}, /* UART1_CTS_B */
+	{5, 11, 1, 0, 2}, /* UART1_RTS_B */
+
 	{0,  0, 0, 0, QE_IOP_TAB_END} /* END of table */
 };