From: Duncan Laurie <dlaurie@chromium.org>
Date: Sat, 3 Nov 2012 11:41:35 +0000 (+0000)
Subject: x86: Issue SMI to finalize Coreboot in final stage
X-Git-Tag: v2013.01-rc2~73^2~10
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b83058cd235acca426b1964e3aa394f7ecf16ccc;p=u-boot

x86: Issue SMI to finalize Coreboot in final stage

This will write magic value to APMC command port which
will trigger an SMI and cause coreboot to lock down
the ME, chipset, and CPU.

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
---

diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index f73977f219..1c8a007d16 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -118,5 +118,9 @@ int board_final_cleanup(void)
 		enable_caches();
 	}
 
+	/* Issue SMI to Coreboot to lock down ME and registers */
+	printf("Finalizing Coreboot\n");
+	outb(0xcb, 0xb2);
+
 	return 0;
 }