From: Jagannadha Sutradharudu Teki Date: Sat, 11 Jan 2014 09:55:04 +0000 (+0530) Subject: sf: Add CONFIG_SF_DUAL_FLASH X-Git-Tag: v2014.01-rc3~2^2~2 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b902e07cea51e33fbe36453f7b1412dd7bbe760f;p=u-boot sf: Add CONFIG_SF_DUAL_FLASH This config will use for defining greater than single flash support. currently - DUAL_STACKED and DUAL_PARALLEL. Signed-off-by: Jagannadha Sutradharudu Teki --- diff --git a/README b/README index a0646c3665..aea82be5b3 100644 --- a/README +++ b/README @@ -2756,6 +2756,12 @@ CBFS (Coreboot Filesystem) support Define this option to use the Bank addr/Extended addr support on SPI flashes which has size > 16Mbytes. + CONFIG_SF_DUAL_FLASH Dual flash memories + + Define this option to use dual flash support where two flash + memories can be connected with a given cs line. + currently Xilinx Zynq qspi support these type of connections. + - SystemACE Support: CONFIG_SYSTEMACE diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c index c780a81c59..664e86082b 100644 --- a/drivers/mtd/spi/sf.c +++ b/drivers/mtd/spi/sf.c @@ -18,9 +18,10 @@ static int spi_flash_read_write(struct spi_slave *spi, unsigned long flags = SPI_XFER_BEGIN; int ret; +#ifdef CONFIG_SF_DUAL_FLASH if (spi->flags & SPI_XFER_U_PAGE) flags |= SPI_XFER_U_PAGE; - +#endif if (data_len == 0) flags |= SPI_XFER_END; diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 843f379ef1..1f1bb36065 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -131,6 +131,7 @@ static int spi_flash_bank(struct spi_flash *flash, u32 offset) } #endif +#ifdef CONFIG_SF_DUAL_FLASH static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr) { switch (flash->dual_flash) { @@ -150,6 +151,7 @@ static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr) break; } } +#endif int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) { @@ -167,9 +169,10 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) check_status = poll_bit; } +#ifdef CONFIG_SF_DUAL_FLASH if (spi->flags & SPI_XFER_U_PAGE) flags |= SPI_XFER_U_PAGE; - +#endif ret = spi_xfer(spi, 8, &cmd, NULL, flags); if (ret) { debug("SF: fail to read %s status register\n", @@ -257,9 +260,10 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) while (len) { erase_addr = offset; +#ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash > SF_SINGLE_FLASH) spi_flash_dual_flash(flash, &erase_addr); - +#endif #ifdef CONFIG_SPI_FLASH_BAR ret = spi_flash_bank(flash, erase_addr); if (ret < 0) @@ -298,9 +302,10 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, for (actual = 0; actual < len; actual += chunk_len) { write_addr = offset; +#ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash > SF_SINGLE_FLASH) spi_flash_dual_flash(flash, &write_addr); - +#endif #ifdef CONFIG_SPI_FLASH_BAR ret = spi_flash_bank(flash, write_addr); if (ret < 0) @@ -383,9 +388,10 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, while (len) { read_addr = offset; +#ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash > SF_SINGLE_FLASH) spi_flash_dual_flash(flash, &read_addr); - +#endif #ifdef CONFIG_SPI_FLASH_BAR bank_sel = spi_flash_bank(flash, read_addr); if (bank_sel < 0) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 48de7c1986..bc3cf6cc64 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -150,8 +150,10 @@ static struct spi_flash *spi_flash_validate_params(struct spi_slave *spi, flash->page_size = ((ext_jedec == 0x4d00) ? 512 : 256) << flash->shift; flash->sector_size = params->sector_size << flash->shift; flash->size = flash->sector_size * params->nr_sectors << flash->shift; +#ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1; +#endif /* Compute erase sector and command */ if (params->flags & SECT_4K) {