From: Tomas Vanek Date: Thu, 1 Mar 2018 21:57:08 +0000 (+0100) Subject: flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .inc X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b941e2e727387c6c8880990b829a48b289dfc90b;p=openocd flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .inc Flash loaders refactored to the new style - use generated .inc instead of hexadecimal machine code in the flash driver source. Change-Id: If65a2099589e210f9450819b467d67819fd841fc Signed-off-by: Tomas Vanek Reviewed-on: http://openocd.zylin.com/4439 Tested-by: jenkins Reviewed-by: Matthias Welwarsky --- diff --git a/contrib/loaders/flash/stm32/Makefile b/contrib/loaders/flash/stm32/Makefile new file mode 100644 index 00000000..b58b4128 --- /dev/null +++ b/contrib/loaders/flash/stm32/Makefile @@ -0,0 +1,28 @@ +BIN2C = ../../../../src/helper/bin2char.sh + +CROSS_COMPILE ?= arm-none-eabi- + +CC=$(CROSS_COMPILE)gcc +OBJCOPY=$(CROSS_COMPILE)objcopy +OBJDUMP=$(CROSS_COMPILE)objdump + +CFLAGS = -static -nostartfiles -mlittle-endian -Wa,-EL + +all: stm32f1x.inc stm32f2x.inc stm32h7x.inc stm32l4x.inc stm32lx.inc + +.PHONY: clean + +%.elf: %.S + $(CC) $(CFLAGS) $< -o $@ + +%.lst: %.elf + $(OBJDUMP) -S $< > $@ + +%.bin: %.elf + $(OBJCOPY) -Obinary $< $@ + +%.inc: %.bin + $(BIN2C) < $< > $@ + +clean: + -rm -f *.elf *.lst *.bin *.inc diff --git a/contrib/loaders/flash/stm32/stm32f1x.S b/contrib/loaders/flash/stm32/stm32f1x.S new file mode 100644 index 00000000..7b64c67a --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32f1x.S @@ -0,0 +1,77 @@ +/*************************************************************************** + * Copyright (C) 2011 by Andreas Fritiofson * + * andreas.fritiofson@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + ***************************************************************************/ + + .text + .syntax unified + .cpu cortex-m0 + .thumb + + /* Params: + * r0 - flash base (in), status (out) + * r1 - count (halfword-16bit) + * r2 - workarea start + * r3 - workarea end + * r4 - target address + * Clobbered: + * r5 - rp + * r6 - wp, tmp + * r7 - tmp + */ + +#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */ + + .thumb_func + .global _start +_start: +wait_fifo: + ldr r6, [r2, #0] /* read wp */ + cmp r6, #0 /* abort if wp == 0 */ + beq exit + ldr r5, [r2, #4] /* read rp */ + cmp r5, r6 /* wait until rp != wp */ + beq wait_fifo + ldrh r6, [r5] /* "*target_address++ = *rp++" */ + strh r6, [r4] + adds r5, #2 + adds r4, #2 +busy: + ldr r6, [r0, #STM32_FLASH_SR_OFFSET] /* wait until BSY flag is reset */ + movs r7, #1 + tst r6, r7 + bne busy + movs r7, #0x14 /* check the error bits */ + tst r6, r7 + bne error + cmp r5, r3 /* wrap rp at end of buffer */ + bcc no_wrap + mov r5, r2 + adds r5, #8 +no_wrap: + str r5, [r2, #4] /* store rp */ + subs r1, r1, #1 /* decrement halfword count */ + cmp r1, #0 + beq exit /* loop if not done */ + b wait_fifo +error: + movs r0, #0 + str r0, [r2, #4] /* set rp = 0 on error */ +exit: + mov r0, r6 /* return status in r0 */ + bkpt #0 diff --git a/contrib/loaders/flash/stm32/stm32f1x.inc b/contrib/loaders/flash/stm32/stm32f1x.inc new file mode 100644 index 00000000..7f9454b9 --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32f1x.inc @@ -0,0 +1,5 @@ +/* Autogenerated with ../../../../src/helper/bin2char.sh */ +0x16,0x68,0x00,0x2e,0x18,0xd0,0x55,0x68,0xb5,0x42,0xf9,0xd0,0x2e,0x88,0x26,0x80, +0x02,0x35,0x02,0x34,0xc6,0x68,0x01,0x27,0x3e,0x42,0xfb,0xd1,0x14,0x27,0x3e,0x42, +0x08,0xd1,0x9d,0x42,0x01,0xd3,0x15,0x46,0x08,0x35,0x55,0x60,0x01,0x39,0x00,0x29, +0x02,0xd0,0xe5,0xe7,0x00,0x20,0x50,0x60,0x30,0x46,0x00,0xbe, diff --git a/contrib/loaders/flash/stm32/stm32f2x.S b/contrib/loaders/flash/stm32/stm32f2x.S new file mode 100644 index 00000000..f6f5b30a --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32f2x.S @@ -0,0 +1,85 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * Copyright (C) 2011 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + ***************************************************************************/ + + .text + .syntax unified + .cpu cortex-m3 + .thumb + +/* + * Params : + * r0 = workarea start, status (out) + * r1 = workarea end + * r2 = target address + * r3 = count (16bit words) + * r4 = flash base + * + * Clobbered: + * r6 - temp + * r7 - rp + * r8 - wp, tmp + */ + +#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */ +#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register in FLASH struct */ + +#define STM32_PROG16 0x101 /* PG | PSIZE_16*/ + + .thumb_func + .global _start +_start: +wait_fifo: + ldr r8, [r0, #0] /* read wp */ + cmp r8, #0 /* abort if wp == 0 */ + beq exit + ldr r7, [r0, #4] /* read rp */ + cmp r7, r8 /* wait until rp != wp */ + beq wait_fifo + + ldr r6, =STM32_PROG16 + str r6, [r4, #STM32_FLASH_CR_OFFSET] + ldrh r6, [r7], #0x02 /* read one half-word from src, increment ptr */ + strh r6, [r2], #0x02 /* write one half-word from src, increment ptr */ + dsb +busy: + ldr r6, [r4, #STM32_FLASH_SR_OFFSET] + tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */ + bne busy /* wait more... */ + tst r6, #0xf0 /* PGSERR | PGPERR | PGAERR | WRPERR */ + bne error /* fail... */ + + cmp r7, r1 /* wrap rp at end of buffer */ + it cs + addcs r7, r0, #8 /* skip loader args */ + str r7, [r0, #4] /* store rp */ + subs r3, r3, #1 /* decrement halfword count */ + cbz r3, exit /* loop if not done */ + b wait_fifo +error: + movs r1, #0 + str r1, [r0, #4] /* set rp = 0 on error */ +exit: + mov r0, r6 /* return status in r0 */ + bkpt #0x00 + + .pool diff --git a/contrib/loaders/flash/stm32/stm32f2x.inc b/contrib/loaders/flash/stm32/stm32f2x.inc new file mode 100644 index 00000000..3da2940e --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32f2x.inc @@ -0,0 +1,6 @@ +/* Autogenerated with ../../../../src/helper/bin2char.sh */ +0xd0,0xf8,0x00,0x80,0xb8,0xf1,0x00,0x0f,0x1b,0xd0,0x47,0x68,0x47,0x45,0xf7,0xd0, +0x0d,0x4e,0x26,0x61,0x37,0xf8,0x02,0x6b,0x22,0xf8,0x02,0x6b,0xbf,0xf3,0x4f,0x8f, +0xe6,0x68,0x16,0xf4,0x80,0x3f,0xfb,0xd1,0x16,0xf0,0xf0,0x0f,0x07,0xd1,0x8f,0x42, +0x28,0xbf,0x00,0xf1,0x08,0x07,0x47,0x60,0x01,0x3b,0x13,0xb1,0xe0,0xe7,0x00,0x21, +0x41,0x60,0x30,0x46,0x00,0xbe,0x00,0x00,0x01,0x01,0x00,0x00, diff --git a/contrib/loaders/flash/stm32/stm32h7x.S b/contrib/loaders/flash/stm32/stm32h7x.S new file mode 100644 index 00000000..f910bfbb --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32h7x.S @@ -0,0 +1,108 @@ +/*************************************************************************** + * Copyright (C) 2017 by STMicroelectronics * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc. * + ***************************************************************************/ + + .text + .syntax unified + .cpu cortex-m7 + .thumb + +/* + * Code limitations: + * The workarea must have size multiple of 4 bytes, since R/W + * operations are all at 32 bits. + * The workarea must be big enough to contain 32 bytes of data, + * thus the minimum size is (rp, wp, data) = 4 + 4 + 32 = 40 bytes. + * To benefit from concurrent host write-to-buffer and target + * write-to-flash, the workarea must be way bigger than the minimum. + */ + +/* + * Params : + * r0 = workarea start, status (out) + * r1 = workarea end + * r2 = target address + * r3 = count (256 bit words) + * r4 = flash reg base + * + * Clobbered: + * r5 - rp + * r6 - wp, status, tmp + * r7 - loop index, tmp + */ + +#define STM32_FLASH_CR_OFFSET 0x0C /* offset of CR register in FLASH struct */ +#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */ +#define STM32_CR_PROG 0x00000032 /* PSIZE64 | PG */ +#define STM32_SR_BUSY_MASK 0x00000001 /* BSY */ +#define STM32_SR_ERROR_MASK 0x03ee0000 /* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR + | INCERR | STRBERR | PGSERR | WRPERR */ + + .thumb_func + .global _start +_start: + ldr r5, [r0, #4] /* read rp */ + +wait_fifo: + ldr r6, [r0, #0] /* read wp */ + cbz r6, exit /* abort if wp == 0, status = 0 */ + subs r6, r6, r5 /* number of bytes available for read in r6 */ + ittt mi /* if wrapped around */ + addmi r6, r1 /* add size of buffer */ + submi r6, r0 + submi r6, #8 + cmp r6, #32 /* wait until 32 bytes are available */ + bcc wait_fifo + + mov r6, #STM32_CR_PROG + str r6, [r4, #STM32_FLASH_CR_OFFSET] + + mov r7, #8 /* program by 8 words = 32 bytes */ +write_flash: + ldr r6, [r5], #0x04 /* read one word from src, increment ptr */ + str r6, [r2], #0x04 /* write one word to dst, increment ptr */ + dsb + cmp r5, r1 /* if rp >= end of buffer ... */ + it cs + addcs r5, r0, #8 /* ... then wrap at buffer start */ + subs r7, r7, #1 /* decrement loop index */ + bne write_flash /* loop if not done */ + +busy: + ldr r6, [r4, #STM32_FLASH_SR_OFFSET] + tst r6, #STM32_SR_BUSY_MASK + bne busy /* operation in progress, wait ... */ + + ldr r7, =STM32_SR_ERROR_MASK + tst r6, r7 + bne error /* fail... */ + + str r5, [r0, #4] /* store rp */ + subs r3, r3, #1 /* decrement count */ + bne wait_fifo /* loop if not done */ + b exit + +error: + movs r7, #0 + str r7, [r0, #4] /* set rp = 0 on error */ + +exit: + mov r0, r6 /* return status in r0 */ + bkpt #0x00 + + .pool + diff --git a/contrib/loaders/flash/stm32/stm32h7x.inc b/contrib/loaders/flash/stm32/stm32h7x.inc new file mode 100644 index 00000000..174354c7 --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32h7x.inc @@ -0,0 +1,7 @@ +/* Autogenerated with ../../../../src/helper/bin2char.sh */ +0x45,0x68,0x06,0x68,0x26,0xb3,0x76,0x1b,0x42,0xbf,0x76,0x18,0x36,0x1a,0x08,0x3e, +0x20,0x2e,0xf6,0xd3,0x4f,0xf0,0x32,0x06,0xe6,0x60,0x4f,0xf0,0x08,0x07,0x55,0xf8, +0x04,0x6b,0x42,0xf8,0x04,0x6b,0xbf,0xf3,0x4f,0x8f,0x8d,0x42,0x28,0xbf,0x00,0xf1, +0x08,0x05,0x01,0x3f,0xf3,0xd1,0x26,0x69,0x16,0xf0,0x01,0x0f,0xfb,0xd1,0x05,0x4f, +0x3e,0x42,0x03,0xd1,0x45,0x60,0x01,0x3b,0xdb,0xd1,0x01,0xe0,0x00,0x27,0x47,0x60, +0x30,0x46,0x00,0xbe,0x00,0x00,0xee,0x03, diff --git a/contrib/loaders/flash/stm32/stm32l4x.S b/contrib/loaders/flash/stm32/stm32l4x.S new file mode 100644 index 00000000..9c49016d --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32l4x.S @@ -0,0 +1,92 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * Copyright (C) 2011 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * + * Copyright (C) 2015 Uwe Bonnes * + * bon@elektron.ikp.physik.tu-darmstadt.de * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc. * + ***************************************************************************/ + + .text + .syntax unified + .cpu cortex-m4 + .thumb + +/* + * Params : + * r0 = workarea start, status (out) + * r1 = workarea end + * r2 = target address + * r3 = count (64bit words) + * r4 = flash base + * + * Clobbered: + * r5 - rp + * r6/7 - temp (64-bit) + * r8 - wp, tmp + */ + +#define STM32_FLASH_CR_OFFSET 0x14 /* offset of CR register in FLASH struct */ +#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */ + +#define STM32_PROG 0x1 /* PG */ + + .thumb_func + .global _start +_start: +wait_fifo: + ldr r8, [r0, #0] /* read wp */ + cmp r8, #0 /* abort if wp == 0 */ + beq exit + ldr r5, [r0, #4] /* read rp */ + subs r6, r8, r5 /* number of bytes available for read in r6*/ + itt mi /* if wrapped around*/ + addmi r6, r1 /* add size of buffer */ + submi r6, r0 + cmp r6, #8 /* wait until 8 bytes are available */ + bcc wait_fifo + + ldr r6, =STM32_PROG + str r6, [r4, #STM32_FLASH_CR_OFFSET] + ldrd r6, [r5], #0x08 /* read one word from src, increment ptr */ + strd r6, [r2], #0x08 /* write one word to dst, increment ptr */ + dsb +busy: + ldr r6, [r4, #STM32_FLASH_SR_OFFSET] + tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */ + bne busy /* wait more... */ + tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/ + bne error /* fail... */ + + cmp r5, r1 /* wrap rp at end of buffer */ + it cs + addcs r5, r0, #8 /* skip loader args */ + str r5, [r0, #4] /* store rp */ + subs r3, r3, #1 /* decrement dword count */ + cbz r3, exit /* loop if not done */ + b wait_fifo +error: + movs r1, #0 + str r1, [r0, #4] /* set rp = 0 on error */ +exit: + mov r0, r6 /* return status in r0 */ + bkpt #0x00 + + .pool + diff --git a/contrib/loaders/flash/stm32/stm32l4x.inc b/contrib/loaders/flash/stm32/stm32l4x.inc new file mode 100644 index 00000000..4065d14e --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32l4x.inc @@ -0,0 +1,7 @@ +/* Autogenerated with ../../../../src/helper/bin2char.sh */ +0xd0,0xf8,0x00,0x80,0xb8,0xf1,0x00,0x0f,0x20,0xd0,0x45,0x68,0xb8,0xeb,0x05,0x06, +0x44,0xbf,0x76,0x18,0x36,0x1a,0x08,0x2e,0xf2,0xd3,0x0d,0x4e,0x66,0x61,0xf5,0xe8, +0x02,0x67,0xe2,0xe8,0x02,0x67,0xbf,0xf3,0x4f,0x8f,0x26,0x69,0x16,0xf4,0x80,0x3f, +0xfb,0xd1,0x16,0xf0,0xfa,0x0f,0x07,0xd1,0x8d,0x42,0x28,0xbf,0x00,0xf1,0x08,0x05, +0x45,0x60,0x01,0x3b,0x13,0xb1,0xdb,0xe7,0x00,0x21,0x41,0x60,0x30,0x46,0x00,0xbe, +0x01,0x00,0x00,0x00, diff --git a/contrib/loaders/flash/stm32/stm32lx.S b/contrib/loaders/flash/stm32/stm32lx.S new file mode 100644 index 00000000..bcae7a46 --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32lx.S @@ -0,0 +1,63 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * Copyright (C) 2011 Øyvind Harboe * + * oyvind.harboe@zylin.com * + * * + * Copyright (C) 2011 Clement Burin des Roziers * + * clement.burin-des-roziers@hikob.com * + * * + * Copyright (C) 2017 Armin van der Togt * + * armin@otheruse.nl * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + ***************************************************************************/ + + + .text + .syntax unified + .cpu cortex-m0 + .thumb + +/* + r0 - destination address + r1 - source address + r2 - count +*/ + + .thumb_func + .global _start +_start: + // r2 = source + count * 4 + lsls r2, r2, #2 + adds r2, r1, r2 + // Go to compare + b test_done +write_word: + // load word from address in r1 and increase r1 by 4 + ldmia r1!, {r3} + // store word to address in r0 and increase r0 by 4 + stmia r0!, {r3} +test_done: + // compare r1 and r2 + cmp r1, r2 + // loop if not equal + bne write_word + + // Set breakpoint to exit + bkpt #0x00 + diff --git a/contrib/loaders/flash/stm32/stm32lx.inc b/contrib/loaders/flash/stm32/stm32lx.inc new file mode 100644 index 00000000..eaaf1848 --- /dev/null +++ b/contrib/loaders/flash/stm32/stm32lx.inc @@ -0,0 +1,2 @@ +/* Autogenerated with ../../../../src/helper/bin2char.sh */ +0x92,0x00,0x8a,0x18,0x01,0xe0,0x08,0xc9,0x08,0xc0,0x91,0x42,0xfb,0xd1,0x00,0xbe, diff --git a/contrib/loaders/flash/stm32f1x.S b/contrib/loaders/flash/stm32f1x.S deleted file mode 100644 index 5ce463d1..00000000 --- a/contrib/loaders/flash/stm32f1x.S +++ /dev/null @@ -1,76 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2011 by Andreas Fritiofson * - * andreas.fritiofson@gmail.com * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - - .text - .syntax unified - .cpu cortex-m0 - .thumb - .thumb_func - .global write - - /* Params: - * r0 - flash base (in), status (out) - * r1 - count (halfword-16bit) - * r2 - workarea start - * r3 - workarea end - * r4 - target address - * Clobbered: - * r5 - rp - * r6 - wp, tmp - * r7 - tmp - */ - -#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */ - -wait_fifo: - ldr r6, [r2, #0] /* read wp */ - cmp r6, #0 /* abort if wp == 0 */ - beq exit - ldr r5, [r2, #4] /* read rp */ - cmp r5, r6 /* wait until rp != wp */ - beq wait_fifo - ldrh r6, [r5] /* "*target_address++ = *rp++" */ - strh r6, [r4] - adds r5, #2 - adds r4, #2 -busy: - ldr r6, [r0, #STM32_FLASH_SR_OFFSET] /* wait until BSY flag is reset */ - movs r7, #1 - tst r6, r7 - bne busy - movs r7, #0x14 /* check the error bits */ - tst r6, r7 - bne error - cmp r5, r3 /* wrap rp at end of buffer */ - bcc no_wrap - mov r5, r2 - adds r5, #8 -no_wrap: - str r5, [r2, #4] /* store rp */ - subs r1, r1, #1 /* decrement halfword count */ - cmp r1, #0 - beq exit /* loop if not done */ - b wait_fifo -error: - movs r0, #0 - str r0, [r2, #4] /* set rp = 0 on error */ -exit: - mov r0, r6 /* return status in r0 */ - bkpt #0 diff --git a/contrib/loaders/flash/stm32f2x.S b/contrib/loaders/flash/stm32f2x.S deleted file mode 100644 index 0dd12231..00000000 --- a/contrib/loaders/flash/stm32f2x.S +++ /dev/null @@ -1,81 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2010 by Spencer Oliver * - * spen@spen-soft.co.uk * - * * - * Copyright (C) 2011 Øyvind Harboe * - * oyvind.harboe@zylin.com * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - - .text - .syntax unified - .cpu cortex-m3 - .thumb - .thumb_func - -/* - * Params : - * r0 = workarea start, status (out) - * r1 = workarea end - * r2 = target address - * r3 = count (16bit words) - * r4 = flash base - * - * Clobbered: - * r6 - temp - * r7 - rp - * r8 - wp, tmp - */ - -#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */ -#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register in FLASH struct */ - -wait_fifo: - ldr r8, [r0, #0] /* read wp */ - cmp r8, #0 /* abort if wp == 0 */ - beq exit - ldr r7, [r0, #4] /* read rp */ - cmp r7, r8 /* wait until rp != wp */ - beq wait_fifo - - ldr r6, STM32_PROG16 - str r6, [r4, #STM32_FLASH_CR_OFFSET] - ldrh r6, [r7], #0x02 /* read one half-word from src, increment ptr */ - strh r6, [r2], #0x02 /* write one half-word from src, increment ptr */ - dsb -busy: - ldr r6, [r4, #STM32_FLASH_SR_OFFSET] - tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */ - bne busy /* wait more... */ - tst r6, #0xf0 /* PGSERR | PGPERR | PGAERR | WRPERR */ - bne error /* fail... */ - - cmp r7, r1 /* wrap rp at end of buffer */ - it cs - addcs r7, r0, #8 /* skip loader args */ - str r7, [r0, #4] /* store rp */ - subs r3, r3, #1 /* decrement halfword count */ - cbz r3, exit /* loop if not done */ - b wait_fifo -error: - movs r1, #0 - str r1, [r0, #4] /* set rp = 0 on error */ -exit: - mov r0, r6 /* return status in r0 */ - bkpt #0x00 - -STM32_PROG16: .word 0x101 /* PG | PSIZE_16*/ diff --git a/contrib/loaders/flash/stm32h7x.S b/contrib/loaders/flash/stm32h7x.S deleted file mode 100644 index 0f5ea996..00000000 --- a/contrib/loaders/flash/stm32h7x.S +++ /dev/null @@ -1,121 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2017 by STMicroelectronics * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc. * - ***************************************************************************/ - - .text - .syntax unified - .cpu cortex-m7 - .thumb - .thumb_func - -/* - * To assemble: - * arm-none-eabi-gcc -c stm32h7x.S - * - * To disassemble: - * arm-none-eabi-objdump -d stm32h7x.o - * - * To generate binary file: - * arm-none-eabi-objcopy -O binary stm32h7x.o stm32h7_flash_write_code.bin - * - * To generate include file: - * xxd -i stm32h7_flash_write_code.bin - */ - -/* - * Code limitations: - * The workarea must have size multiple of 4 bytes, since R/W - * operations are all at 32 bits. - * The workarea must be big enough to contain 32 bytes of data, - * thus the minimum size is (rp, wp, data) = 4 + 4 + 32 = 40 bytes. - * To benefit from concurrent host write-to-buffer and target - * write-to-flash, the workarea must be way bigger than the minimum. - */ - -/* - * Params : - * r0 = workarea start, status (out) - * r1 = workarea end - * r2 = target address - * r3 = count (256 bit words) - * r4 = flash reg base - * - * Clobbered: - * r5 - rp - * r6 - wp, status, tmp - * r7 - loop index, tmp - */ - -#define STM32_FLASH_CR_OFFSET 0x0C /* offset of CR register in FLASH struct */ -#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */ -#define STM32_CR_PROG 0x00000032 /* PSIZE64 | PG */ -#define STM32_SR_BUSY_MASK 0x00000001 /* BSY */ -#define STM32_SR_ERROR_MASK 0x03ee0000 /* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR - | INCERR | STRBERR | PGSERR | WRPERR */ - -code: - ldr r5, [r0, #4] /* read rp */ - -wait_fifo: - ldr r6, [r0, #0] /* read wp */ - cbz r6, exit /* abort if wp == 0, status = 0 */ - subs r6, r6, r5 /* number of bytes available for read in r6 */ - ittt mi /* if wrapped around */ - addmi r6, r1 /* add size of buffer */ - submi r6, r0 - submi r6, #8 - cmp r6, #32 /* wait until 32 bytes are available */ - bcc wait_fifo - - mov r6, #STM32_CR_PROG - str r6, [r4, #STM32_FLASH_CR_OFFSET] - - mov r7, #8 /* program by 8 words = 32 bytes */ -write_flash: - ldr r6, [r5], #0x04 /* read one word from src, increment ptr */ - str r6, [r2], #0x04 /* write one word to dst, increment ptr */ - dsb - cmp r5, r1 /* if rp >= end of buffer ... */ - it cs - addcs r5, r0, #8 /* ... then wrap at buffer start */ - subs r7, r7, #1 /* decrement loop index */ - bne write_flash /* loop if not done */ - -busy: - ldr r6, [r4, #STM32_FLASH_SR_OFFSET] - tst r6, #STM32_SR_BUSY_MASK - bne busy /* operation in progress, wait ... */ - - ldr r7, stm32_sr_error_mask - tst r6, r7 - bne error /* fail... */ - - str r5, [r0, #4] /* store rp */ - subs r3, r3, #1 /* decrement count */ - bne wait_fifo /* loop if not done */ - b exit - -error: - movs r7, #0 - str r7, [r0, #4] /* set rp = 0 on error */ - -exit: - mov r0, r6 /* return status in r0 */ - bkpt #0x00 - -stm32_sr_error_mask: - .word STM32_SR_ERROR_MASK diff --git a/contrib/loaders/flash/stm32l4x.S b/contrib/loaders/flash/stm32l4x.S deleted file mode 100644 index 799dec52..00000000 --- a/contrib/loaders/flash/stm32l4x.S +++ /dev/null @@ -1,100 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2010 by Spencer Oliver * - * spen@spen-soft.co.uk * - * * - * Copyright (C) 2011 Øyvind Harboe * - * oyvind.harboe@zylin.com * - * * - * Copyright (C) 2015 Uwe Bonnes * - * bon@elektron.ikp.physik.tu-darmstadt.de * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc. * - ***************************************************************************/ - - .text - .syntax unified - .cpu cortex-m4 - .thumb - .thumb_func - -/* To assemble: - * arm-none-eabi-gcc -c stm32l4x.S - * - * To disassemble: - * arm-none-eabi-objdump -o stm32l4x.o - * - * To generate binary file: - * arm-none-eabi-objcopy -O binary stm32l4x.o stm32l4_flash_write_code.bin - * - * To generate include file: - * xxd -i stm32l4_flash_write_code.bin - */ - -/* - * Params : - * r0 = workarea start, status (out) - * r1 = workarea end - * r2 = target address - * r3 = count (64bit words) - * r4 = flash base - * - * Clobbered: - * r5 - rp - * r6/7 - temp (64-bit) - * r8 - wp, tmp - */ - -#define STM32_FLASH_CR_OFFSET 0x14 /* offset of CR register in FLASH struct */ -#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */ - -wait_fifo: - ldr r8, [r0, #0] /* read wp */ - cmp r8, #0 /* abort if wp == 0 */ - beq exit - ldr r5, [r0, #4] /* read rp */ - subs r6, r8, r5 /* number of bytes available for read in r6*/ - itt mi /* if wrapped around*/ - addmi r6, r1 /* add size of buffer */ - submi r6, r0 - cmp r6, #8 /* wait until 8 bytes are available */ - bcc wait_fifo - - ldr r6, STM32_PROG - str r6, [r4, #STM32_FLASH_CR_OFFSET] - ldrd r6, [r5], #0x08 /* read one word from src, increment ptr */ - strd r6, [r2], #0x08 /* write one word to dst, increment ptr */ - dsb -busy: - ldr r6, [r4, #STM32_FLASH_SR_OFFSET] - tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */ - bne busy /* wait more... */ - tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/ - bne error /* fail... */ - - cmp r5, r1 /* wrap rp at end of buffer */ - it cs - addcs r5, r0, #8 /* skip loader args */ - str r5, [r0, #4] /* store rp */ - subs r3, r3, #1 /* decrement dword count */ - cbz r3, exit /* loop if not done */ - b wait_fifo -error: - movs r1, #0 - str r1, [r0, #4] /* set rp = 0 on error */ -exit: - mov r0, r6 /* return status in r0 */ - bkpt #0x00 - -STM32_PROG: .word 0x1 /* PG */ diff --git a/contrib/loaders/flash/stm32lx.S b/contrib/loaders/flash/stm32lx.S deleted file mode 100644 index 8f9fd0b2..00000000 --- a/contrib/loaders/flash/stm32lx.S +++ /dev/null @@ -1,63 +0,0 @@ -/*************************************************************************** - * Copyright (C) 2010 by Spencer Oliver * - * spen@spen-soft.co.uk * - * * - * Copyright (C) 2011 Øyvind Harboe * - * oyvind.harboe@zylin.com * - * * - * Copyright (C) 2011 Clement Burin des Roziers * - * clement.burin-des-roziers@hikob.com * - * * - * Copyright (C) 2017 Armin van der Togt * - * armin@otheruse.nl * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * - ***************************************************************************/ - - -// Build : arm-eabi-gcc -c stm32lx.S - .text - .syntax unified - .cpu cortex-m0 - .thumb - .thumb_func - .global write - -/* - r0 - destination address - r1 - source address - r2 - count -*/ - - // r2 = source + count * 4 - lsls r2, r2, #2 - adds r2, r1, r2 - // Go to compare - b test_done -write_word: - // load word from address in r1 and increase r1 by 4 - ldmia r1!, {r3} - // store word to address in r0 and increase r0 by 4 - stmia r0!, {r3} -test_done: - // compare r1 and r2 - cmp r1, r2 - // loop if not equal - bne write_word - - // Set breakpoint to exit - bkpt #0x00 - diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index 64c91680..015988a5 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -572,45 +572,8 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - /* see contrib/loaders/flash/stm32f1x.S for src */ - static const uint8_t stm32x_flash_write_code[] = { - /* #define STM32_FLASH_SR_OFFSET 0x0C */ - /* wait_fifo: */ - 0x16, 0x68, /* ldr r6, [r2, #0] */ - 0x00, 0x2e, /* cmp r6, #0 */ - 0x18, 0xd0, /* beq exit */ - 0x55, 0x68, /* ldr r5, [r2, #4] */ - 0xb5, 0x42, /* cmp r5, r6 */ - 0xf9, 0xd0, /* beq wait_fifo */ - 0x2e, 0x88, /* ldrh r6, [r5, #0] */ - 0x26, 0x80, /* strh r6, [r4, #0] */ - 0x02, 0x35, /* adds r5, #2 */ - 0x02, 0x34, /* adds r4, #2 */ - /* busy: */ - 0xc6, 0x68, /* ldr r6, [r0, #STM32_FLASH_SR_OFFSET] */ - 0x01, 0x27, /* movs r7, #1 */ - 0x3e, 0x42, /* tst r6, r7 */ - 0xfb, 0xd1, /* bne busy */ - 0x14, 0x27, /* movs r7, #0x14 */ - 0x3e, 0x42, /* tst r6, r7 */ - 0x08, 0xd1, /* bne error */ - 0x9d, 0x42, /* cmp r5, r3 */ - 0x01, 0xd3, /* bcc no_wrap */ - 0x15, 0x46, /* mov r5, r2 */ - 0x08, 0x35, /* adds r5, #8 */ - /* no_wrap: */ - 0x55, 0x60, /* str r5, [r2, #4] */ - 0x01, 0x39, /* subs r1, r1, #1 */ - 0x00, 0x29, /* cmp r1, #0 */ - 0x02, 0xd0, /* beq exit */ - 0xe5, 0xe7, /* b wait_fifo */ - /* error: */ - 0x00, 0x20, /* movs r0, #0 */ - 0x50, 0x60, /* str r0, [r2, #4] */ - /* exit: */ - 0x30, 0x46, /* mov r0, r6 */ - 0x00, 0xbe, /* bkpt #0 */ +#include "../../../contrib/loaders/flash/stm32/stm32f1x.inc" }; /* flash write code */ diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index 8bca62ea..8013e586 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -584,45 +584,8 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - /* see contrib/loaders/flash/stm32f2x.S for src */ - static const uint8_t stm32x_flash_write_code[] = { - /* wait_fifo: */ - 0xD0, 0xF8, 0x00, 0x80, /* ldr r8, [r0, #0] */ - 0xB8, 0xF1, 0x00, 0x0F, /* cmp r8, #0 */ - 0x1A, 0xD0, /* beq exit */ - 0x47, 0x68, /* ldr r7, [r0, #4] */ - 0x47, 0x45, /* cmp r7, r8 */ - 0xF7, 0xD0, /* beq wait_fifo */ - - 0xDF, 0xF8, 0x34, 0x60, /* ldr r6, STM32_PROG16 */ - 0x26, 0x61, /* str r6, [r4, #STM32_FLASH_CR_OFFSET] */ - 0x37, 0xF8, 0x02, 0x6B, /* ldrh r6, [r7], #0x02 */ - 0x22, 0xF8, 0x02, 0x6B, /* strh r6, [r2], #0x02 */ - 0xBF, 0xF3, 0x4F, 0x8F, /* dsb sy */ - /* busy: */ - 0xE6, 0x68, /* ldr r6, [r4, #STM32_FLASH_SR_OFFSET] */ - 0x16, 0xF4, 0x80, 0x3F, /* tst r6, #0x10000 */ - 0xFB, 0xD1, /* bne busy */ - 0x16, 0xF0, 0xF0, 0x0F, /* tst r6, #0xf0 */ - 0x07, 0xD1, /* bne error */ - - 0x8F, 0x42, /* cmp r7, r1 */ - 0x28, 0xBF, /* it cs */ - 0x00, 0xF1, 0x08, 0x07, /* addcs r7, r0, #8 */ - 0x47, 0x60, /* str r7, [r0, #4] */ - 0x01, 0x3B, /* subs r3, r3, #1 */ - 0x13, 0xB1, /* cbz r3, exit */ - 0xDF, 0xE7, /* b wait_fifo */ - /* error: */ - 0x00, 0x21, /* movs r1, #0 */ - 0x41, 0x60, /* str r1, [r0, #4] */ - /* exit: */ - 0x30, 0x46, /* mov r0, r6 */ - 0x00, 0xBE, /* bkpt #0x00 */ - - /* : */ - 0x01, 0x01, 0x00, 0x00, /* .word 0x00000101 */ +#include "../../../contrib/loaders/flash/stm32/stm32f2x.inc" }; if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index a15cd253..009eb9b8 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -568,51 +568,8 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv; int retval = ERROR_OK; - /* see contrib/loaders/flash/smt32h7x.S for src */ static const uint8_t stm32x_flash_write_code[] = { - /* : */ - 0x45, 0x68, /* ldr r5, [r0, #4] */ - /* : */ - 0x06, 0x68, /* ldr r6, [r0, #0] */ - 0x26, 0xb3, /* cbz r6, */ - 0x76, 0x1b, /* subs r6, r6, r5 */ - 0x42, 0xbf, /* ittt mi */ - 0x76, 0x18, /* addmi r6, r6, r1 */ - 0x36, 0x1a, /* submi r6, r6, r0 */ - 0x08, 0x3e, /* submi r6, #8 */ - 0x20, 0x2e, /* cmp r6, #32 */ - 0xf6, 0xd3, /* bcc.n */ - 0x4f, 0xf0, 0x32, 0x06, /* mov.w r6, #STM32_PROG */ - 0xe6, 0x60, /* str r6, [r4, #STM32_FLASH_CR_OFFSET] */ - 0x4f, 0xf0, 0x08, 0x07, /* mov.w r7, #8 */ - /* : */ - 0x55, 0xf8, 0x04, 0x6b, /* ldr.w r6, [r5], #4 */ - 0x42, 0xf8, 0x04, 0x6b, /* str.w r6, [r2], #4 */ - 0xbf, 0xf3, 0x4f, 0x8f, /* dsb sy */ - 0x8d, 0x42, /* cmp r5, r1 */ - 0x28, 0xbf, /* it cs */ - 0x00, 0xf1, 0x08, 0x05, /* addcs.w r5, r0, #8 */ - 0x01, 0x3f, /* subs r7, #1 */ - 0xf3, 0xd1, /* bne.n */ - /* : */ - 0x26, 0x69, /* ldr r6, [r4, #STM32_FLASH_SR_OFFSET] */ - 0x16, 0xf0, 0x01, 0x0f, /* tst.w r6, #STM32_SR_BUSY_MASK */ - 0xfb, 0xd1, /* bne.n */ - 0x05, 0x4f, /* ldr r7, [pc, #20] ; () */ - 0x3e, 0x42, /* tst r6, r7 */ - 0x03, 0xd1, /* bne.n */ - 0x45, 0x60, /* str r5, [r0, #4] */ - 0x01, 0x3b, /* subs r3, #1 */ - 0xdb, 0xd1, /* bne.n */ - 0x01, 0xe0, /* b.n */ - /* : */ - 0x00, 0x27, /* movs r7, #0 */ - 0x47, 0x60, /* str r7, [r0, #4] */ - /* : */ - 0x30, 0x46, /* mov r0, r6 */ - 0x00, 0xbe, /* bkpt 0x0000 */ - /* : */ - 0x00, 0x00, 0xee, 0x03 /* .word 0x03ee0000 ; (STM32_SR_ERROR_MASK) */ +#include "../../../contrib/loaders/flash/stm32/stm32h7x.inc" }; if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index e2710bd8..e47313c1 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -461,19 +461,8 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - /* See contrib/loaders/flash/stm32l4x.S for source and - * hints how to generate the data! - */ - static const uint8_t stm32l4_flash_write_code[] = { - 0xd0, 0xf8, 0x00, 0x80, 0xb8, 0xf1, 0x00, 0x0f, 0x21, 0xd0, 0x45, 0x68, - 0xb8, 0xeb, 0x05, 0x06, 0x44, 0xbf, 0x76, 0x18, 0x36, 0x1a, 0x08, 0x2e, - 0xf2, 0xd3, 0xdf, 0xf8, 0x36, 0x60, 0x66, 0x61, 0xf5, 0xe8, 0x02, 0x67, - 0xe2, 0xe8, 0x02, 0x67, 0xbf, 0xf3, 0x4f, 0x8f, 0x26, 0x69, 0x16, 0xf4, - 0x80, 0x3f, 0xfb, 0xd1, 0x16, 0xf0, 0xfa, 0x0f, 0x07, 0xd1, 0x8d, 0x42, - 0x28, 0xbf, 0x00, 0xf1, 0x08, 0x05, 0x45, 0x60, 0x01, 0x3b, 0x13, 0xb1, - 0xda, 0xe7, 0x00, 0x21, 0x41, 0x60, 0x30, 0x46, 0x00, 0xbe, 0x01, 0x00, - 0x00, 0x00 +#include "../../../contrib/loaders/flash/stm32/stm32l4x.inc" }; if (target_alloc_working_area(target, sizeof(stm32l4_flash_write_code), diff --git a/src/flash/nor/stm32lx.c b/src/flash/nor/stm32lx.c index f4dd686a..c68d7c24 100644 --- a/src/flash/nor/stm32lx.c +++ b/src/flash/nor/stm32lx.c @@ -448,10 +448,8 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff int retval = ERROR_OK; - /* see contib/loaders/flash/stm32lx.S for src */ - static const uint8_t stm32lx_flash_write_code[] = { - 0x92, 0x00, 0x8A, 0x18, 0x01, 0xE0, 0x08, 0xC9, 0x08, 0xC0, 0x91, 0x42, 0xFB, 0xD1, 0x00, 0xBE +#include "../../../contrib/loaders/flash/stm32/stm32lx.inc" }; /* Make sure we're performing a half-page aligned write. */