From: Vikas Manocha <vikas.manocha@st.com>
Date: Sun, 28 May 2017 19:55:10 +0000 (-0700)
Subject: stm32: stm32f7: add spl build support
X-Git-Tag: v2017.07-rc2~77
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=b97476965bf292c13074e01de4bd39253de0ef66;p=u-boot

stm32: stm32f7: add spl build support

This commit supports booting from stm32 internal nor flash. spl U-Boot
initializes the sdram memory, copies next image (e.g. standard U-Boot)
to sdram & then jumps to entry point.

Here are the flash memory addresses for U-Boot-spl & standard U-Boot:
	- spl U-Boot		: 0x0800_0000
	- standard U-Boot	: 0x0800_8000

To compile u-boot without spl: Remove SUPPORT_SPL configuration
(arch/arm/mach-stm32/Kconfig)

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
[trini: Rework Kconfig logic a bit]
Signed-off-by: Tom Rini <trini@konsulko.com>
---

diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index ec6b3ff2df..a3390d0bfd 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -8,6 +8,23 @@ config STM32F1
 
 config STM32F7
 	bool "stm32f7 family"
+	select SUPPORT_SPL
+	select SPL
+	select SPL_CLK
+	select SPL_DM
+	select SPL_DM_SEQ_ALIAS
+	select SPL_DRIVERS_MISC_SUPPORT
+	select SPL_GPIO_SUPPORT
+	select SPL_LIBCOMMON_SUPPORT
+	select SPL_LIBGENERIC_SUPPORT
+	select SPL_MTD_SUPPORT
+	select SPL_OF_CONTROL
+	select SPL_OF_LIBFDT
+	select SPL_OF_TRANSLATE
+	select SPL_PINCTRL
+	select SPL_RAM
+	select SPL_SERIAL_SUPPORT
+	select SPL_SYS_MALLOC_SIMPLE
 
 source "arch/arm/mach-stm32/stm32f4/Kconfig"
 source "arch/arm/mach-stm32/stm32f1/Kconfig"
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 7a6d93cb67..87fa5eb48e 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ram.h>
+#include <spl.h>
 #include <asm/io.h>
 #include <asm/armv7m.h>
 #include <asm/arch/stm32.h>
@@ -36,16 +37,18 @@ int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
 }
 int dram_init(void)
 {
-	struct udevice *dev;
 	int rv;
 	fdt_addr_t mr_base, mr_size;
 
+#ifndef CONFIG_SUPPORT_SPL
+	struct udevice *dev;
 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (rv) {
 		debug("DRAM init failed: %d\n", rv);
 		return rv;
 	}
 
+#endif
 	rv = get_memory_base_size(&mr_base, &mr_size);
 	if (rv)
 		return rv;
@@ -87,6 +90,28 @@ int board_early_init_f(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_BUILD
+int spl_dram_init(void)
+{
+	struct udevice *dev;
+	int rv;
+	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
+	if (rv)
+		debug("DRAM init failed: %d\n", rv);
+	return rv;
+}
+void spl_board_init(void)
+{
+	spl_dram_init();
+	preloader_console_init();
+	arch_cpu_init(); /* to configure mpu for sdram rw permissions */
+}
+u32 spl_boot_device(void)
+{
+	return BOOT_DEVICE_NOR;
+}
+
+#endif
 u32 get_board_rev(void)
 {
 	return 0;
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index a334d504ed..766b111538 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -39,7 +39,6 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_FULL is not set
 CONFIG_PINCTRL_STM32=y
-# CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 150c68d794..f948783170 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -69,6 +69,7 @@ config SPL_PINCTRL
 config SPL_PINCTRL_FULL
 	bool "Support full pin controllers in SPL"
 	depends on SPL_PINCTRL && SPL_OF_CONTROL
+	default n if TARGET_STM32F746_DISCO
 	default y
 	help
 	  This option is an SPL-variant of the PINCTRL_FULL option.
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 1ee58156e0..055fdf8ef0 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -10,7 +10,12 @@
 
 #define CONFIG_SYS_FLASH_BASE		0x08000000
 #define CONFIG_SYS_INIT_SP_ADDR		0x20050000
-#define CONFIG_SYS_TEXT_BASE		0x08000000
+
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SYS_TEXT_BASE		0xC0000000
+#else
+#define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_FLASH_BASE
+#endif
 
 /*
  * Configuration of the external SDRAM memory
@@ -69,4 +74,19 @@
 #define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_DISPLAY_BOARDINFO
+
+/* For SPL */
+#ifdef CONFIG_SUPPORT_SPL
+#define CONFIG_SPL_STACK		CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_TEXT_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_SPL_LEN		0x00008000
+#define CONFIG_SYS_UBOOT_START		0XC00003FD
+#define CONFIG_SYS_UBOOT_BASE		(CONFIG_SYS_FLASH_BASE + \
+					 CONFIG_SYS_SPL_LEN)
+#endif
+/* For SPL ends */
+
 #endif /* __CONFIG_H */