From: Miquel Raynal Date: Wed, 28 Feb 2018 19:51:53 +0000 (+0100) Subject: sunxi: spl: deassert the NAND controller reset line X-Git-Tag: v2018.05-rc2~140^2~20 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ba1c98bae2649e990c6af04545e422042cb58b27;p=u-boot sunxi: spl: deassert the NAND controller reset line Ensure the NAND controller reset line is deasserted before use. Signed-off-by: Miquel Raynal Signed-off-by: Maxime Ripard --- diff --git a/board/sunxi/board.c b/board/sunxi/board.c index e08e22f30c..ee3bfdac6d 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -286,6 +286,10 @@ static void nand_clock_setup(void) (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \ + defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I + setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); +#endif #ifdef CONFIG_MACH_SUN9I setbits_le32(&ccm->ahb_gate1, (1 << AHB_GATE_OFFSET_DMA)); #else