From: Masahiro Yamada Date: Thu, 12 Feb 2015 09:49:33 +0000 (+0900) Subject: Documentation: gpio: fix bindings document X-Git-Tag: v2015.04-rc3~54^2~4 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=ba25779384671c533a778e53d59fe3f317bfefa8;p=u-boot Documentation: gpio: fix bindings document [ imported from Linux Kernel, commit 74981fb81d83 ] Signed-off-by: Masahiro Yamada Acked-by: Laurent Pinchart Signed-off-by: Linus Walleij Acked-by: Simon Glass --- diff --git a/doc/device-tree-bindings/gpio/gpio.txt b/doc/device-tree-bindings/gpio/gpio.txt index b9bd1d64cf..f7a158d858 100644 --- a/doc/device-tree-bindings/gpio/gpio.txt +++ b/doc/device-tree-bindings/gpio/gpio.txt @@ -69,7 +69,8 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. ---------------------------------- A gpio-specifier should contain a flag indicating the GPIO polarity; active- -high or active-low. If it does, the follow best practices should be followed: +high or active-low. If it does, the following best practices should be +followed: The gpio-specifier's polarity flag should represent the physical level at the GPIO controller that achieves (or represents, for inputs) a logically asserted @@ -147,7 +148,7 @@ contains information structures as follows: numeric-gpio-range ::= named-gpio-range ::= '<0 0>' - gpio-phandle : phandle to pin controller node. + pinctrl-phandle : phandle to pin controller node gpio-base : Base GPIO ID in the GPIO controller pinctrl-base : Base pinctrl pin ID in the pin controller count : The number of GPIOs/pins in this range