From: Stefano Babic <sbabic@denx.de>
Date: Sun, 2 Oct 2011 10:58:03 +0000 (+0200)
Subject: MX5: vision2: use new pmic driver
X-Git-Tag: v2011.12-rc1~343^2~66
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=bac395ee42d6770c3e71f5e06bc1825a04cff224;p=u-boot

MX5: vision2: use new pmic driver

Switch to new pmic generic driver.

Signed-off-by: Stefano Babic <sbabic@denx.de>
---

diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c
index e496f64312..d3815b2eed 100644
--- a/board/ttcontrol/vision2/vision2.c
+++ b/board/ttcontrol/vision2/vision2.c
@@ -34,6 +34,7 @@
 #include <asm/errno.h>
 #include <i2c.h>
 #include <mmc.h>
+#include <pmic.h>
 #include <fsl_esdhc.h>
 #include <fsl_pmic.h>
 #include <mc13892.h>
@@ -313,59 +314,63 @@ static void reset_peripherals(int reset)
 static void power_init_mx51(void)
 {
 	unsigned int val;
+	struct pmic *p;
+
+	pmic_init();
+	p = get_pmic();
 
 	/* Write needed to Power Gate 2 register */
-	val = pmic_reg_read(REG_POWER_MISC);
+	pmic_reg_read(p, REG_POWER_MISC, &val);
 
 	/* enable VCAM with 2.775V to enable read from PMIC */
 	val = VCAMCONFIG | VCAMEN;
-	pmic_reg_write(REG_MODE_1, val);
+	pmic_reg_write(p, REG_MODE_1, val);
 
 	/*
 	 * Set switchers in Auto in NORMAL mode & STANDBY mode
 	 * Setup the switcher mode for SW1 & SW2
 	 */
-	val = pmic_reg_read(REG_SW_4);
+	pmic_reg_read(p, REG_SW_4, &val);
 	val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) |
 		(SWMODE_MASK << SWMODE2_SHIFT)));
 	val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) |
 		(SWMODE_AUTO_AUTO << SWMODE2_SHIFT);
-	pmic_reg_write(REG_SW_4, val);
+	pmic_reg_write(p, REG_SW_4, val);
 
 	/* Setup the switcher mode for SW3 & SW4 */
-	val = pmic_reg_read(REG_SW_5);
+	pmic_reg_read(p, REG_SW_5, &val);
 	val &= ~((SWMODE_MASK << SWMODE4_SHIFT) |
 		(SWMODE_MASK << SWMODE3_SHIFT));
 	val |= (SWMODE_AUTO_AUTO << SWMODE4_SHIFT) |
 		(SWMODE_AUTO_AUTO << SWMODE3_SHIFT);
-	pmic_reg_write(REG_SW_5, val);
+	pmic_reg_write(p, REG_SW_5, val);
 
 
 	/* Set VGEN3 to 1.8V, VCAM to 3.0V */
-	val = pmic_reg_read(REG_SETTING_0);
+	pmic_reg_read(p, REG_SETTING_0, &val);
 	val &= ~(VCAM_MASK | VGEN3_MASK);
 	val |= VCAM_3_0;
-	pmic_reg_write(REG_SETTING_0, val);
+	pmic_reg_write(p, REG_SETTING_0, val);
 
 	/* Set VVIDEO to 2.775V, VAUDIO to 3V0, VSD to 1.8V */
-	val = pmic_reg_read(REG_SETTING_1);
+	pmic_reg_read(p, REG_SETTING_1, &val);
 	val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK);
 	val |= VVIDEO_2_775 | VAUDIO_3_0 | VSD_1_8;
-	pmic_reg_write(REG_SETTING_1, val);
+	pmic_reg_write(p, REG_SETTING_1, val);
 
 	/* Configure VGEN3 and VCAM regulators to use external PNP */
 	val = VGEN3CONFIG | VCAMCONFIG;
-	pmic_reg_write(REG_MODE_1, val);
+	pmic_reg_write(p, REG_MODE_1, val);
 	udelay(200);
 
 	/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
 	val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |
 		VVIDEOEN | VAUDIOEN  | VSDEN;
-	pmic_reg_write(REG_MODE_1, val);
+	pmic_reg_write(p, REG_MODE_1, val);
 
-	val = pmic_reg_read(REG_POWER_CTL2);
+	pmic_reg_read(p, REG_POWER_CTL2, &val);
 	val |= WDIRESET;
-	pmic_reg_write(REG_POWER_CTL2, val);
+	pmic_reg_write(p, REG_POWER_CTL2, val);
 
 	udelay(2500);
 
diff --git a/include/configs/vision2.h b/include/configs/vision2.h
index e411faa2b8..a2a9f3fb43 100644
--- a/include/configs/vision2.h
+++ b/include/configs/vision2.h
@@ -87,11 +87,14 @@
 #define CONFIG_ENV_IS_IN_SPI_FLASH
 
 /* PMIC Controller */
-#define CONFIG_FSL_PMIC
+#define CONFIG_PMIC
+#define CONFIG_PMIC_SPI
+#define CONFIG_PMIC_FSL
 #define CONFIG_FSL_PMIC_BUS	0
 #define CONFIG_FSL_PMIC_CS	0
 #define CONFIG_FSL_PMIC_CLK	2500000
 #define CONFIG_FSL_PMIC_MODE	SPI_MODE_0
+#define CONFIG_FSL_PMIC_BITLEN	32
 #define CONFIG_RTC_MC13783
 
 /*