From: richardbarry Date: Sun, 27 Dec 2009 09:55:16 +0000 (+0000) Subject: Start a new demo for a new SH2A port. X-Git-Tag: V6.0.3~43 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=bc2e0fa84db4d61638eacf627353d62ae6262ef5;p=freertos Start a new demo for a new SH2A port. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@943 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo.hws b/Demo/SuperH_SH7216_Renesas/RTOSDemo.hws new file mode 100644 index 000000000..b679a05d4 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo.hws @@ -0,0 +1,41 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"11.0" +[WORKSPACE_DETAILS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo.hws" "SuperH RISC engine" "Renesas SuperH Standard" +[SHARED_WORKSPACE_CONTROL_STATUS] +"" "" "" +"" "" "" +[PROJECTS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\RTOSDemo.hwp" 0 +[INFORMATION] +"No workspace information available" +[SCRAP] +[PROJECT_DEPENDENCY] +[WORKSPACE_PROPERTIES] +[HELP_FILES] +"c:\devtools\renesas\hew\tools\renesas\sh\9_3_2\hew\stdlib.chm" "C/C++ Standard Library Help" 1 +[GENERAL_DATA_PROJECT] +[USERMENUTOOLS] +[CUSTOMPLACEHOLDERS] +[MAKEFILE_BUILD_INFO] +"$(WORKSPDIR)\make\$(PROJECTNAME)_$(CONFIGNAME).mak" "" "$(WORKSPDIR)\make" 0 0 0 +[VD_CONFIGURATION_OPTIONS] +"ACTIVE_DESKTOP" "0" +[VD_CONFIGURATIONS] +"0" "Default1" "1" +"1" "Default2" "1" +"2" "Default3" "1" +"3" "Default4" "1" +[OPTIONS_DEBUG_TAB] +0 0 0 0 0 +[VCS] +"" "" "" 0 +[VCS_PROJECT] +[MAKEFILE_ENV_STRINGS] +[MAKEFILE_ENV_FLAGS] +1 0 0 +[MAKEFILE_CLEAN_INFO] +"" +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo.tws b/Demo/SuperH_SH7216_Renesas/RTOSDemo.tws new file mode 100644 index 000000000..d401e2ca9 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo.tws @@ -0,0 +1,15 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"1.2" +[CURRENT_PROJECT] +"RTOSDemo" +[GENERAL_DATA] +[BREAKPOINTS] +[OPEN_WORKSPACE_FILES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\main.c" +[WORKSPACE_FILE_STATES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\main.c" -4 -23 1400 586 1 0 +[LOADED_PROJECTS] +"RTOSDemo" +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c new file mode 100644 index 000000000..03891c5c2 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.c @@ -0,0 +1,15 @@ + +void main(void); + +void main(void) +{ +volatile unsigned long ul; + + for( ;; ) + { + ul++; + ul++; + } +} + + diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp new file mode 100644 index 000000000..c3fcd4cae --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.hwp @@ -0,0 +1,163 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"2.8" +[PROJECT_DETAILS] +"RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\RTOSDemo.hwp" "SuperH RISC engine" "Renesas SuperH Standard" "Application" "SH2A-FPU" "Other" +[INFORMATION] +"No project information available" +[TOOL_CHAIN] +"Renesas SuperH RISC engine Standard Toolchain" "9.3.2.0" +[CONFIGURATIONS] +"Debug_SH7216_E10A-USB_SYSTEM__SH" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\Debug_SH7216_E10A-USB_SYSTEM__SH" +[BUILD_PHASES] +"Renesas OptLinker" 1 +"Renesas SH Assembler" 1 +"Renesas SH C/C++ Compiler" 1 +"Renesas SH C/C++ Library Generator" 1 +[TOOL_ENVIRONMENT] +[EXTENSIONS] +"Absolute file" "ABS" +"Assembly include file" "INC" +"Assembly list file" "LIS" +"Assembly source file" "ASM" +"Assembly source file" "SRC" +"Binary file" "BIN" +"C header file" "H" +"C list file" "LST" +"C source file" "C" +"C++ header file" "HPP" +"C++ list file" "LPP" +"C++ source file" "CC" +"C++ source file" "CP" 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+"CPU information file" "BIN" "NONE" "" +"Calling information file" "BIN" "NONE" "" +"Debug information file" "BIN" "NONE" "" +"Expanded assembly source file" "TEXT" "EDITOR" "" +"Hex file" "TEXT" "EDITOR" "" +"Library file" "BIN" "NONE" "" +"Library information file" "TEXT" "EDITOR" "" +"Linkage map file" "TEXT" "EDITOR" "" +"Linkage symbol file" "TEXT" "EDITOR" "" +"Object file" "BIN" "NONE" "" +"Optimize map file" "BIN" "NONE" "" +"Preprocessed C source file" "TEXT" "EDITOR" "" +"Preprocessed C++ source file" "TEXT" "EDITOR" "" +"Profile file" "BIN" "NONE" "" +"Relocatable file" "BIN" "NONE" "" +"Rts information file" "BIN" "NONE" "" +"S-Record file" "TEXT" "EDITOR" "" +"Stack information file" "BIN" "NONE" "" +"TD include object file" "BIN" "NONE" "" +[ASSOCIATED_APPLICATIONS] +[TOOLCHAIN_PHASE] +"Renesas OptLinker" +"Renesas SH Assembler" +"Renesas SH C/C++ Compiler" +"Renesas SH C/C++ Library Generator" +[UTILITY_PHASE] +[CUSTOM_PHASES] +[CUSTOM_PHASE_INPUT_GROUP] +[CUSTOM_PHASE_OUTPUT_SYNTAX] +[BUILD_ORDER] +"Renesas SH C/C++ Library Generator" 1 +"Renesas SH C/C++ Compiler" 1 +"Renesas SH Assembler" 1 +"Renesas OptLinker" 1 +[BUILD_PHASE_DETAILS] +"Renesas OptLinker" "Object file|Library file|Relocatable file" 0 +"Renesas SH Assembler" "Assembly source file|Linkage symbol file" 1 +"Renesas SH C/C++ Compiler" "C source file|C++ source file" 1 +"Renesas SH C/C++ Library Generator" "" 0 +[BUILD_FILE_ORDER_Assembly source file] +"Renesas SH Assembler" 1 +[BUILD_FILE_ORDER_C source file] +"Renesas SH C/C++ Compiler" 1 +[BUILD_FILE_ORDER_C++ source file] +"Renesas SH C/C++ Compiler" 1 +[BUILD_FILE_ORDER_Linkage symbol file] +"Renesas SH Assembler" 1 +[SCRAP] +"Project Generator Setup File" "$(PROJDIR)\RTOSDemo.pgs" +[MAPPINGS] +"Assembly source file" "Renesas SH Assembler" "Renesas SH C/C++ Compiler" +"Library file" "Renesas OptLinker" "Renesas SH C/C++ Library Generator" +"Object file" "Renesas OptLinker" "Renesas SH Assembler" +"Object file" "Renesas OptLinker" "Renesas SH C/C++ Compiler" +[PROJECT_FILES] +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\dbsct.c" "User" "C source file" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\intprg.c" "User" "C source file" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\main.c" "User" "C source file" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\resetprg.c" "User" "C source file" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\vecttbl.c" "User" "C source file" 2 +[FOLDER] +"C source file" "C source file" +[GENERAL_DATA_PROJECT] +"USE_CUSTOM_LINKAGE_ORDER" "0" +[ON_DEMAND_COMPONENTS_LOADED] +[SYNC_SESSION_NAMES] +[SESSIONS] +"SessionSH7216_E10A-USB_SYSTEM__SH" "C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\SessionSH7216_E10A-USB_SYSTEM__SH.hsf" 0 +[GENERAL_DATA_SESSION_SessionSH7216_E10A-USB_SYSTEM__SH] +[OPTIONS_Debug_SH7216_E10A-USB_SYSTEM__SH_Renesas OptLinker] +"Single Shot" "00fbbc001d68ac10" 4 +[OPTIONS_Debug_SH7216_E10A-USB_SYSTEM__SH_Renesas SH Assembler] +"Assembly source file" "075d11aefc68ac10" 3 +"Linkage symbol file" "075d11aefc68ac10" 3 +[OPTIONS_Debug_SH7216_E10A-USB_SYSTEM__SH_Renesas SH C/C++ Compiler] +"C source file" "075d11aefc68ac10" 2 +"C++ source file" "075d11aefc68ac10" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\dbsct.c" "075d11aefc68ac10" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\intprg.c" "075d11aefc68ac10" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\main.c" "01407c001d68ac10" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\resetprg.c" "075d11aefc68ac10" 2 +"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\SuperH_SH7216_Renesas\RTOSDemo\vecttbl.c" "075d11aefc68ac10" 2 +[OPTIONS_Debug_SH7216_E10A-USB_SYSTEM__SH_Renesas SH C/C++ Library Generator] +"Single Shot" "075d11aefc68ac10" 1 +[OPTIONS_Debug_SH7216_E10A-USB_SYSTEM__SH] +"" 0 +"[S|OUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [V|VERSION|7] [S|CPU|SH2AFPU] [S|ENDIAN|BIG] [S|ROUND|ZERO] [B|DENORMALIZE|0] [B|SPEED|0] [B|RUNTIME|1] [B|NEW|0] [B|CTYPE|0] [B|MATH|0] [B|MATHF|0] [B|STDARG|0] [B|STDIO|0] [B|STDLIB|1] [B|STRING|1] [B|IOS|0] [B|COMPLEX|0] [B|CPPSTRING|0] [S|MODE|BUILD/CHANGED]" 1 +"[V|VERSION|6] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LIST|0] [B|CHGINCPATH|1] [B|ERRORPATH|1] [S|CPU|SH2AFPU] [S|ENDIAN|BIG] [S|ROUND|ZERO] [B|DENORMALIZE|0]" 3 +"[V|VERSION|6] [B|OPTIMIZE|0] [B|DEBUG|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).abs^"] [S|ROM|(D,R)] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|FORM|STYPE] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [S|START|DVECTTBL,DINTTBL(000000000)|PResetPRG,PIntPRG(000000800)|P,C,C$BSEC,C$DSEC,D(000001000)|B,R(0FFF80000)|S(0FFFBFC00)]" 4 +"[V|VERSION|7] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|LIST|0] [B|CHGINCPATH|1] [B|ERRORPATH|1] [S|CPU|SH2AFPU] [S|ENDIAN|BIG] [S|ROUND|ZERO] [B|DENORMALIZE|0]" 2 +[EXCLUDED_FILES_Debug_SH7216_E10A-USB_SYSTEM__SH] +[LINKAGE_ORDER_Debug_SH7216_E10A-USB_SYSTEM__SH] +[GENERAL_DATA_CONFIGURATION_Debug_SH7216_E10A-USB_SYSTEM__SH] +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SH7216_E10A-USB_SYSTEM__SH_SessionSH7216_E10A-USB_SYSTEM__SH] +[SESSION_DATA_CONFIGURATION_SESSION_Debug_SH7216_E10A-USB_SYSTEM__SH_SessionSH7216_E10A-USB_SYSTEM__SH] +"MEMORY_MAPPING_OPTIONS" "Unknown Options" +[EXT_DEBUGGER_INFO] +0 "" "" "" "" +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.nav b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.nav new file mode 100644 index 000000000..86dfd15bb Binary files /dev/null and b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.nav differ diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.pgs b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.pgs new file mode 100644 index 000000000..5aa07f7ab --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.pgs @@ -0,0 +1,35 @@ +; Project Generator Setup Infomation + +[PGS Version] +Version=1.0 + +[Toolchain] +Toolchain=Renesas SuperH Standard +Toolchain Name=Renesas SuperH RISC engine Standard Toolchain +Toolchain Version=9.3.2.0 + +[CPU] +CPU Family=SuperH RISC engine +CPU Series=SH2A-FPU +CPU Type=Other +Operating Mode=Not Support +Address Space=Not Support +Multiple=Not Support +Divide=Not Support + +[Project] +Project Name=RTOSDemo +Project Type=Application + +[Stack Settings] +Stack Pointer Address=H'FFFC0000 +Stack Size=H'400 +Stack Section Name=S +Stack Section Address= +Source File Name=stacksct.h +Description=#pragma stacksize 0x400 /* Do not modify this line. */ +Default Stack Pointer Address=H'FFFC0000 +Default Stack Size=H'400 + +[Initial Settings] +Simulator I/O=disable diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.tps b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.tps new file mode 100644 index 000000000..804f6fa50 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/RTOSDemo.tps @@ -0,0 +1,20 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"1.1" +[SESSIONS_] +"SessionSH7216_E10A-USB_SYSTEM__SH" +[CONFIGURATIONS] +"Debug_SH7216_E10A-USB_SYSTEM__SH" +[CURRENT_CONFIGURATION] +"Debug_SH7216_E10A-USB_SYSTEM__SH" +[CURRENT_SESSION] +"SessionSH7216_E10A-USB_SYSTEM__SH" +[GENERAL_DATA_PROJECT] +[GENERAL_DATA_CONFIGURATION_Debug_SH7216_E10A-USB_SYSTEM__SH] +"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE" +[SESSIONS_Debug_SH7216_E10A-USB_SYSTEM__SH] +"SessionSH7216_E10A-USB_SYSTEM__SH" +[GENERAL_DATA_SESSION_SessionSH7216_E10A-USB_SYSTEM__SH] +[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SH7216_E10A-USB_SYSTEM__SH_SessionSH7216_E10A-USB_SYSTEM__SH] +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.hsf b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.hsf new file mode 100644 index 000000000..8d2d23be3 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.hsf @@ -0,0 +1,324 @@ +[HIMDBVersion] +2.0 +[DATABASE_VERSION] +"2.3" +[SESSION_DETAILS] +"" +[INFORMATION] +"" +[GENERAL_DATA] +"FIRST_CONNECTION_TAG" "NO" +"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_FALSE_STORE_TAG" +"{08009853-4189-4ADA-848F-0F1A84AFE443}MonitorCtrlLabelAddress" "" +"{08009853-4189-4ADA-848F-0F1A84AFE443}MonitorCtrlMonitorLastSaveLogDirectory" "" +"{08009853-4189-4ADA-848F-0F1A84AFE443}MonitorCtrlViews" "0" +"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" "" +"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0" +"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}ECXLABEL_ADDDLG_ADDR" "" +"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileDir" "" +"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileName" "" +"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlViews" "0" +"{2BA6A3EF-6488-11D5-80D4-00C04F68EAD7}StatusCtrlViews" "0" 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+[DEFAULT_DEBUG_FORMAT] +"Elf/Dwarf2" +[FLASH_DETAILS] +"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" +[BREAKPOINTS] +[END] diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini new file mode 100644 index 000000000..4f273cfef --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH.ini @@ -0,0 +1,4 @@ +[E10A USB Cpu Select] +FREQUENCY=12.50 +[Key] +Key=1 diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini new file mode 100644 index 000000000..b82cebe4b --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/SessionSH7216_E10A-USB_SYSTEM__SH_Heush2acustom1.ini @@ -0,0 +1,3 @@ +[E10A USB Cpu Select] +CPU Select=5 +FREQUENCY=12.50 diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c new file mode 100644 index 000000000..5ee520579 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/dbsct.c @@ -0,0 +1,30 @@ +/***********************************************************************/ +/* */ +/* FILE :dbsct.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Setting of B,R Section */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include "typedefine.h" + +#pragma section $DSEC +static const struct { + _UBYTE *rom_s; /* Start address of the initialized data section in ROM */ + _UBYTE *rom_e; /* End address of the initialized data section in ROM */ + _UBYTE *ram_s; /* Start address of the initialized data section in RAM */ +} DTBL[] = { + { __sectop("D"), __secend("D"), __sectop("R") } +}; +#pragma section $BSEC +static const struct { + _UBYTE *b_s; /* Start address of non-initialized data section */ + _UBYTE *b_e; /* End address of non-initialized data section */ +} BTBL[] = { + { __sectop("B"), __secend("B") } +}; diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c new file mode 100644 index 000000000..71a435a25 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/intprg.c @@ -0,0 +1,22 @@ +/***********************************************************************/ +/* */ +/* FILE :intprg.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Interrupt Program */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include +#include "vect.h" +#pragma section IntPRG + +// 4 Illegal code +void INT_Illegal_code(void){/* sleep(); */} + +// Dummy +void Dummy(void){/* sleep(); */} diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c new file mode 100644 index 000000000..03891c5c2 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/main.c @@ -0,0 +1,15 @@ + +void main(void); + +void main(void) +{ +volatile unsigned long ul; + + for( ;; ) + { + ul++; + ul++; + } +} + + diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c new file mode 100644 index 000000000..f3b5d3044 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/resetprg.c @@ -0,0 +1,106 @@ +/***********************************************************************/ +/* */ +/* FILE :resetprg.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Reset Program */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include +#include <_h_c_lib.h> +//#include // Remove the comment when you use errno +//#include // Remove the comment when you use rand() +#include "typedefine.h" +#include "stacksct.h" + +#define SR_Init 0x000000F0 +#ifdef _FPD // when -fpu=double is specified +#define FPSCR_Init 0x000C0001 +#else +#define FPSCR_Init 0x00040001 +#endif +#define INT_OFFSET 0x10 + +extern _UINT INT_Vectors; + +#ifdef __cplusplus +extern "C" { +#endif +void PowerON_Reset_PC(void); +void Manual_Reset_PC(void); +void main(void); +#ifdef __cplusplus +} +#endif + +//#ifdef __cplusplus // Enable I/O in the application(both SIM I/O and hardware I/O) +//extern "C" { +//#endif +//extern void _INIT_IOLIB(void); +//extern void _CLOSEALL(void); +//#ifdef __cplusplus +//} +//#endif + +//extern void srand(_UINT); // Remove the comment when you use rand() +//extern _SBYTE *_s1ptr; // Remove the comment when you use strtok() + +//#ifdef __cplusplus // Use Hardware Setup +//extern "C" { +//#endif +//extern void HardwareSetup(void); +//#ifdef __cplusplus +//} +//#endif + +//#ifdef __cplusplus // Remove the comment when you use global class object +//extern "C" { // Sections C$INIT and C$END will be generated +//#endif +//extern void _CALL_INIT(void); +//extern void _CALL_END(void); +//#ifdef __cplusplus +//} +//#endif + +#pragma section ResetPRG + +#pragma entry PowerON_Reset_PC + +void PowerON_Reset_PC(void) +{ + set_vbr((void *)((_UBYTE *)&INT_Vectors - INT_OFFSET)); + + set_fpscr(FPSCR_Init); + + _INITSCT(); + +// _CALL_INIT(); // Remove the comment when you use global class object + +// _INIT_IOLIB(); // Enable I/O in the application(both SIM I/O and hardware I/O) + +// errno=0; // Remove the comment when you use errno +// srand((_UINT)1); // Remove the comment when you use rand() +// _s1ptr=NULL; // Remove the comment when you use strtok() + +// HardwareSetup(); // Use Hardware Setup + + set_cr(SR_Init); + + main(); + +// _CLOSEALL(); // Close I/O in the application(both SIM I/O andhardware I/O) + +// _CALL_END(); // Remove the comment when you use global class object + + sleep(); +} + +//#pragma entry Manual_Reset_PC // Remove the comment when you use Manual Reset +void Manual_Reset_PC(void) +{ +} diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h b/Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h new file mode 100644 index 000000000..fb2eddb1a --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/stacksct.h @@ -0,0 +1,11 @@ +/***********************************************************************/ +/* */ +/* FILE :stacksct.h */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Setting of Stack area */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ +#pragma stacksize 0x400 /* Do not modify this line. */ diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h b/Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h new file mode 100644 index 000000000..372d68078 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/typedefine.h @@ -0,0 +1,23 @@ +/***********************************************************************/ +/* */ +/* FILE :typedefine.h */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Aliases of Integer Type */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +typedef signed char _SBYTE; +typedef unsigned char _UBYTE; +typedef signed short _SWORD; +typedef unsigned short _UWORD; +typedef signed int _SINT; +typedef unsigned int _UINT; +typedef signed long _SDWORD; +typedef unsigned long _UDWORD; +typedef signed long long _SQWORD; +typedef unsigned long long _UQWORD; diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h new file mode 100644 index 000000000..4331b0884 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vect.h @@ -0,0 +1,37 @@ +/***********************************************************************/ +/* */ +/* FILE :vect.h */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Definition of Vector */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + + + +//;<> +//;0 Power On Reset PC +extern void PowerON_Reset_PC(void); + +//;<> +// 1 Power On Reset SP + +//;<> +//;2 Manual Reset PC +extern void Manual_Reset_PC(void); + +//;<> +// 3 Manual Reset SP + + +// 4 Illegal code +#pragma interrupt INT_Illegal_code +extern void INT_Illegal_code(void); + +// Dummy +#pragma interrupt Dummy +extern void Dummy(void); diff --git a/Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c new file mode 100644 index 000000000..338244307 --- /dev/null +++ b/Demo/SuperH_SH7216_Renesas/RTOSDemo/vecttbl.c @@ -0,0 +1,39 @@ +/***********************************************************************/ +/* */ +/* FILE :vecttbl.c */ +/* DATE :Sun, Dec 27, 2009 */ +/* DESCRIPTION :Initialize of Vector Table */ +/* CPU TYPE :Other */ +/* */ +/* This file is generated by Renesas Project Generator (Ver.4.16). */ +/* */ +/***********************************************************************/ + + + +#include "vect.h" + +#pragma section VECTTBL + +void *RESET_Vectors[] = { +//;<> +//;0 Power On Reset PC + (void*) PowerON_Reset_PC, +//;<> +// 1 Power On Reset SP + __secend("S"), +//;<> +//;2 Manual Reset PC + (void*) Manual_Reset_PC, +//;<> +// 3 Manual Reset SP + __secend("S") + +}; +#pragma section INTTBL +void *INT_Vectors[] = { +// 4 Illegal code + (void*) INT_Illegal_code, +// xx Reserved + (void*) Dummy +};