From: Andre Przywara <andre.przywara@arm.com>
Date: Thu, 16 Feb 2017 01:20:23 +0000 (+0000)
Subject: sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM
X-Git-Tag: v2017.05-rc2~81^2~6
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=bc613d85bdc54e0092da8598cfb93f10cbc93b62;p=u-boot

sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM

Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB,
while the first SRAM region is mapped at address 0.
With the extended physical memory support of the A80 this was changed,
so the BROM is now at address 0 and the SRAM region starts right behind
this at 64KB. This configuration seems to be called "high SRAM".
Instead of enumerating the SoCs which have copied this configuration,
let's call a spade a spade and introduce a Kconfig option for this setup.
SoCs implementing this (A80, A64 and H5, so far), can then select this
configuration.
Simplify the config header definition on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
---

diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h
index 5d7ab559ef..831d0c0ff6 100644
--- a/arch/arm/include/asm/arch-sunxi/spl.h
+++ b/arch/arm/include/asm/arch-sunxi/spl.h
@@ -12,7 +12,7 @@
 #define SPL_SIGNATURE		"SPL" /* marks "sunxi" SPL header */
 #define SPL_HEADER_VERSION	1
 
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
+#ifdef CONFIG_SUNXI_HIGH_SRAM
 #define SPL_ADDR		0x10000
 #else
 #define SPL_ADDR		0x0
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index ea0d6586fa..654ec73059 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -27,6 +27,17 @@ config SPL_POWER_SUPPORT
 config SPL_SERIAL_SUPPORT
 	default y
 
+config SUNXI_HIGH_SRAM
+	bool
+	default n
+	---help---
+	Older Allwinner SoCs have their mask boot ROM mapped just below 4GB,
+	with the first SRAM region being located at address 0.
+	Some newer SoCs map the boot ROM at address 0 instead and move the
+	SRAM to 64KB, just behind the mask ROM.
+	Chips using the latter setup are supposed to select this option to
+	adjust the addresses accordingly.
+
 # Note only one of these may be selected at a time! But hidden choices are
 # not supported by Kconfig
 config SUNXI_GEN_SUN4I
@@ -120,6 +131,7 @@ config MACH_SUN8I_H3
 config MACH_SUN9I
 	bool "sun9i (Allwinner A80)"
 	select CPU_V7
+	select SUNXI_HIGH_SRAM
 	select SUNXI_GEN_SUN6I
 	select SUPPORT_SPL
 
@@ -127,6 +139,7 @@ config MACH_SUN50I
 	bool "sun50i (Allwinner A64)"
 	select ARM64
 	select SUNXI_GEN_SUN6I
+	select SUNXI_HIGH_SRAM
 	select SUPPORT_SPL
 
 endchoice
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 90b695a71d..377ae00a7b 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -79,7 +79,7 @@
 
 #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
 
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
+#ifdef CONFIG_SUNXI_HIGH_SRAM
 /*
  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
  * slightly bigger. Note that it is possible to map the first 32 KiB of the
@@ -175,29 +175,24 @@
 #define CONFIG_SPL_BOARD_LOAD_IMAGE
 #endif
 
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
+#ifdef CONFIG_SUNXI_HIGH_SRAM
 #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
-#define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB on sun9/50i */
+#define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB */
+#define LOW_LEVEL_SRAM_STACK		0x00018000
 #else
 #define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
 #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
+#define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
 #endif
 
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
 #ifndef CONFIG_ARM64
 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
 #endif
 
 #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
 
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-/* FIXME: 40 KiB instead of 32 KiB ? */
-#define LOW_LEVEL_SRAM_STACK		0x00018000
-#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
-#else
-/* end of 32 KiB in sram */
-#define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
-#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
-#endif
 
 /* I2C */
 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \