From: Bin Meng Date: Thu, 3 Aug 2017 09:31:02 +0000 (-0700) Subject: nvme: Handle zero Maximum Data Transfer Size (MDTS) X-Git-Tag: v2017.09-rc2~17 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=beb5f521392e7da208455f3bf0c86bc141c0879d;p=u-boot nvme: Handle zero Maximum Data Transfer Size (MDTS) Maximum Data Transfer Size (MDTS) field indicates the maximum data transfer size between the host and the controller. The host should not submit a command that exceeds this transfer size. The value is in units of the minimum memory page size and is reported as a power of two (2^n). The spec also says: a value of 0h indicates no restrictions on transfer size. On the real NVMe card this is normally not 0 due to hardware restrictions, but with QEMU emulated NVMe device it reports as 0. In nvme_blk_read/write() below we have the following algorithm for maximum number of logic blocks per transfer: u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); dev->max_transfer_shift being 0 will for sure cause lbas to overflow. Let's use 20. With this fix, the NVMe driver works on QEMU emulated NVMe device. Signed-off-by: Bin Meng Reviewed-by: Tom Rini --- diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index bac253a3f7..151fe92479 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -563,6 +563,27 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev) memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr)); if (ctrl->mdts) dev->max_transfer_shift = (ctrl->mdts + shift); + else { + /* + * Maximum Data Transfer Size (MDTS) field indicates the maximum + * data transfer size between the host and the controller. The + * host should not submit a command that exceeds this transfer + * size. The value is in units of the minimum memory page size + * and is reported as a power of two (2^n). + * + * The spec also says: a value of 0h indicates no restrictions + * on transfer size. But in nvme_blk_read/write() below we have + * the following algorithm for maximum number of logic blocks + * per transfer: + * + * u16 lbas = 1 << (dev->max_transfer_shift - ns->lba_shift); + * + * In order for lbas not to overflow, the maximum number is 15 + * which means dev->max_transfer_shift = 15 + 9 (ns->lba_shift). + * Let's use 20 which provides 1MB size. + */ + dev->max_transfer_shift = 20; + } /* Apply quirk stuff */ dm_pci_read_config16(dev->pdev, PCI_VENDOR_ID, &vendor);