From: Wadim Egorov <w.egorov@phytec.de>
Date: Tue, 18 Jul 2017 09:53:10 +0000 (+0200)
Subject: rockchip: phycore: Add ID page of M24C32-D EEPROM
X-Git-Tag: v2017.09-rc1~87
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c03635c3d14c5402229fcfacedbbdff48f3de221;p=u-boot

rockchip: phycore: Add ID page of M24C32-D EEPROM

The Identification Page (32 byte) is an additional page which can be written
and (later) permanently locked in Read-only mode.

phyCORE-RK3288 SoMs are using this page to describe the module variant.
This page also contains a MAC.

Our boards can be equipped with a different amount of EEPROMs. To make
this more transparent let's add an alias for the eeprom which stores the
module variant.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
---

diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi b/arch/arm/dts/rk3288-phycore-som.dtsi
index fd463f4d98..02d11968cb 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -61,6 +61,7 @@
 	aliases {
 		rtc0 = &i2c_rtc;
 		rtc1 = &rk818;
+		eeprom0 = &i2c_eeprom_id;
 	};
 
 	ext_gmac: external-gmac-clock {
@@ -383,6 +384,13 @@
 		pagesize = <32>;
 	};
 
+	/* M24C32-D Identification page */
+	i2c_eeprom_id: eeprom@58 {
+		compatible = "atmel,24c32";
+		reg = <0x58>;
+		pagesize = <32>;
+	};
+
 	vdd_cpu: regulator@60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;