From: Marek Vasut <marex@denx.de>
Date: Mon, 3 Aug 2015 13:32:37 +0000 (+0200)
Subject: arm: socfpga: Do not enable gmac1 in Cyclone V dtsi
X-Git-Tag: v2015.10-rc3~96^2~15
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c2624240dd9321b0fd86dba5ecf75d7a73974796;p=u-boot

arm: socfpga: Do not enable gmac1 in Cyclone V dtsi

The GMAC which is enabled is purely board property, so do not enable
arbitrary GMAC in DT include files. Same goes for PHY mode, which is
again a board property. The CycloneV SoCDK does this correctly, but
SoCrates doesn't. This bug never manifested itself though, since all
the boards ever used the GMAC1 . This bug manifests itself only on
boards that utilise GMAC0.

Signed-off-by: Marek Vasut <marex@denx.de>
---

diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi
index 234a901205..de362099db 100644
--- a/arch/arm/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5.dtsi
@@ -27,12 +27,6 @@
 			cap-sd-highspeed;
 		};
 
-		ethernet@ff702000 {
-			phy-mode = "rgmii";
-			phy-addr = <0xffffffff>; /* probe for phy addr */
-			status = "okay";
-		};
-
 		sysmgr@ffd08000 {
 			cpu1-start-addr = <0xffd080c4>;
 		};
diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index 3c985584d1..6782691f73 100644
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -23,6 +23,7 @@
 
 &gmac1 {
 	status = "okay";
+	phy-mode = "rgmii";
 };
 
 &i2c0 {