From: Daniel Mack <daniel@caiaq.de>
Date: Tue, 23 Jun 2009 15:30:05 +0000 (+0200)
Subject: pxa: fix CKEN_B register bits
X-Git-Tag: v2009.08-rc1~110^2^2^2~4
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c33c5990cec7ced9ef1ef148debbca34adafa12b;p=u-boot

pxa: fix CKEN_B register bits

The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
---

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 1f81e11875..2a723dceaa 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1953,12 +1953,12 @@ typedef void		(*ExcpHndlr) (void) ;
 #define CKENA_1_LCD	(1 << 1)	/* LCD Unit Clock Enable */
 
 #define CKENB_9_SYSBUS2	(1 << 9)	/* System bus 2 */
-#define CKENB_8_1WIRE	((1 << 8) + 32) /* One Wire Interface Unit Clock Enable */
-#define CKENB_7_GPIO	((1 << 7) + 32)	/* GPIO Clock Enable */
-#define CKENB_6_IRQ	((1 << 6) + 32)	/* Interrupt Controller Clock Enable */
-#define CKENB_4_I2C	((1 << 4) + 32)	/* I2C Unit Clock Enable */
-#define CKENB_1_PWM1	((1 << 1) + 32)	/* PWM2 & PWM3 Clock Enable */
-#define CKENB_0_PWM0	((1 << 0) + 32)	/* PWM0 & PWM1 Clock Enable */
+#define CKENB_8_1WIRE	(1 << 8)	/* One Wire Interface Unit Clock Enable */
+#define CKENB_7_GPIO	(1 << 7)	/* GPIO Clock Enable */
+#define CKENB_6_IRQ	(1 << 6)	/* Interrupt Controller Clock Enable */
+#define CKENB_4_I2C	(1 << 4)	/* I2C Unit Clock Enable */
+#define CKENB_1_PWM1	(1 << 1)	/* PWM2 & PWM3 Clock Enable */
+#define CKENB_0_PWM0	(1 << 0)	/* PWM0 & PWM1 Clock Enable */
 
 #else /* if defined CONFIG_CPU_MONAHANS */