From: Priyanka Jain Date: Mon, 29 Jun 2015 10:09:23 +0000 (+0530) Subject: rtc:ds3232/ds3231: Add support to generate 32KHz output X-Git-Tag: v2015.10-rc3~39 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c340941e443748bbcd0e35172b481ea2077d2582;p=u-boot rtc:ds3232/ds3231: Add support to generate 32KHz output RTC devices can generate 32KHz output if for -DS3232 device, EN32KHz bit and BB32KHz bit are set -DS3231 device, EN32KHz bit is set, BB32KHz bit is don't care Patch adds rtc_enable_32khz_output() which when called will enable 32KHz output on 32KHz pin Signed-off-by: Priyanka Jain Reviewed-by: York Sun --- diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c index c84bbc647f..e5e1be134c 100644 --- a/drivers/rtc/ds3231.c +++ b/drivers/rtc/ds3231.c @@ -49,6 +49,8 @@ #define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */ #define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */ #define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ +#define RTC_STAT_BIT_BB32KHZ 0x40 /* Battery backed 32KHz Output */ +#define RTC_STAT_BIT_EN32KHZ 0x8 /* Enable 32KHz Output */ static uchar rtc_read (uchar reg); @@ -141,6 +143,14 @@ void rtc_reset (void) rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2); } +/* + * Enable 32KHz output + */ +void rtc_enable_32khz_output(void) +{ + rtc_write(RTC_STAT_REG_ADDR, + RTC_STAT_BIT_BB32KHZ | RTC_STAT_BIT_EN32KHZ); +} /* * Helper functions diff --git a/include/rtc.h b/include/rtc.h index bd8621d60b..69fe8d4db0 100644 --- a/include/rtc.h +++ b/include/rtc.h @@ -151,6 +151,7 @@ int rtc_write32(struct udevice *dev, unsigned int reg, u32 value); int rtc_get (struct rtc_time *); int rtc_set (struct rtc_time *); void rtc_reset (void); +void rtc_enable_32khz_output(void); /** * rtc_read8() - Read an 8-bit register