From: rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Mon, 10 Sep 2018 20:50:05 +0000 (+0000)
Subject: RISC-V work in progress:
X-Git-Tag: V10.2.0~60
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c46a78b713f1aa838e0c0c6f66209a0f4b7fde8e;p=freertos

RISC-V work in progress:
    + Initialise task stack.
    + Successfully jump to start of first task.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2582 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---

diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
index 3e65c4f9b..4fab2fd6a 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.1.0
+ * FreeRTOS Kernel V10.1.1
  * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -90,18 +90,116 @@ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t px
 	pxTopOfStack--;
 	*pxTopOfStack = ( StackType_t ) pxCode; /* X1 */
 	pxTopOfStack--;
-	*pxTopOfStack =
-
+//	*pxTopOfStack = ( StackType_t ) 2; /* Stack pointer is handled separately. */
+//	pxTopOfStack--;
+//	*pxTopOfStack = ( StackType_t ) 3; /* Global pointer is not manipulated. */
+//	pxTopOfStack--;
+//	*pxTopOfStack = ( StackType_t ) 4; /* Thread pointer is not manipulated. */
+//	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 5;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 6;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 7;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 8;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 9;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) pvParameters;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 11;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 12;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 13;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 14;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 15;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 16;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 17;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 18;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 19;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 20;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 21;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 22;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 23;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 24;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 25;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 26;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 27;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 28;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 29;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 30;
+	pxTopOfStack--;
+	*pxTopOfStack = ( StackType_t ) 31;
 
-		return pxTopOfStack;
+	return pxTopOfStack;
 }
 /*-----------------------------------------------------------*/
 
 BaseType_t xPortStartScheduler( void )
 {
+	__asm volatile
+	(
+		".extern pxCurrentTCB			\r\n"
+		"lw		sp, pxCurrentTCB		\r\n" /* Load pxCurrentTCB. */
+		"lw		sp, 0x00( sp )			\r\n" /* Read sp from first TCB member. */
+		"lw		x31, 0( sp )			\r\n" /* X31 */
+		"lw		x30, 4( sp )			\r\n" /* X30 */
+		"lw		x29, 8( sp )			\r\n" /* X29 */
+		"lw		x28, 12( sp )			\r\n" /* X28 */
+		"lw		x27, 16( sp )			\r\n" /* X27 */
+		"lw		x26, 20( sp )			\r\n" /* X26 */
+		"lw		x25, 24( sp )			\r\n" /* X25 */
+		"lw		x24, 28( sp )			\r\n" /* X24 */
+		"lw		x23, 32( sp )			\r\n" /* X23 */
+		"lw		x22, 36( sp )			\r\n" /* X22 */
+		"lw		x21, 40( sp )			\r\n" /* X21 */
+		"lw		x20, 44( sp )			\r\n" /* X20 */
+		"lw		x19, 48( sp )			\r\n" /* X19 */
+		"lw		x18, 52( sp )			\r\n" /* X18 */
+		"lw		x17, 56( sp )			\r\n" /* X17 */
+		"lw		x16, 60( sp )			\r\n" /* X16 */
+		"lw		x15, 64( sp )			\r\n" /* X15 */
+		"lw		x14, 68( sp )			\r\n" /* X14 */
+		"lw		x13, 72( sp )			\r\n" /* X13 */
+		"lw		x12, 76( sp )			\r\n" /* X12 */
+		"lw		x11, 80( sp )			\r\n" /* X11 */
+		"lw		x10, 84( sp )			\r\n" /* X10 */
+		"lw		x9, 88( sp )			\r\n" /* X9 */
+		"lw		x8, 92( sp )			\r\n" /* X8 */
+		"lw		x7, 96( sp )			\r\n" /* X7 */
+		"lw		x6, 100( sp )			\r\n" /* X6 */
+		"lw		x5, 104( sp )			\r\n" /* X5 */
+		"lw		x1, 108( sp )			\r\n" /* X1 */
+		"csrs 	mstatus, 8				\r\n" /* Enable interrupts. */
+		"ret								"
+	);
+
 	/*Should not get here*/
 	return pdFALSE;
 }
 /*-----------------------------------------------------------*/
 
+void vPortYield( void )
+{
+}
+
 
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
index bc151b797..5d18ba34a 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
@@ -1,5 +1,5 @@
 /*
- * FreeRTOS Kernel V10.1.0
+ * FreeRTOS Kernel V10.1.1
  * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -70,7 +70,8 @@ not need to be guarded with a critical section. */
 
 
 /* Scheduler utilities. */
-#define portYIELD()
+extern void vPortYield( void );
+#define portYIELD()					vPortYield()
 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) vPortYield()
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
 /*-----------------------------------------------------------*/