From: Jagannadha Sutradharudu Teki Date: Fri, 1 Mar 2013 11:24:26 +0000 (+0530) Subject: mtd: cfi_flash: Write buffer size adjustment for M29EW Numonyx devices X-Git-Tag: v2013.04-rc3~25^2~1 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=c502321c4a1bc8d859ecf19b22f9d0ce03954fd6;p=u-boot mtd: cfi_flash: Write buffer size adjustment for M29EW Numonyx devices This patch addjusted the write buffer size for M29EW devices those are operated in 8-bit mode. The M29EW devices seem to report the CFI information wrong when it's in 8 bit mode. There's an app note from Numonyx on this issue and there's a patch in the open source as well for Linux, but it doesn't seem to be in mainline. Signed-off-by: Jagannadha Sutradharudu Teki Tested-by: Jagannadha Sutradharudu Teki --- diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 6b9fc1a12d..328c76d296 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -2053,6 +2053,26 @@ static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry) } } +static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry) +{ + /* + * The M29EW devices seem to report the CFI information wrong + * when it's in 8 bit mode. + * There's an app note from Numonyx on this issue. + * So adjust the buffer size for M29EW while operating in 8-bit mode + */ + if (((qry->max_buf_write_size) > 0x8) && + (info->device_id == 0x7E) && + (info->device_id2 == 0x2201 || + info->device_id2 == 0x2301 || + info->device_id2 == 0x2801 || + info->device_id2 == 0x4801)) { + debug("Adjusted buffer size on Numonyx flash" + " M29EW family in 8 bit mode\n"); + qry->max_buf_write_size = 0x8; + } +} + /* * The following code cannot be run from FLASH! * @@ -2135,6 +2155,9 @@ ulong flash_get_size (phys_addr_t base, int banknum) case 0x00bf: /* SST */ flash_fixup_sst(info, &qry); break; + case 0x0089: /* Numonyx */ + flash_fixup_num(info, &qry); + break; } debug ("manufacturer is %d\n", info->vendor);